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Searched refs:MCF_IRQ_I2C1 (Results 1 – 5 of 5) sorted by relevance

/linux-6.1.9/arch/m68k/coldfire/
Dm525x.c69 r = readl(MCFINTC2_INTPRI_REG(MCF_IRQ_I2C1)); in m525x_i2c_init()
70 r &= ~MCFINTC2_INTPRI_BITS(0xf, MCF_IRQ_I2C1); in m525x_i2c_init()
71 r |= MCFINTC2_INTPRI_BITS(0x5, MCF_IRQ_I2C1); in m525x_i2c_init()
72 writel(r, MCFINTC2_INTPRI_REG(MCF_IRQ_I2C1)); in m525x_i2c_init()
Dm5249.c97 r = readl(MCFINTC2_INTPRI_REG(MCF_IRQ_I2C1)); in m5249_i2c_init()
98 r &= ~MCFINTC2_INTPRI_BITS(0xf, MCF_IRQ_I2C1); in m5249_i2c_init()
99 r |= MCFINTC2_INTPRI_BITS(0x5, MCF_IRQ_I2C1); in m5249_i2c_init()
100 writel(r, MCFINTC2_INTPRI_REG(MCF_IRQ_I2C1)); in m5249_i2c_init()
Ddevice.c371 .start = MCF_IRQ_I2C1,
372 .end = MCF_IRQ_I2C1,
/linux-6.1.9/arch/m68k/include/asm/
Dm525xsim.h184 #define MCF_IRQ_I2C1 (MCFINTC2_VECBASE + 62) macro
Dm5441xsim.h183 #define MCF_IRQ_I2C1 (MCFINT1_VECBASE + MCFINT1_I2C1) macro