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Searched refs:MCFSIM_ICR_LEVEL5 (Results 1 – 6 of 6) sorted by relevance

/linux-6.1.9/arch/m68k/include/asm/
Dmcfintc.h37 #define MCFSIM_ICR_LEVEL5 0x14 /* Level 5 intr */ macro
/linux-6.1.9/arch/m68k/coldfire/
Dm5407.c43 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, in m5407_i2c_init()
Dm5206.c43 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, in m5206_i2c_init()
Dm5307.c52 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, in m5307_i2c_init()
Dm525x.c64 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, in m525x_i2c_init()
Dm5249.c92 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, in m5249_i2c_init()