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Searched refs:LVL2_CLK_GATE_OVRE (Results 1 – 2 of 2) sorted by relevance

/linux-6.1.9/drivers/clk/tegra/
Dclk-periph-gate.c33 #define LVL2_CLK_GATE_OVRE 0x554 macro
59 writel_relaxed(0, gate->clk_base + LVL2_CLK_GATE_OVRE); in clk_periph_enable_locked()
60 writel_relaxed(BIT(22), gate->clk_base + LVL2_CLK_GATE_OVRE); in clk_periph_enable_locked()
62 writel_relaxed(0, gate->clk_base + LVL2_CLK_GATE_OVRE); in clk_periph_enable_locked()
Dclk-tegra210.c242 #define LVL2_CLK_GATE_OVRE 0x554 macro
653 ovre = readl_relaxed(clk_base + LVL2_CLK_GATE_OVRE); in tegra210_venc_mbist_war()
654 writel_relaxed(ovre | BIT(3), clk_base + LVL2_CLK_GATE_OVRE); in tegra210_venc_mbist_war()
658 writel_relaxed(ovre, clk_base + LVL2_CLK_GATE_OVRE); in tegra210_venc_mbist_war()
687 ovre = readl_relaxed(clk_base + LVL2_CLK_GATE_OVRE); in tegra210_vic_mbist_war()
688 writel_relaxed(ovre | BIT(5), clk_base + LVL2_CLK_GATE_OVRE); in tegra210_vic_mbist_war()
699 writel_relaxed(ovre, clk_base + LVL2_CLK_GATE_OVRE); in tegra210_vic_mbist_war()
710 ovre = readl_relaxed(clk_base + LVL2_CLK_GATE_OVRE); in tegra210_ape_mbist_war()
713 clk_base + LVL2_CLK_GATE_OVRE); in tegra210_ape_mbist_war()
734 writel_relaxed(ovre, clk_base + LVL2_CLK_GATE_OVRE); in tegra210_ape_mbist_war()
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