Home
last modified time | relevance | path

Searched refs:LR (Results 1 – 25 of 31) sorted by relevance

12

/linux-6.1.9/drivers/video/fbdev/matrox/
Dmatroxfb_maven.c523 #define LR(x) maven_set_reg(c, (x), m->regs[(x)]) macro
548 LR(0x00); LR(0x01); LR(0x02); LR(0x03); in maven_init_TV()
550 LR(0x04); in maven_init_TV()
552 LR(0x2C); in maven_init_TV()
553 LR(0x08); in maven_init_TV()
554 LR(0x0A); in maven_init_TV()
555 LR(0x09); in maven_init_TV()
556 LR(0x29); in maven_init_TV()
559 LR(0x0B); in maven_init_TV()
560 LR(0x0C); in maven_init_TV()
[all …]
Dmatroxfb_g450.c503 #define LR(x) cve2_set_reg(minfo, (x), m->regs[(x)]) macro
509 LR(0x80); in cve2_init_TV()
510 LR(0x82); LR(0x83); in cve2_init_TV()
511 LR(0x84); LR(0x85); in cve2_init_TV()
516 LR(i); in cve2_init_TV()
/linux-6.1.9/arch/arm/kernel/
Dentry-ftrace.S67 str lr, [sp, #-8]! @ store LR as PC and make space for CPSR/OLD_R0,
68 @ OLD_R0 will overwrite previous LR
70 ldr lr, [sp, #8] @ get previous LR
72 str r0, [sp, #8] @ write r0 as OLD_R0 over previous LR
74 str lr, [sp, #-4]! @ store previous LR as LR
76 add lr, sp, #16 @ move in LR the value of SP as it was
83 @ R0 | R1 | ... | IP | SP + 4 | previous LR | LR | PSR | OLD_R0 |
92 ldr lr, [sp, #S_PC] @ get LR
109 ldr lr, [sp], #4 @ restore LR
132 ldr lr, [sp], #4 @ restore LR
Dunwind.c75 LR = 14, enumerator
347 ctrl->vrs[PC] = ctrl->vrs[LR]; in unwind_exec_insn()
372 ctrl->vrs[FP], ctrl->vrs[SP], ctrl->vrs[LR], ctrl->vrs[PC]); in unwind_exec_insn()
405 ctrl.vrs[LR] = frame->lr; in unwind_frame()
473 ctrl.vrs[PC] = ctrl.vrs[LR]; in unwind_frame()
481 frame->lr = ctrl.vrs[LR]; in unwind_frame()
Dentry-v7m.S53 push {r0, lr} @ preserve LR and original SP
Dentry-header.S173 @ Store/load the USER SP and LR registers by switching to the SYS
/linux-6.1.9/tools/perf/arch/arm/tests/
Dregs_load.S18 #define LR 0x70 macro
55 str lr, [r0, #LR]
/linux-6.1.9/tools/perf/arch/csky/util/
Dunwind-libdw.c37 dwarf_regs[15] = REG(LR); in libdw__arch_set_initial_registers()
71 dwarf_regs[15] = REG(LR); in libdw__arch_set_initial_registers()
/linux-6.1.9/arch/powerpc/kernel/
Dswsusp_asm64.S83 SAVE_SPECIAL(LR)
129 RESTORE_SPECIAL(LR)
263 RESTORE_SPECIAL(LR)
/linux-6.1.9/Documentation/devicetree/bindings/display/panel/
Dsharp,ls037v7dw01.yaml35 GPIO ordered MO, LR, and UD as specified in LS037V7DW01.pdf
58 &gpio1 2 GPIO_ACTIVE_HIGH /* gpio2, lcd LR */
/linux-6.1.9/arch/arm/lib/
Dbacktrace.S67 bic sv_pc, sv_pc, mask @ mask PC/LR for the mode
77 bic r1, r1, mask @ mask PC/LR for the mode
/linux-6.1.9/Documentation/gpu/
Dkomeda-kms.rst102 rankdir=LR;
148 rankdir=LR;
226 rankdir=LR;
242 rankdir=LR;
257 rankdir=LR;
273 rankdir=LR;
289 rankdir=LR;
/linux-6.1.9/tools/perf/arch/arm/util/
Dunwind-libdw.c33 dwarf_regs[14] = REG(LR); in libdw__arch_set_initial_registers()
/linux-6.1.9/arch/arm/mm/
Dproc-v7m.S133 mov r6, lr @ save LR
142 mov lr, r6 @ restore LR
/linux-6.1.9/tools/perf/arch/arm64/util/
Dunwind-libdw.c49 dwarf_regs[30] = REG(LR); in libdw__arch_set_initial_registers()
/linux-6.1.9/net/ieee802154/
DKconfig11 Say Y here to compile LR-WPAN support into the kernel or say M to
/linux-6.1.9/Documentation/networking/device_drivers/ethernet/intel/
Dixgbe.rst59 | LR Modules |
61 | Intel | DUAL RATE 1G/10G SFP+ LR (bailed) | FTLX1471D3BCV-IT |
63 | Intel | DUAL RATE 1G/10G SFP+ LR (bailed) | AFCT-701SDZ-IN2 |
65 | Intel | DUAL RATE 1G/10G SFP+ LR (bailed) | AFCT-701SDDZ-IN1 |
78 | Finisar | SFP+ LR bailed, 10g single rate | FTLX1471D3BCL |
84 | Finisar | DUAL RATE 1G/10G SFP+ LR (No Bail) | FTLX1471D3QCV-IT |
86 | Avago | DUAL RATE 1G/10G SFP+ LR (No Bail) | AFCT-701SDZ-IN1 |
139 - LAN on Motherboard (LOMs) may support DA, SR, or LR modules. Other module
152 | Finisar | SFP+ LR bailed, 10g single rate | FTLX1471D3BCL |
/linux-6.1.9/Documentation/livepatch/
Dreliable-stacktrace.rst289 Similarly, a function may deliberately clobber the LR, e.g.
296 ADR LR, <callee>
297 BLR LR
301 The ADR places the address of 'callee' into the LR, before the BLR branches to
308 reliably identify when the LR or stack value should be used (e.g. using
/linux-6.1.9/arch/powerpc/platforms/52xx/
Dlite5200_sleep.S69 SAVE_SPRN(LR, 0x1c)
247 LOAD_SPRN(LR, 0x1c)
/linux-6.1.9/tools/testing/selftests/powerpc/switch_endian/
Dcheck.S26 addi r9,r15,32 # check LR
/linux-6.1.9/Documentation/devicetree/bindings/phy/
Dmicrochip,sparx5-serdes.yaml63 * 25.78125 Gbps (25GBASE-KR/25GBASE-CR/25GBASE-SR/25GBASE-LR/25GBASE-ER)
/linux-6.1.9/arch/arm/boot/dts/
Domap3-evm-common.dtsi105 &gpio1 2 GPIO_ACTIVE_HIGH /* gpio2, lcd LR */
/linux-6.1.9/net/ethtool/
Dcommon.c156 __DEFINE_LINK_MODE_NAME(10000, LR, Full),
306 __DEFINE_LINK_MODE_PARAMS(10000, LR, Full),
/linux-6.1.9/arch/powerpc/platforms/8xx/
DKconfig120 (by not placing conditional branches or branches to LR or CTR
/linux-6.1.9/Documentation/powerpc/
Dsyscall64-abi.rst45 stack frame LR and CR save fields are not used.

12