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Searched refs:LANE_COUNT_DP_MAX (Results 1 – 16 of 16) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/inc/
Ddc_link_dp.h125 union lane_status ln_status[LANE_COUNT_DP_MAX],
127 union lane_adjust ln_adjust[LANE_COUNT_DP_MAX],
150 const struct dc_lane_settings hw_lane_settings[LANE_COUNT_DP_MAX],
154 const union lane_adjust ln_adjust[LANE_COUNT_DP_MAX],
155 struct dc_lane_settings hw_lane_settings[LANE_COUNT_DP_MAX],
Dlink_hwss.h64 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]);
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/core/
Ddc_link_dpia.c303 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {0}; in dpia_training_cr_non_transparent()
305 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = {0}; in dpia_training_cr_non_transparent()
459 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {0}; in dpia_training_cr_transparent()
461 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = {0}; in dpia_training_cr_transparent()
614 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {0}; in dpia_training_eq_non_transparent()
615 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = {0}; in dpia_training_eq_non_transparent()
758 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {0}; in dpia_training_eq_transparent()
759 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = {0}; in dpia_training_eq_transparent()
Ddc_link_dp.c121 struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]);
123 struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]);
334 union dpcd_training_lane dpcd_lane_adjust[LANE_COUNT_DP_MAX]) in dp_fixed_vs_pe_read_lane_adjust() argument
375 for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) { in dp_fixed_vs_pe_read_lane_adjust()
383 const union dpcd_training_lane dpcd_lane_adjust[LANE_COUNT_DP_MAX], in dp_fixed_vs_pe_set_retimer_lane_settings() argument
697 const struct dc_lane_settings hw_lane_settings[LANE_COUNT_DP_MAX], in dp_hw_to_dpcd_lane_settings() argument
702 for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) { in dp_hw_to_dpcd_lane_settings()
726 const union lane_adjust ln_adjust[LANE_COUNT_DP_MAX], in dp_decide_lane_settings() argument
727 struct dc_lane_settings hw_lane_settings[LANE_COUNT_DP_MAX], in dp_decide_lane_settings() argument
732 for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) { in dp_decide_lane_settings()
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/linux-6.1.9/drivers/gpu/drm/amd/display/include/
Dlink_service_types.h139 struct dc_lane_settings hw_lane_settings[LANE_COUNT_DP_MAX];
140 union dpcd_training_lane dpcd_lane_settings[LANE_COUNT_DP_MAX];
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/link/
Dlink_hwss_dio.h52 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]);
Dlink_hwss_dio.c156 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]) in set_dio_dp_lane_settings() argument
Dlink_hwss_hpo_dp.c248 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]) in set_hpo_dp_lane_settings() argument
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/virtual/
Dvirtual_link_encoder.c65 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]) {} in virtual_link_encoder_dp_set_lane_settings() argument
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/inc/hw/
Dlink_encoder.h185 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]);
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce/
Ddce_link_encoder.h283 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]);
Ddce_link_encoder.c1326 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]) in dce110_link_encoder_dp_set_lane_settings() argument
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/
Ddc_link.h182 struct dc_lane_settings cur_lane_setting[LANE_COUNT_DP_MAX];
Ddc_dp_types.h37 LANE_COUNT_DP_MAX = LANE_COUNT_FOUR enumerator
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_link_encoder.h591 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]);
Ddcn10_link_encoder.c1102 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]) in dcn10_link_encoder_dp_set_lane_settings() argument