Searched refs:L3_PWM_TIMER_INIT_VAL_MASK (Results 1 – 2 of 2) sorted by relevance
572 wa_write_clr_set(wal, GEN11_L3SQCREG5, L3_PWM_TIMER_INIT_VAL_MASK, in dg2_ctx_gt_tuning_init()573 REG_FIELD_PREP(L3_PWM_TIMER_INIT_VAL_MASK, 0x7f)); in dg2_ctx_gt_tuning_init()
992 #define L3_PWM_TIMER_INIT_VAL_MASK REG_GENMASK(9, 0) macro