Searched refs:L1I (Results 1 – 25 of 32) sorted by relevance
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/linux-6.1.9/arch/alpha/kernel/ |
D | setup.c | 1280 int L1I, L1D, L2, L3; in determine_cpu_caches() local 1287 L1I = CSHAPE(8*1024, 5, 1); in determine_cpu_caches() 1289 L1I = CSHAPE(16*1024, 5, 1); in determine_cpu_caches() 1290 L1D = L1I; in determine_cpu_caches() 1311 L1I = L1D = CSHAPE(8*1024, 5, 1); in determine_cpu_caches() 1326 L1I = L1D = CSHAPE(8*1024, 5, 1); in determine_cpu_caches() 1351 L1I = CSHAPE(16*1024, 6, 1); in determine_cpu_caches() 1354 L1I = CSHAPE(32*1024, 6, 2); in determine_cpu_caches() 1378 L1I = L1D = CSHAPE(64*1024, 6, 2); in determine_cpu_caches() 1385 L1I = L1D = CSHAPE(64*1024, 6, 2); in determine_cpu_caches() [all …]
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/linux-6.1.9/arch/arm/kernel/ |
D | perf_event_v7.c | 184 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS, 185 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, 234 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, 273 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS, 274 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, 279 [C(L1I)][C(OP_PREFETCH)][C(RESULT_ACCESS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL, 280 [C(L1I)][C(OP_PREFETCH)][C(RESULT_MISS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP, 323 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS, 324 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, 372 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS, [all …]
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D | perf_event_v6.c | 101 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV6_PERFCTR_ICACHE_MISS, 164 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV6MPCORE_PERFCTR_ICACHE_MISS,
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/linux-6.1.9/drivers/perf/ |
D | riscv_pmu_sbi.c | 129 [C(L1I)] = { 132 C(OP_READ), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}}, 134 C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}}, 138 C(OP_WRITE), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}}, 140 C(OP_WRITE), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}}, 144 C(OP_PREFETCH), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}}, 146 C(OP_PREFETCH), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
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/linux-6.1.9/arch/powerpc/perf/ |
D | e6500-pmu.c | 42 [C(L1I)] = {
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D | e500-pmu.c | 44 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
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D | power10-pmu.c | 373 [C(L1I)] = { 474 [C(L1I)] = {
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D | generic-compat-pmu.c | 200 [ C(L1I) ] = {
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D | mpc7450-pmu.c | 371 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
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D | power8-pmu.c | 281 [ C(L1I) ] = {
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D | power7-pmu.c | 345 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
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D | ppc970-pmu.c | 444 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
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D | power6-pmu.c | 493 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
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D | power9-pmu.c | 352 [ C(L1I) ] = {
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D | power5-pmu.c | 573 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
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/linux-6.1.9/arch/mips/kernel/ |
D | perf_event_mipsxx.c | 1026 [C(L1I)] = { 1107 [C(L1I)] = { 1176 [C(L1I)] = { 1220 [C(L1I)] = { 1276 [C(L1I)] = { 1340 [C(L1I)] = { 1393 [C(L1I)] = { 1444 [C(L1I)] = {
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/linux-6.1.9/arch/x86/events/intel/ |
D | p6.c | 42 [ C(L1I ) ] = {
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D | knc.c | 45 [ C(L1I ) ] = {
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D | core.c | 480 [ C(L1I ) ] = { 631 [ C(L1I ) ] = { 859 [ C(L1I ) ] = { 1015 [ C(L1I ) ] = { 1167 [ C(L1I ) ] = { 1350 [ C(L1I ) ] = { 1465 [ C(L1I ) ] = { 1556 [ C(L1I ) ] = { 1707 [ C(L1I ) ] = { 1841 [C(L1I)] = { [all …]
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/linux-6.1.9/arch/sh/kernel/cpu/sh4a/ |
D | perf_event.c | 131 [ C(L1I) ] = {
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/linux-6.1.9/arch/sh/kernel/cpu/sh4/ |
D | perf_event.c | 106 [ C(L1I) ] = {
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/linux-6.1.9/arch/x86/events/zhaoxin/ |
D | core.c | 65 [C(L1I)] = { 169 [C(L1I)] = {
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/linux-6.1.9/arch/arm64/kernel/ |
D | perf_event.c | 63 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_PMUV3_PERFCTR_L1I_CACHE, 64 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL, 128 [C(L1I)][C(OP_PREFETCH)][C(RESULT_ACCESS)] = ARMV8_THUNDER_PERFCTR_L1I_CACHE_PREF_ACCESS, 129 [C(L1I)][C(OP_PREFETCH)][C(RESULT_MISS)] = ARMV8_THUNDER_PERFCTR_L1I_CACHE_PREF_MISS,
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/linux-6.1.9/arch/sparc/kernel/ |
D | perf_event.c | 235 [C(L1I)] = { 373 [C(L1I)] = { 508 [C(L1I)] = { 645 [C(L1I)] = {
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/linux-6.1.9/arch/xtensa/kernel/ |
D | perf_event.c | 84 [C(L1I)] = {
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