Searched refs:JZ4740_CLK_PLL_HALF (Results 1 – 4 of 4) sorted by relevance
/linux-6.1.9/drivers/clk/ingenic/ |
D | jz4740-cgu.c | 94 [JZ4740_CLK_PLL_HALF] = { 151 .parents = { JZ4740_CLK_PLL_HALF, -1, -1, -1 }, 161 .parents = { JZ4740_CLK_PLL_HALF, -1, -1, -1 }, 167 .parents = { JZ4740_CLK_EXT, JZ4740_CLK_PLL_HALF, -1, -1 }, 183 .parents = { JZ4740_CLK_PLL_HALF, -1, -1, -1 }, 190 .parents = { JZ4740_CLK_PLL_HALF, -1, -1, -1 }, 197 .parents = { JZ4740_CLK_EXT, JZ4740_CLK_PLL_HALF, -1, -1 },
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/linux-6.1.9/include/dt-bindings/clock/ |
D | ingenic,jz4740-cgu.h | 18 #define JZ4740_CLK_PLL_HALF 3 macro
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/linux-6.1.9/Documentation/devicetree/bindings/sound/ |
D | ingenic,aic.yaml | 87 <&cgu JZ4740_CLK_PLL_HALF>;
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/linux-6.1.9/arch/mips/boot/dts/ingenic/ |
D | jz4740.dtsi | 198 <&cgu JZ4740_CLK_PLL_HALF>;
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