| /linux-6.1.9/Documentation/devicetree/bindings/display/ |
| D | amlogic,meson-vpu.yaml | 50 - ENCI : Interlace Video encoder for CVBS and Interlace HDMI
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| D | display_mode_vba_util_32.h | 479 bool Interlace,
615 bool Interlace[],
1010 bool Interlace[],
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| D | display_mode_vba_32.c | 435 …ermarksAndPerformanceCalculation.SurfaceParameters[k].InterlaceEnable = mode_lib->vba.Interlace[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
693 v->MaxVStartupLines[k] = ((mode_lib->vba.Interlace[k] && in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
771 …hParametersWatermarksAndPerformanceCalculation.myPipe.InterlaceEnable = mode_lib->vba.Interlace[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1427 isInterlaceTiming = (mode_lib->vba.Interlace[k] && in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1521 mode_lib->vba.Interlace, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1585 mode_lib->vba.Interlace, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2331 == dm_420 && mode_lib->vba.Interlace[k] == 1 && in dml32_ModeSupportAndSystemConfigurationFull()
2702 …deSupportAndSystemConfigurationFull.SurfParameters[k].InterlaceEnable = mode_lib->vba.Interlace[k]; in dml32_ModeSupportAndSystemConfigurationFull()
2934 mode_lib->vba.MaximumVStartup[i][j][k] = ((mode_lib->vba.Interlace[k] && in dml32_ModeSupportAndSystemConfigurationFull()
3055 mode_lib->vba.Interlace, in dml32_ModeSupportAndSystemConfigurationFull()
[all …]
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| D | display_mode_vba_util_32.c | 2530 bool Interlace, in dml32_CalculatePrefetchSourceLines() argument
2561 *VInitPreFill = dml_floor((VRatio + (double) VTaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1); in dml32_CalculatePrefetchSourceLines()
2945 bool Interlace[], in dml32_UseMinimumDCFCLK()
3092 Interlace[k], in dml32_UseMinimumDCFCLK()
5578 bool Interlace[], in dml32_CalculateStutterEfficiency() argument
5832 bool isInterlaceTiming = Interlace[k] && !ProgressiveToInterlaceUnitInOPP; in dml32_CalculateStutterEfficiency()
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| D | display_mode_vba_314.c | 205 bool Interlace,
506 bool Interlace[],
677 bool Interlace,
1757 bool Interlace, argument
1770 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1);
2385 v->Interlace[k],
2442 v->Interlace[k],
2579 v->Interlace[k],
2638 myPipe.InterlaceEnable = v->Interlace[k];
3180 isInterlaceTiming = (v->Interlace[k] && !v->ProgressiveToInterlaceUnitInOPP);
[all …]
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| D | display_mode_vba_31.c | 193 bool Interlace,
494 bool Interlace[],
1736 bool Interlace, argument
1749 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1);
2363 v->Interlace[k],
2420 v->Interlace[k],
2550 (v->Interlace[k] && !v->ProgressiveToInterlaceUnitInOPP) ?
2616 myPipe.InterlaceEnable = v->Interlace[k];
3158 isInterlaceTiming = (v->Interlace[k] && !v->ProgressiveToInterlaceUnitInOPP);
3233 v->Interlace,
[all …]
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| D | display_mode_vba_20v2.c | 85 bool Interlace,
150 bool Interlace,
492 bool Interlace, in CalculateDelayAfterScaler()
529 if (OutputFormat == dm_420 || (Interlace && ProgressiveToInterlaceUnitInOPP)) in CalculateDelayAfterScaler()
876 bool Interlace, in CalculatePrefetchSourceLines() argument
888 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1); in CalculatePrefetchSourceLines()
1933 mode_lib->vba.Interlace[k], in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1975 mode_lib->vba.Interlace[k], in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2132 …lDETC[k], mode_lib->vba.SwathHeightY[k], mode_lib->vba.SwathHeightC[k], mode_lib->vba.Interlace[k], in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2177 mode_lib->vba.Interlace[k], in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
[all …]
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| D | display_mode_vba_20.c | 126 bool Interlace,
816 bool Interlace, in CalculatePrefetchSourceLines() argument
828 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1); in CalculatePrefetchSourceLines()
1897 mode_lib->vba.Interlace[k], in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1939 mode_lib->vba.Interlace[k], in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2143 mode_lib->vba.Interlace[k], in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
4175 && mode_lib->vba.Interlace[k] == true in dml20_ModeSupportAndSystemConfigurationFull()
4526 mode_lib->vba.Interlace[k], in dml20_ModeSupportAndSystemConfigurationFull()
4565 mode_lib->vba.Interlace[k], in dml20_ModeSupportAndSystemConfigurationFull()
4756 mode_lib->vba.Interlace[k], in dml20_ModeSupportAndSystemConfigurationFull()
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| D | display_mode_vba_30.c | 177 bool Interlace,
1617 bool Interlace, in CalculatePrefetchSourceLines() argument
1629 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1); in CalculatePrefetchSourceLines()
2235 v->Interlace[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2292 v->Interlace[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2442 myPipe.InterlaceEnable = v->Interlace[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
4183 …|| (v->OutputFormat[k] == dm_420 && v->Interlace[k] == true && v->ProgressiveToInterlaceUnitInOPP … in dml30_ModeSupportAndSystemConfigurationFull()
4410 v->Interlace[k], in dml30_ModeSupportAndSystemConfigurationFull()
4465 v->Interlace[k], in dml30_ModeSupportAndSystemConfigurationFull()
4772 myPipe.InterlaceEnable = v->Interlace[k]; in dml30_ModeSupportAndSystemConfigurationFull()
[all …]
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| D | display_mode_vba_21.c | 164 bool Interlace,
1215 bool Interlace, in CalculatePrefetchSourceLines() argument
1227 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1); in CalculatePrefetchSourceLines()
1868 mode_lib->vba.Interlace[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1924 mode_lib->vba.Interlace[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2151 myPipe.InterlaceEnable = mode_lib->vba.Interlace[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3445 myPipe.InterlaceEnable = mode_lib->vba.Interlace[k]; in CalculatePrefetchSchedulePerPlane()
4390 && mode_lib->vba.Interlace[k] == true in dml21_ModeSupportAndSystemConfigurationFull()
4640 mode_lib->vba.Interlace[k], in dml21_ModeSupportAndSystemConfigurationFull()
4696 mode_lib->vba.Interlace[k], in dml21_ModeSupportAndSystemConfigurationFull()
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/ |
| D | display_mode_vba.c | 588 mode_lib->vba.Interlace[mode_lib->vba.NumberOfActivePlanes] = dst->interlaced; in fetch_pipe_params()
1049 if (mode_lib->vba.Interlace[k] == 1 in PixelClockAdjustmentForProgressiveToInterlaceUnit()
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| D | display_mode_vba.h | 487 bool Interlace[DC__NUM_DPP__MAX]; member
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/bios/ |
| D | bios_parser.c | 1283 lvds->sLCDTiming.susModeMiscInfo.sbfAccess.Interlace; in get_embedded_panel_info_v1_2()
1401 lvds->sLCDTiming.susModeMiscInfo.sbfAccess.Interlace; in get_embedded_panel_info_v1_3()
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| /linux-6.1.9/drivers/gpu/drm/radeon/ |
| D | atombios.h | 3246 USHORT Interlace:1; member
3262 USHORT Interlace:1;
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| /linux-6.1.9/drivers/gpu/drm/amd/include/ |
| D | atombios.h | 3723 USHORT Interlace:1; member
3739 USHORT Interlace:1;
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