Searched refs:IS_TIGERLAKE (Results 1 – 17 of 17) sorted by relevance
124 drm_WARN_ON(&dev_priv->drm, !IS_TIGERLAKE(dev_priv) && in intel_pch_type()178 else if (IS_TIGERLAKE(dev_priv) || IS_ROCKETLAKE(dev_priv)) in intel_virt_detect_pch()
611 #define IS_TIGERLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_TIGERLAKE) macro707 (IS_TIGERLAKE(__i915) && \715 (IS_TIGERLAKE(__i915) && !IS_TGL_UY(__i915)) && \
183 } else if (IS_TIGERLAKE(i915)) { in intel_step_init()
461 if (GRAPHICS_VER(i915) >= 12 && !IS_TIGERLAKE(i915)) in i915_gem_pread_ioctl()735 if (GRAPHICS_VER(i915) >= 12 && !IS_TIGERLAKE(i915)) in i915_gem_pwrite_ioctl()
1535 else if (IS_TIGERLAKE(i915)) in gt_init_workarounds()2254 IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) { in rcs_engine_wa_init()2269 IS_DG1(i915) || IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) { in rcs_engine_wa_init()2283 IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) { in rcs_engine_wa_init()2296 IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915) || IS_ALDERLAKE_P(i915)) { in rcs_engine_wa_init()2313 if (IS_DG1(i915) || IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915) || in rcs_engine_wa_init()
478 } else if (IS_TIGERLAKE(i915) || IS_ROCKETLAKE(i915)) { in get_mocs_settings()
1035 (IS_TIGERLAKE(i915) || in mmio_invalidate_full()
401 if (IS_TIGERLAKE(dev_priv) || IS_DG1(dev_priv)) { in icl_combo_phys_uninit()
348 if (!IS_DG2(i915) && !IS_TIGERLAKE(i915)) in disable_all_flip_queue_events()924 } else if (IS_TIGERLAKE(dev_priv)) { in intel_dmc_ucode_init()
1355 if ((IS_TIGERLAKE(dev_priv) || IS_ROCKETLAKE(dev_priv)) && in i915_audio_component_init()
1398 if ((IS_ALDERLAKE_S(dev_priv) || IS_TIGERLAKE(dev_priv)) && in skl_plane_check_fb()
2311 if (IS_TIGERLAKE(dev_priv) || IS_DG2(dev_priv)) { in intel_crtc_compute_min_cdclk()
2487 IS_TIGERLAKE(i915) || IS_ALDERLAKE_S(i915) || IS_ALDERLAKE_P(i915)) && in ehl_combo_pll_div_frac_wa_needed()
2114 else if (IS_TIGERLAKE(dev_priv)) in intel_phy_is_tc()
35 if (IS_TIGERLAKE(i915) || IS_ROCKETLAKE(i915)) { in uc_expand_default_options()
496 if (GRAPHICS_VER(i915) >= 12 && !IS_TIGERLAKE(i915) && in set_proto_ctx_engines_bond()
503 GRAPHICS_VER(eb->i915) >= 12 && !IS_TIGERLAKE(eb->i915)) in eb_validate_vma()