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Searched refs:IS_ALDERLAKE_P (Results 1 – 24 of 24) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/i915/display/
Dintel_tc.c59 IS_ALDERLAKE_P(i915); in intel_tc_cold_requires_aux_pw()
311 if (IS_ALDERLAKE_P(i915)) in tc_port_live_status_mask()
372 if (IS_ALDERLAKE_P(i915)) in tc_phy_status_complete()
427 if (IS_ALDERLAKE_P(i915)) in tc_phy_take_ownership()
466 if (IS_ALDERLAKE_P(i915)) in tc_phy_is_owned()
576 if (IS_ALDERLAKE_P(i915) && dig_port->tc_mode == TC_PORT_TBT_ALT) in icl_tc_phy_is_connected()
Dintel_psr.c536 if (!IS_ALDERLAKE_P(dev_priv)) in hsw_activate_psr2()
619 if (IS_ALDERLAKE_P(dev_priv)) in transcoder_has_psr2()
699 if (IS_ALDERLAKE_P(dev_priv)) in dc3co_is_pipe_port_compatible()
802 if (IS_ALDERLAKE_P(dev_priv)) in psr2_granularity_check()
1170 if (IS_ALDERLAKE_P(dev_priv)) in intel_psr_enable_source()
1182 if (IS_ALDERLAKE_P(dev_priv)) in intel_psr_enable_source()
1359 if (IS_ALDERLAKE_P(dev_priv)) in intel_psr_disable_locked()
1472 return IS_ALDERLAKE_P(dev_priv) ? 0 : PSR2_MAN_TRK_CTL_ENABLE; in man_trk_ctl_enable_bit_get()
1477 return IS_ALDERLAKE_P(dev_priv) ? in man_trk_ctl_single_full_frame_bit_get()
1484 return IS_ALDERLAKE_P(dev_priv) ? in man_trk_ctl_partial_frame_bit_get()
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Dintel_dmc.c908 } else if (IS_ALDERLAKE_P(dev_priv)) { in intel_dmc_ucode_init()
1073 str_yes_no(IS_ALDERLAKE_P(i915))); in intel_dmc_debugfs_status_show()
Dintel_fb.c1179 return IS_ALDERLAKE_P(i915) && fb->base.modifier != DRM_FORMAT_MOD_LINEAR; in intel_fb_needs_pot_stride_remap()
1317 if (IS_ALDERLAKE_P(to_i915(fb->base.dev))) in plane_view_scanout_stride()
1511 if (view_type == I915_GTT_VIEW_REMAPPED && IS_ALDERLAKE_P(i915)) in intel_fb_view_init()
Dintel_ddi.c299 if (IS_ALDERLAKE_P(i915) && intel_phy_is_tc(i915, phy)) { in intel_ddi_init_dp_buf_reg()
1291 if (IS_ALDERLAKE_P(dev_priv)) { in tgl_dkl_phy_set_signal_levels()
2203 if (IS_ALDERLAKE_P(i915)) in intel_ddi_splitter_pipe_mask()
2898 if (IS_ALDERLAKE_P(dev_priv) && intel_phy_is_tc(dev_priv, phy)) { in intel_enable_ddi_hdmi()
3131 if (IS_ALDERLAKE_P(dev_priv) && in intel_ddi_prepare_link_retrain()
Dintel_display_power.c1091 if (IS_ALDERLAKE_P(dev_priv)) in gen12_dbuf_slices_config()
1105 if (IS_ALDERLAKE_P(dev_priv) || DISPLAY_VER(dev_priv) >= 14) in icl_mbus_init()
Dicl_dsi.c364 if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv)) { in gen11_dsi_program_esc_clk_div()
385 if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv)) { in gen11_dsi_program_esc_clk_div()
Dintel_bw.c633 else if (IS_ALDERLAKE_P(dev_priv)) in intel_bw_init_hw()
Dintel_ddi_buf_trans.c1616 } else if (IS_ALDERLAKE_P(i915)) { in intel_ddi_buf_trans_init()
Dintel_dpll_mgr.c226 if (IS_ALDERLAKE_P(i915)) in intel_tc_pll_enable_reg()
2487 IS_TIGERLAKE(i915) || IS_ALDERLAKE_S(i915) || IS_ALDERLAKE_P(i915)) && in ehl_combo_pll_div_frac_wa_needed()
4194 else if (IS_ALDERLAKE_P(dev_priv)) in intel_shared_dpll_init()
Dintel_display_power_well.c344 if (IS_ALDERLAKE_P(dev_priv) && pg == SKL_PG1) in hsw_power_well_enable()
Dskl_watermark.c3477 else if (IS_ALDERLAKE_P(i915)) in intel_mbus_dbox_update()
3486 } else if (IS_ALDERLAKE_P(i915)) { in intel_mbus_dbox_update()
Dskl_universal_plane.c2197 if (DISPLAY_VER(i915) < 13 || IS_ALDERLAKE_P(i915)) in skl_get_plane_caps()
Dintel_cdclk.c3199 } else if (IS_ALDERLAKE_P(dev_priv)) { in intel_init_cdclk_hooks()
Dintel_display.c2096 else if (IS_ALDERLAKE_P(dev_priv) || IS_DISPLAY_VER(dev_priv, 11, 12)) in intel_phy_is_combo()
2112 else if (IS_ALDERLAKE_P(dev_priv)) in intel_phy_is_tc()
7912 } else if (IS_ALDERLAKE_P(dev_priv)) { in intel_setup_outputs()
Dintel_bios.c2191 if (IS_ALDERLAKE_P(i915)) { in map_ddc_pin()
Dintel_dp.c477 else if (IS_ALDERLAKE_P(dev_priv) || IS_ALDERLAKE_S(dev_priv) || in intel_dp_set_source_rates()
/linux-6.1.9/drivers/gpu/drm/i915/
Dintel_pch.c139 !IS_ALDERLAKE_P(dev_priv)); in intel_pch_type()
176 else if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv)) in intel_virt_detect_pch()
Di915_drv.h615 #define IS_ALDERLAKE_P(dev_priv) IS_PLATFORM(dev_priv, INTEL_ALDERLAKE_P) macro
735 (IS_ALDERLAKE_P(__i915) && \
739 (IS_ALDERLAKE_P(__i915) && \
973 #define HAS_MBUS_JOINING(i915) (IS_ALDERLAKE_P(i915) || DISPLAY_VER(i915) >= 14)
Dintel_step.c165 } else if (IS_ALDERLAKE_P(i915)) { in intel_step_init()
Dintel_pm.c4890 else if (IS_ALDERLAKE_P(dev_priv)) in intel_init_clock_gating_hooks()
/linux-6.1.9/drivers/gpu/drm/i915/gt/uc/
Dintel_guc_hwconfig.c97 if (IS_ALDERLAKE_P(i915) && !IS_ADLP_N(i915)) in has_table()
/linux-6.1.9/drivers/gpu/drm/i915/gt/
Dintel_workarounds.c2253 if (IS_ALDERLAKE_P(i915) || IS_ALDERLAKE_S(i915) || IS_DG1(i915) || in rcs_engine_wa_init()
2268 if (IS_ALDERLAKE_P(i915) || IS_DG2(i915) || IS_ALDERLAKE_S(i915) || in rcs_engine_wa_init()
2281 if (IS_ALDERLAKE_P(i915) || IS_ALDERLAKE_S(i915) || in rcs_engine_wa_init()
2296 IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915) || IS_ALDERLAKE_P(i915)) { in rcs_engine_wa_init()
2314 IS_ALDERLAKE_S(i915) || IS_ALDERLAKE_P(i915)) { in rcs_engine_wa_init()
Dintel_gt.c1039 IS_ALDERLAKE_P(i915))) in mmio_invalidate_full()