Home
last modified time | relevance | path

Searched refs:IP0_15_12 (Results 1 – 10 of 10) sorted by relevance

/linux-6.1.9/drivers/pinctrl/renesas/
Dpfc-r8a77970.c63 #define GPSR0_3 F_(DU_DR5, IP0_15_12)
166 #define IP0_15_12 FM(DU_DR5) FM(HTX0) F_(0, 0) FM(A3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0… macro
271 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
404 PINMUX_IPSR_GPSR(IP0_15_12, DU_DR5),
405 PINMUX_IPSR_GPSR(IP0_15_12, HTX0),
406 PINMUX_IPSR_GPSR(IP0_15_12, A3),
2236 IP0_15_12
Dpfc-r8a77980.c64 #define GPSR0_3 F_(DU_DR5, IP0_15_12)
199 #define IP0_15_12 FM(DU_DR5) FM(CTS4_N) FM(GETHER_RMII_RXD1) FM(A3) F_(0, 0) F_(0, 0) F_(0, 0) … macro
320 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
474 PINMUX_IPSR_GPSR(IP0_15_12, DU_DR5),
475 PINMUX_IPSR_GPSR(IP0_15_12, CTS4_N),
476 PINMUX_IPSR_GPSR(IP0_15_12, GETHER_RMII_RXD1),
477 PINMUX_IPSR_GPSR(IP0_15_12, A3),
2689 IP0_15_12
Dpfc-r8a77995.c48 #define GPSR0_5 F_(MSIOF2_RXD, IP0_15_12)
212 #define IP0_15_12 FM(MSIOF2_RXD) FM(SDA3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, … macro
362 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
542 PINMUX_IPSR_GPSR(IP0_15_12, MSIOF2_RXD),
543 PINMUX_IPSR_MSEL(IP0_15_12, SDA3_A, SEL_I2C3_0),
2677 IP0_15_12
Dpfc-r8a77950.c131 #define GPSR2_12 F_(AVB_LINK, IP0_15_12)
256 #define IP0_15_12 FM(AVB_LINK) F_(0, 0) FM(MSIOF2_SCK_C) FM(TX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F… macro
438 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
653 PINMUX_IPSR_GPSR(IP0_15_12, AVB_LINK),
654 PINMUX_IPSR_MSEL(IP0_15_12, MSIOF2_SCK_C, SEL_MSIOF2_2),
655 PINMUX_IPSR_MSEL(IP0_15_12, TX4_A, SEL_SCIF4_0),
4914 IP0_15_12
Dpfc-r8a7790.c827 PINMUX_IPSR_GPSR(IP0_15_12, D4),
828 PINMUX_IPSR_MSEL(IP0_15_12, SCIFB1_RXD_F, SEL_SCIFB1_5),
829 PINMUX_IPSR_MSEL(IP0_15_12, SCIFB0_RXD_C, SEL_SCIFB_2),
830 PINMUX_IPSR_MSEL(IP0_15_12, VI3_DATA4, SEL_VI3_0),
831 PINMUX_IPSR_MSEL(IP0_15_12, VI0_R0, SEL_VI0_0),
832 PINMUX_IPSR_MSEL(IP0_15_12, VI0_R0_B, SEL_VI0_1),
833 PINMUX_IPSR_MSEL(IP0_15_12, RX0_B, SEL_SCIF0_1),
Dpfc-r8a77990.c134 #define GPSR2_3 F_(QSPI0_IO2, IP0_15_12)
216 #define IP0_15_12 FM(QSPI0_IO2) FM(HTX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, … macro
388 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
562 PINMUX_IPSR_GPSR(IP0_15_12, QSPI0_IO2),
563 PINMUX_IPSR_GPSR(IP0_15_12, HTX4_A),
4791 IP0_15_12
Dpfc-r8a77951.c132 #define GPSR2_12 F_(AVB_LINK, IP0_15_12)
257 #define IP0_15_12 FM(AVB_LINK) F_(0, 0) FM(MSIOF2_SCK_C) FM(TX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F… macro
448 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
658 PINMUX_IPSR_GPSR(IP0_15_12, AVB_LINK),
659 PINMUX_IPSR_MSEL(IP0_15_12, MSIOF2_SCK_C, SEL_MSIOF2_2),
660 PINMUX_IPSR_MSEL(IP0_15_12, TX4_A, SEL_SCIF4_0),
5352 IP0_15_12
Dpfc-r8a7796.c137 #define GPSR2_12 F_(AVB_LINK, IP0_15_12)
262 #define IP0_15_12 FM(AVB_LINK) F_(0, 0) FM(MSIOF2_SCK_C) FM(TX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F… macro
453 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
664 PINMUX_IPSR_GPSR(IP0_15_12, AVB_LINK),
665 PINMUX_IPSR_MSEL(IP0_15_12, MSIOF2_SCK_C, SEL_MSIOF2_2),
666 PINMUX_IPSR_MSEL(IP0_15_12, TX4_A, SEL_SCIF4_0),
5307 IP0_15_12
Dpfc-r8a77965.c137 #define GPSR2_12 F_(AVB_LINK, IP0_15_12)
262 #define IP0_15_12 FM(AVB_LINK) F_(0, 0) FM(MSIOF2_SCK_C) FM(TX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F… macro
453 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
664 PINMUX_IPSR_GPSR(IP0_15_12, AVB_LINK),
665 PINMUX_IPSR_MSEL(IP0_15_12, MSIOF2_SCK_C, SEL_MSIOF2_2),
666 PINMUX_IPSR_MSEL(IP0_15_12, TX4_A, SEL_SCIF4_0),
5548 IP0_15_12
Dpfc-r8a77470.c562 PINMUX_IPSR_GPSR(IP0_15_12, SD0_DAT1),
563 PINMUX_IPSR_MSEL(IP0_15_12, SSI_SCK0129_B, SEL_SSI0_1),
564 PINMUX_IPSR_MSEL(IP0_15_12, TX4_E, SEL_SCIF4_4),