| /linux-6.1.9/drivers/mtd/nand/raw/ |
| D | pasemi_nand.c | 62 out_8(chip->legacy.IO_ADDR_W + (1 << CLE_PIN_CTL), cmd); in pasemi_hwcontrol()
64 out_8(chip->legacy.IO_ADDR_W + (1 << ALE_PIN_CTL), cmd); in pasemi_hwcontrol()
126 chip->legacy.IO_ADDR_W = chip->legacy.IO_ADDR_R; in pasemi_nand_probe()
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| D | sharpsl.c | 73 writeb(cmd, chip->legacy.IO_ADDR_W); in sharpsl_nand_hwcontrol()
175 this->legacy.IO_ADDR_W = sharpsl->io + FLASHIO; in sharpsl_nand_probe()
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| D | orion_nand.c | 49 writeb(cmd, nc->legacy.IO_ADDR_W + offs); in orion_nand_cmd_ctrl()
157 nc->legacy.IO_ADDR_R = nc->legacy.IO_ADDR_W = io_base; in orion_nand_probe()
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| D | s3c2410.c | 694 writesb(this->legacy.IO_ADDR_W, buf, len); in s3c2410_nand_write_buf()
873 chip->legacy.IO_ADDR_W = regs + S3C2410_NFDATA; in s3c2410_nand_init_chip()
881 chip->legacy.IO_ADDR_W = regs + S3C2440_NFDATA; in s3c2410_nand_init_chip()
891 chip->legacy.IO_ADDR_W = regs + S3C2440_NFDATA; in s3c2410_nand_init_chip()
903 chip->legacy.IO_ADDR_R = chip->legacy.IO_ADDR_W; in s3c2410_nand_init_chip()
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| D | nand_legacy.c | 119 iowrite8_rep(chip->legacy.IO_ADDR_W, buf, len); in nand_write_buf()
148 iowrite16_rep(chip->legacy.IO_ADDR_W, p, len >> 1); in nand_write_buf16()
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| D | tmio_nand.c | 159 tmio_iowrite8(cmd, chip->legacy.IO_ADDR_W); in tmio_nand_hwcontrol()
429 nand_chip->legacy.IO_ADDR_W = tmio->fcr; in tmio_probe()
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| D | plat_nand.c | 75 data->chip.legacy.IO_ADDR_W = data->io_base; in plat_nand_probe()
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| D | ndfc.c | 140 chip->legacy.IO_ADDR_W = ndfc->ndfcbase + NDFC_DATA; in ndfc_chip_init()
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| D | lpc32xx_mlc.c | 747 nand_chip->legacy.IO_ADDR_W = MLC_DATA(host->io_base); in lpc32xx_nand_probe()
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| D | lpc32xx_slc.c | 886 chip->legacy.IO_ADDR_W = SLC_DATA(host->io_base); in lpc32xx_nand_probe()
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| /linux-6.1.9/arch/arm/mach-ep93xx/ |
| D | snappercl15.c | 40 #define NAND_CTRL_ADDR(chip) (chip->legacy.IO_ADDR_W + 0x40)
67 chip->legacy.IO_ADDR_W); in snappercl15_nand_cmd_ctrl()
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| D | ts72xx.c | 91 __raw_writeb(cmd, chip->legacy.IO_ADDR_W); in ts72xx_nand_hwcontrol()
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| /linux-6.1.9/arch/arm/mach-omap1/ |
| D | board-nand.c | 31 writeb(cmd, this->legacy.IO_ADDR_W + mask); in omap1_nand_cmd_ctl()
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| /linux-6.1.9/arch/mips/alchemy/devboards/ |
| D | db1550.c | 134 unsigned long ioaddr = (unsigned long)this->legacy.IO_ADDR_W; in au1550_nand_cmd_ctrl()
146 this->legacy.IO_ADDR_R = this->legacy.IO_ADDR_W = (void __iomem *)ioaddr; in au1550_nand_cmd_ctrl()
148 __raw_writeb(cmd, this->legacy.IO_ADDR_W); in au1550_nand_cmd_ctrl()
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| D | db1300.c | 156 unsigned long ioaddr = (unsigned long)this->legacy.IO_ADDR_W; in au1300_nand_cmd_ctrl()
168 this->legacy.IO_ADDR_R = this->legacy.IO_ADDR_W = (void __iomem *)ioaddr; in au1300_nand_cmd_ctrl()
170 __raw_writeb(cmd, this->legacy.IO_ADDR_W); in au1300_nand_cmd_ctrl()
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| D | db1200.c | 191 unsigned long ioaddr = (unsigned long)this->legacy.IO_ADDR_W; in au1200_nand_cmd_ctrl()
203 this->legacy.IO_ADDR_R = this->legacy.IO_ADDR_W = (void __iomem *)ioaddr; in au1200_nand_cmd_ctrl()
205 __raw_writeb(cmd, this->legacy.IO_ADDR_W); in au1200_nand_cmd_ctrl()
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| /linux-6.1.9/arch/sh/boards/mach-migor/ |
| D | setup.c | 176 writeb(cmd, chip->legacy.IO_ADDR_W + 0x00400000); in migor_nand_flash_cmd_ctl()
178 writeb(cmd, chip->legacy.IO_ADDR_W + 0x00800000); in migor_nand_flash_cmd_ctl()
180 writeb(cmd, chip->legacy.IO_ADDR_W); in migor_nand_flash_cmd_ctl()
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| /linux-6.1.9/arch/arm/mach-orion5x/ |
| D | ts78xx-setup.c | 144 writeb(cmd, this->legacy.IO_ADDR_W); in ts78xx_ts_nand_cmd_ctrl()
155 void __iomem *io_base = chip->legacy.IO_ADDR_W; in ts78xx_ts_nand_write_buf()
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| /linux-6.1.9/arch/mips/rb532/ |
| D | devices.c | 151 writeb(cmd, chip->legacy.IO_ADDR_W); in rb532_cmd_ctrl()
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| /linux-6.1.9/arch/arm/mach-pxa/ |
| D | palmtx.c | 247 char __iomem *nandaddr = this->legacy.IO_ADDR_W; in palmtx_nand_cmd_ctl()
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| D | balloon3.c | 593 writeb(cmd, this->legacy.IO_ADDR_W); in balloon3_nand_cmd_ctl()
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| /linux-6.1.9/Documentation/driver-api/ |
| D | mtdnand.rst | 183 case NAND_CTL_SETCLE: this->legacy.IO_ADDR_W |= CLE_ADRR_BIT; break;
184 case NAND_CTL_CLRCLE: this->legacy.IO_ADDR_W &= ~CLE_ADRR_BIT; break;
185 case NAND_CTL_SETALE: this->legacy.IO_ADDR_W |= ALE_ADRR_BIT; break;
186 case NAND_CTL_CLRALE: this->legacy.IO_ADDR_W &= ~ALE_ADRR_BIT; break;
239 this->legacy.IO_ADDR_W = baseaddr;
342 this->legacy.IO_ADDR_W &= ~BOARD_NAND_ADDR_MASK;
346 this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIP0;
351 this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIPn;
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| /linux-6.1.9/include/linux/mtd/ |
| D | rawnand.h | 1138 void __iomem *IO_ADDR_W; member
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