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Searched refs:INTR_MASK (Results 1 – 17 of 17) sorted by relevance

/linux-6.1.9/drivers/crypto/marvell/octeontx2/
Dotx2_cptpf_main.c72 INTR_MASK(num_vfs)); in cptpf_enable_vf_flr_me_intrs()
76 RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(num_vfs)); in cptpf_enable_vf_flr_me_intrs()
79 INTR_MASK(num_vfs)); in cptpf_enable_vf_flr_me_intrs()
82 RVU_PF_VFME_INT_ENA_W1SX(0), INTR_MASK(num_vfs)); in cptpf_enable_vf_flr_me_intrs()
88 INTR_MASK(num_vfs - 64)); in cptpf_enable_vf_flr_me_intrs()
90 RVU_PF_VFFLR_INT_ENA_W1SX(1), INTR_MASK(num_vfs - 64)); in cptpf_enable_vf_flr_me_intrs()
93 INTR_MASK(num_vfs - 64)); in cptpf_enable_vf_flr_me_intrs()
95 RVU_PF_VFME_INT_ENA_W1SX(1), INTR_MASK(num_vfs - 64)); in cptpf_enable_vf_flr_me_intrs()
105 RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(num_vfs)); in cptpf_disable_vf_flr_me_intrs()
111 RVU_PF_VFME_INT_ENA_W1CX(0), INTR_MASK(num_vfs)); in cptpf_disable_vf_flr_me_intrs()
[all …]
/linux-6.1.9/drivers/net/ethernet/marvell/octeontx2/af/
Drvu.c2526 RVU_AF_PFAF_MBOX_INT, INTR_MASK(hw->total_pfs)); in rvu_enable_mbox_intr()
2530 INTR_MASK(hw->total_pfs) & ~1ULL); in rvu_enable_mbox_intr()
2768 INTR_MASK(rvu->hw->total_pfs) & ~1ULL); in rvu_unregister_interrupts()
2772 INTR_MASK(rvu->hw->total_pfs) & ~1ULL); in rvu_unregister_interrupts()
2776 INTR_MASK(rvu->hw->total_pfs) & ~1ULL); in rvu_unregister_interrupts()
2863 RVU_AF_PFFLR_INT, INTR_MASK(rvu->hw->total_pfs)); in rvu_register_interrupts()
2866 INTR_MASK(rvu->hw->total_pfs) & ~1ULL); in rvu_register_interrupts()
2883 RVU_AF_PFTRPEND, INTR_MASK(rvu->hw->total_pfs)); in rvu_register_interrupts()
2886 RVU_AF_PFME_INT, INTR_MASK(rvu->hw->total_pfs)); in rvu_register_interrupts()
2889 INTR_MASK(rvu->hw->total_pfs) & ~1ULL); in rvu_register_interrupts()
[all …]
Dmbox.h34 #define INTR_MASK(pfvfs) ((pfvfs < 64) ? (BIT_ULL(pfvfs) - 1) : (~0ull)) macro
/linux-6.1.9/drivers/net/ethernet/chelsio/cxgb3/
Dvsc8211.c71 #define INTR_MASK (CFG_CHG_INTR_MASK | VSC_INTR_TX_FIFO | VSC_INTR_RX_FIFO | \ macro
100 INTR_MASK); in vsc8211_intr_enable()
331 cause &= INTR_MASK; in vsc8211_intr_handler()
/linux-6.1.9/drivers/staging/qlge/
Dqlge_mpi.c222 qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); in qlge_idc_req_aen()
291 qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); in qlge_link_up()
537 qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); in qlge_mailbox_command()
603 qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI); in qlge_mailbox_command()
1239 qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); in qlge_mpi_work()
1253 qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI); in qlge_mpi_work()
Dqlge.h819 INTR_MASK = 0x38, enumerator
Dqlge_main.c2413 (qlge_read32(qdev, INTR_MASK) & INTR_MASK_PI)) { in qlge_isr()
2420 qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16)); in qlge_isr()
3581 qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI); in qlge_adapter_initialize()
/linux-6.1.9/drivers/usb/host/
Dehci-hcd.c94 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) macro
666 ehci_writel(ehci, INTR_MASK, in ehci_run()
737 masked_status = current_status & (INTR_MASK | STS_FLR); in ehci_irq()
750 if (current_status & INTR_MASK) in ehci_irq()
1187 int mask = INTR_MASK; in ehci_resume()
Dehci-hub.c358 mask = INTR_MASK; in ehci_bus_suspend()
506 ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable); in ehci_bus_resume()
Doxu210hp-hcd.c151 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) macro
2873 status &= INTR_MASK; in oxu210_hcd_irq()
3168 writel(INTR_MASK, &oxu->regs->intr_enable); /* Turn On Interrupts */ in oxu_run()
3920 mask = INTR_MASK; in oxu_bus_suspend()
4007 writel(INTR_MASK, &oxu->regs->intr_enable); in oxu_bus_resume()
Dfotg210-hcd.c78 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) macro
5071 fotg210_writel(fotg210, INTR_MASK, in fotg210_run()
5135 masked_status = status & (INTR_MASK | STS_FLR); in fotg210_irq()
/linux-6.1.9/drivers/net/ethernet/marvell/octeontx2/nic/
Dotx2_pf.c81 otx2_write64(pf, RVU_PF_VFME_INT_ENA_W1CX(0), INTR_MASK(vfs)); in otx2_disable_flr_me_intr()
86 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs)); in otx2_disable_flr_me_intr()
93 otx2_write64(pf, RVU_PF_VFME_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); in otx2_disable_flr_me_intr()
97 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); in otx2_disable_flr_me_intr()
249 otx2_write64(pf, RVU_PF_VFME_INTX(0), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
250 otx2_write64(pf, RVU_PF_VFME_INT_ENA_W1SX(0), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
253 otx2_write64(pf, RVU_PF_VFFLR_INTX(0), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
254 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
259 otx2_write64(pf, RVU_PF_VFME_INTX(1), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
261 INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
[all …]
/linux-6.1.9/drivers/net/ethernet/cavium/thunder/
Dnic_main.c103 #define INTR_MASK(vfs) ((vfs < 64) ? (BIT_ULL(vfs) - 1) : (~0ull)) in nic_enable_mbx_intr() macro
106 nic_reg_write(nic, NIC_PF_MAILBOX_INT, INTR_MASK(vf_cnt)); in nic_enable_mbx_intr()
109 nic_reg_write(nic, NIC_PF_MAILBOX_ENA_W1S, INTR_MASK(vf_cnt)); in nic_enable_mbx_intr()
113 INTR_MASK(vf_cnt - 64)); in nic_enable_mbx_intr()
115 INTR_MASK(vf_cnt - 64)); in nic_enable_mbx_intr()
/linux-6.1.9/drivers/input/keyboard/
Dspear-keyboard.c32 #define INTR_MASK 0x54 macro
/linux-6.1.9/drivers/gpu/drm/rockchip/
Drockchip_drm_vop.h240 #define INTR_MASK (DSP_HOLD_VALID_INTR | FS_INTR | \ macro
Drockchip_drm_vop.c1765 active_irqs = VOP_INTR_GET_TYPE(vop, status, INTR_MASK); in vop_isr()
2024 VOP_INTR_SET_TYPE(vop, clear, INTR_MASK, 1); in vop_initial()
2025 VOP_INTR_SET_TYPE(vop, enable, INTR_MASK, 0); in vop_initial()
/linux-6.1.9/drivers/net/phy/
Dbcm-phy-ptp.c66 #define INTR_MASK 0x085e macro