Searched refs:IMX7D_PLL_DRAM_MAIN (Results 1 – 2 of 2) sorted by relevance
56 #define IMX7D_PLL_DRAM_MAIN 47 macro
410 …hws[IMX7D_PLL_DRAM_MAIN] = imx_clk_hw_pllv3(IMX_PLLV3_DDR_IMX7, "pll_dram_main", "osc", base + 0x7… in imx7d_clocks_init()870 clk_set_parent(hws[IMX7D_PLL_DRAM_MAIN_BYPASS]->clk, hws[IMX7D_PLL_DRAM_MAIN]->clk); in imx7d_clocks_init()