Searched refs:IMX7D_ENET1_TIME_ROOT_CLK (Results 1 – 11 of 11) sorted by relevance
171 #define IMX7D_ENET1_TIME_ROOT_CLK 162 macro
58 <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
48 <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
110 <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
160 <&clks IMX7D_ENET1_TIME_ROOT_CLK>;164 <&clks IMX7D_ENET1_TIME_ROOT_CLK>,
122 <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
132 <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
218 <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
212 <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
1248 <&clks IMX7D_ENET1_TIME_ROOT_CLK>,
798 …hws[IMX7D_ENET1_TIME_ROOT_CLK] = imx_clk_hw_gate2_shared2("enet1_time_root_clk", "enet1_time_post_… in imx7d_clocks_init()