Searched refs:HSYNC (Results 1 – 25 of 31) sorted by relevance
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| /linux-6.1.9/drivers/gpu/drm/nouveau/dispnv50/ |
| D | dac507d.c | 37 sync |= NVVAL(NV507D, DAC_SET_POLARITY, HSYNC, asyh->or.nhsync); in dac507d_ctrl()
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| /linux-6.1.9/Documentation/devicetree/bindings/media/ |
| D | renesas,vin.yaml | 87 If both HSYNC and VSYNC polarities are not specified, embedded
93 If both HSYNC and VSYNC polarities are not specified, embedded
136 If both HSYNC and VSYNC polarities are not specified, embedded
142 If both HSYNC and VSYNC polarities are not specified, embedded
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| D | video-interfaces.yaml | 118 Active state of the HSYNC signal, 0/1 for LOW/HIGH respectively.
125 that if HSYNC and VSYNC polarities are not specified, embedded
132 Similar to HSYNC and VSYNC, specifies data line polarity.
138 Similar to HSYNC and VSYNC, specifies the data enable signal polarity.
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| /linux-6.1.9/Documentation/devicetree/bindings/media/i2c/ |
| D | tvp514x.txt | 17 - hsync-active: HSYNC Polarity configuration for endpoint.
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| D | tvp7002.txt | 10 - hsync-active: HSYNC Polarity configuration for the bus. Default value when
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| D | ov7670.txt | 13 - hsync-active: active state of the HSYNC signal, 0/1 for LOW/HIGH respectively.
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| D | st,st-mipid02.txt | 45 - hsync-active: active state of the HSYNC signal, 0/1 for LOW/HIGH respectively.
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| D | tvp5150.txt | 44 - hsync-active: Active state of the HSYNC signal. Must be <1> (HIGH).
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| /linux-6.1.9/drivers/video/fbdev/i810/ |
| D | i810_regs.h | 150 #define HSYNC 0x60008 macro
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| /linux-6.1.9/Documentation/fb/ |
| D | pxafb.rst | 39 hsynclen:HSYNC == LCCR1_HSW + 1
65 hsync:HSYNC, vsync:VSYNC
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| D | matroxfb.rst | 271 left:X left boundary: pixels between end of HSYNC pulse and first pixel.
273 right:X right boundary: pixels between end of picture and start of HSYNC
275 hslen:X length of HSYNC pulse, in pixels. Default is derived from `vesa`
279 sync:X sync. pulse - bit 0 inverts HSYNC polarity, bit 1 VSYNC polarity.
280 If bit 3 (value 0x08) is set, composite sync instead of HSYNC is
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| /linux-6.1.9/include/video/ |
| D | sstfb.h | 161 #define HSYNC 0x0220 macro
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| /linux-6.1.9/arch/arm/boot/dts/ |
| D | imx53-mba53.dts | 146 /* VGA_VSYNC, HSYNC with max drive strength */
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| D | am437x-sbc-t43.dts | 60 AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
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| D | imx6ul-tx6ul-mainboard.dts | 205 MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x10 /* HSYNC */
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| D | imx6ul-tx6ul.dtsi | 599 MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x10 /* HSYNC */
632 MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x10 /* HSYNC */
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| D | imx6qdl-kontron-samx6i.dtsi | 594 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x100f1 /* HSYNC */
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| D | am437x-sk-evm.dts | 372 AM4372_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */
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| D | at91sam9g45.dtsi | 283 AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* HSYNC */
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| /linux-6.1.9/Documentation/devicetree/bindings/display/exynos/ |
| D | exynos_dp.txt | 41 HSYNC polarity configuration.
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| /linux-6.1.9/drivers/gpu/drm/i915/ |
| D | intel_gvt_mmio_table.c | 221 MMIO_D(HSYNC(TRANSCODER_A)); in iterate_generic_mmio()
230 MMIO_D(HSYNC(TRANSCODER_B)); in iterate_generic_mmio()
239 MMIO_D(HSYNC(TRANSCODER_C)); in iterate_generic_mmio()
248 MMIO_D(HSYNC(TRANSCODER_EDP)); in iterate_generic_mmio()
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| /linux-6.1.9/drivers/gpu/drm/i2c/ |
| D | ch7006_mode.c | 122 .flags = DRM_MODE_FLAG_##hsynp##HSYNC | \
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| /linux-6.1.9/drivers/gpu/drm/i915/display/ |
| D | intel_pch_display.c | 225 intel_de_read(dev_priv, HSYNC(cpu_transcoder))); in ilk_pch_transcoder_set_timings()
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| /linux-6.1.9/drivers/pinctrl/renesas/ |
| D | pfc-sh7786.c | 524 GPIO_FN(HSYNC),
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| /linux-6.1.9/drivers/video/fbdev/ |
| D | sstfb.c | 535 sst_write(HSYNC, (par->hSyncOff - 1) << 16 | (info->var.hsync_len - 1)); in sstfb_set_par()
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