Searched refs:HPC3_ERST_CRESET (Results 1 – 2 of 2) sorted by relevance
132 #define HPC3_ERST_CRESET 0x1 /* Reset dma channel and external controller */ macro
131 hregs->reset = HPC3_ERST_CRESET | HPC3_ERST_CLRIRQ; in hpc3_eth_reset()