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Searched refs:HHI_PCIE_PLL_CNTL0 (Results 1 – 2 of 2) sorted by relevance

/linux-6.1.9/drivers/clk/meson/
Dg12a.h40 #define HHI_PCIE_PLL_CNTL0 0x098 macro
Dg12a.c1834 { .reg = HHI_PCIE_PLL_CNTL0, .def = 0x20090496 },
1835 { .reg = HHI_PCIE_PLL_CNTL0, .def = 0x30090496 },
1843 { .reg = HHI_PCIE_PLL_CNTL0, .def = 0x34090496 },
1844 { .reg = HHI_PCIE_PLL_CNTL0, .def = 0x14090496, .delay_us = 10 },
1857 .reg_off = HHI_PCIE_PLL_CNTL0,
1862 .reg_off = HHI_PCIE_PLL_CNTL0,
1867 .reg_off = HHI_PCIE_PLL_CNTL0,
1877 .reg_off = HHI_PCIE_PLL_CNTL0,
1882 .reg_off = HHI_PCIE_PLL_CNTL0,
1916 .offset = HHI_PCIE_PLL_CNTL0,