Searched refs:HDMI_CON3 (Results 1 – 1 of 1) sorted by relevance
45 #define HDMI_CON3 0x0c macro94 mtk_phy_clear_bits(base + HDMI_CON3, RG_HDMITX_MHLCK_EN); in mtk_hdmi_pll_prepare()179 mtk_phy_clear_bits(base + HDMI_CON3, RG_HDMITX_PRD_IMP_EN); in mtk_hdmi_pll_set_rate()184 mtk_phy_set_bits(base + HDMI_CON3, RG_HDMITX_PRD_IMP_EN); in mtk_hdmi_pll_set_rate()196 mtk_phy_update_field(base + HDMI_CON3, RG_HDMITX_DRV_IMP_EN, imp_en); in mtk_hdmi_pll_set_rate()232 mtk_phy_set_bits(hdmi_phy->regs + HDMI_CON3, in mtk_hdmi_phy_enable_tmds()240 mtk_phy_clear_bits(hdmi_phy->regs + HDMI_CON3, in mtk_hdmi_phy_disable_tmds()