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Searched refs:HDMI_ACR_PACKET_CONTROL (Results 1 – 15 of 15) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce/ !
Ddce_stream_encoder.h76 SRI(HDMI_ACR_PACKET_CONTROL, DIG, id),\
179 SE_SF(HDMI_ACR_PACKET_CONTROL, HDMI_ACR_AUTO_SEND, mask_sh),\
180 SE_SF(HDMI_ACR_PACKET_CONTROL, HDMI_ACR_SOURCE, mask_sh),\
181 SE_SF(HDMI_ACR_PACKET_CONTROL, HDMI_ACR_AUDIO_PRIORITY, mask_sh),\
677 uint32_t HDMI_ACR_PACKET_CONTROL; member
Ddce_stream_encoder.c1282 REG_UPDATE_3(HDMI_ACR_PACKET_CONTROL, in dce110_se_setup_hdmi_audio()
/linux-6.1.9/drivers/gpu/drm/radeon/ !
Devergreen_hdmi.c81 WREG32(HDMI_ACR_PACKET_CONTROL + offset, in evergreen_hdmi_update_acr()
84 WREG32(HDMI_ACR_PACKET_CONTROL + offset, in evergreen_hdmi_update_acr()
Drv770d.h693 #define HDMI_ACR_PACKET_CONTROL 0x740c macro
Devergreend.h538 #define HDMI_ACR_PACKET_CONTROL 0x703c macro
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn10/ !
Ddcn10_stream_encoder.h67 SRI(HDMI_ACR_PACKET_CONTROL, DIG, id),\
161 uint32_t HDMI_ACR_PACKET_CONTROL; member
Ddcn10_stream_encoder.c1261 REG_UPDATE_3(HDMI_ACR_PACKET_CONTROL, in enc1_se_setup_hdmi_audio()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn32/ !
Ddcn32_dio_stream_encoder.h55 SRI(HDMI_ACR_PACKET_CONTROL, DIG, id),\
Ddcn32_resource.h246 SRI_ARR(HDMI_ACR_PACKET_CONTROL, DIG, id), \
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn314/ !
Ddcn314_dio_stream_encoder.h70 SRI(HDMI_ACR_PACKET_CONTROL, DIG, id),\
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn30/ !
Ddcn30_dio_stream_encoder.h69 SRI(HDMI_ACR_PACKET_CONTROL, DIG, id),\
Ddcn30_dio_stream_encoder.c737 REG_UPDATE_3(HDMI_ACR_PACKET_CONTROL, in enc3_se_setup_hdmi_audio()
/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/ !
Ddce_v10_0.c1675 tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_SOURCE, 0); in dce_v10_0_afmt_setmode()
1678 tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_SOURCE, 1); in dce_v10_0_afmt_setmode()
1680 tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_AUTO_SEND, 1); in dce_v10_0_afmt_setmode()
Ddce_v11_0.c1717 tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_SOURCE, 0); in dce_v11_0_afmt_setmode()
1720 tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_SOURCE, 1); in dce_v11_0_afmt_setmode()
1722 tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_AUTO_SEND, 1); in dce_v11_0_afmt_setmode()
Ddce_v6_0.c1418 tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_AUTO_SEND, 1); in dce_v6_0_audio_set_acr()
1419 tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_SOURCE, in dce_v6_0_audio_set_acr()