1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright 1998-2011 VIA Technologies, Inc. All Rights Reserved.
4  * Copyright 2001-2011 S3 Graphics, Inc. All Rights Reserved.
5  */
6 
7 #ifndef VIA_3D_REG_H
8 #define VIA_3D_REG_H
9 #define HC_REG_BASE             0x0400
10 
11 #define HC_REG_TRANS_SPACE      0x0040
12 
13 #define HC_ParaN_MASK           0xffffffff
14 #define HC_Para_MASK            0x00ffffff
15 #define HC_SubA_MASK            0xff000000
16 #define HC_SubA_SHIFT           24
17 /* Transmission Setting
18  */
19 #define HC_REG_TRANS_SET        0x003c
20 #define HC_ParaSubType_MASK     0xff000000
21 #define HC_ParaType_MASK        0x00ff0000
22 #define HC_ParaOS_MASK          0x0000ff00
23 #define HC_ParaAdr_MASK         0x000000ff
24 #define HC_ParaSubType_SHIFT    24
25 #define HC_ParaType_SHIFT       16
26 #define HC_ParaOS_SHIFT         8
27 #define HC_ParaAdr_SHIFT        0
28 
29 #define HC_ParaType_CmdVdata    0x0000
30 #define HC_ParaType_NotTex      0x0001
31 #define HC_ParaType_Tex         0x0002
32 #define HC_ParaType_Palette     0x0003
33 #define HC_ParaType_PreCR       0x0010
34 #define HC_ParaType_Auto        0x00fe
35 #define INV_ParaType_Dummy          0x00300000
36 
37 /* Transmission Space
38  */
39 #define HC_REG_Hpara0           0x0040
40 #define HC_REG_HpataAF          0x02fc
41 
42 /* Read
43  */
44 #define HC_REG_HREngSt          0x0000
45 #define HC_REG_HRFIFOempty      0x0004
46 #define HC_REG_HRFIFOfull       0x0008
47 #define HC_REG_HRErr            0x000c
48 #define HC_REG_FIFOstatus       0x0010
49 /* HC_REG_HREngSt          0x0000
50  */
51 #define HC_HDASZC_MASK          0x00010000
52 #define HC_HSGEMI_MASK          0x0000f000
53 #define HC_HLGEMISt_MASK        0x00000f00
54 #define HC_HCRSt_MASK           0x00000080
55 #define HC_HSE0St_MASK          0x00000040
56 #define HC_HSE1St_MASK          0x00000020
57 #define HC_HPESt_MASK           0x00000010
58 #define HC_HXESt_MASK           0x00000008
59 #define HC_HBESt_MASK           0x00000004
60 #define HC_HE2St_MASK           0x00000002
61 #define HC_HE3St_MASK           0x00000001
62 /* HC_REG_HRFIFOempty      0x0004
63  */
64 #define HC_HRZDempty_MASK       0x00000010
65 #define HC_HRTXAempty_MASK      0x00000008
66 #define HC_HRTXDempty_MASK      0x00000004
67 #define HC_HWZDempty_MASK       0x00000002
68 #define HC_HWCDempty_MASK       0x00000001
69 /* HC_REG_HRFIFOfull       0x0008
70  */
71 #define HC_HRZDfull_MASK        0x00000010
72 #define HC_HRTXAfull_MASK       0x00000008
73 #define HC_HRTXDfull_MASK       0x00000004
74 #define HC_HWZDfull_MASK        0x00000002
75 #define HC_HWCDfull_MASK        0x00000001
76 /* HC_REG_HRErr            0x000c
77  */
78 #define HC_HAGPCMErr_MASK       0x80000000
79 #define HC_HAGPCMErrC_MASK      0x70000000
80 /* HC_REG_FIFOstatus       0x0010
81  */
82 #define HC_HRFIFOATall_MASK     0x80000000
83 #define HC_HRFIFOATbusy_MASK    0x40000000
84 #define HC_HRATFGMDo_MASK       0x00000100
85 #define HC_HRATFGMDi_MASK       0x00000080
86 #define HC_HRATFRZD_MASK        0x00000040
87 #define HC_HRATFRTXA_MASK       0x00000020
88 #define HC_HRATFRTXD_MASK       0x00000010
89 #define HC_HRATFWZD_MASK        0x00000008
90 #define HC_HRATFWCD_MASK        0x00000004
91 #define HC_HRATTXTAG_MASK       0x00000002
92 #define HC_HRATTXCH_MASK        0x00000001
93 
94 /* AGP Command Setting
95  */
96 #define HC_SubA_HAGPBstL        0x0060
97 #define HC_SubA_HAGPBendL       0x0061
98 #define HC_SubA_HAGPCMNT        0x0062
99 #define HC_SubA_HAGPBpL         0x0063
100 #define HC_SubA_HAGPBpH         0x0064
101 /* HC_SubA_HAGPCMNT        0x0062
102  */
103 #define HC_HAGPCMNT_MASK        0x00800000
104 #define HC_HCmdErrClr_MASK      0x00400000
105 #define HC_HAGPBendH_MASK       0x0000ff00
106 #define HC_HAGPBstH_MASK        0x000000ff
107 #define HC_HAGPBendH_SHIFT      8
108 #define HC_HAGPBstH_SHIFT       0
109 /* HC_SubA_HAGPBpL         0x0063
110  */
111 #define HC_HAGPBpL_MASK         0x00fffffc
112 #define HC_HAGPBpID_MASK        0x00000003
113 #define HC_HAGPBpID_PAUSE       0x00000000
114 #define HC_HAGPBpID_JUMP        0x00000001
115 #define HC_HAGPBpID_STOP        0x00000002
116 /* HC_SubA_HAGPBpH         0x0064
117  */
118 #define HC_HAGPBpH_MASK         0x00ffffff
119 
120 /* Miscellaneous Settings
121  */
122 #define HC_SubA_HClipTB         0x0070
123 #define HC_SubA_HClipLR         0x0071
124 #define HC_SubA_HFPClipTL       0x0072
125 #define HC_SubA_HFPClipBL       0x0073
126 #define HC_SubA_HFPClipLL       0x0074
127 #define HC_SubA_HFPClipRL       0x0075
128 #define HC_SubA_HFPClipTBH      0x0076
129 #define HC_SubA_HFPClipLRH      0x0077
130 #define HC_SubA_HLP             0x0078
131 #define HC_SubA_HLPRF           0x0079
132 #define HC_SubA_HSolidCL        0x007a
133 #define HC_SubA_HPixGC          0x007b
134 #define HC_SubA_HSPXYOS         0x007c
135 #define HC_SubA_HVertexCNT      0x007d
136 
137 #define HC_HClipT_MASK          0x00fff000
138 #define HC_HClipT_SHIFT         12
139 #define HC_HClipB_MASK          0x00000fff
140 #define HC_HClipB_SHIFT         0
141 #define HC_HClipL_MASK          0x00fff000
142 #define HC_HClipL_SHIFT         12
143 #define HC_HClipR_MASK          0x00000fff
144 #define HC_HClipR_SHIFT         0
145 #define HC_HFPClipBH_MASK       0x0000ff00
146 #define HC_HFPClipBH_SHIFT      8
147 #define HC_HFPClipTH_MASK       0x000000ff
148 #define HC_HFPClipTH_SHIFT      0
149 #define HC_HFPClipRH_MASK       0x0000ff00
150 #define HC_HFPClipRH_SHIFT      8
151 #define HC_HFPClipLH_MASK       0x000000ff
152 #define HC_HFPClipLH_SHIFT      0
153 #define HC_HSolidCH_MASK        0x000000ff
154 #define HC_HPixGC_MASK          0x00800000
155 #define HC_HSPXOS_MASK          0x00fff000
156 #define HC_HSPXOS_SHIFT         12
157 #define HC_HSPYOS_MASK          0x00000fff
158 
159 /*
160  * Command A
161  */
162 #define HC_HCmdHeader_MASK      0xfe000000  /*0xffe00000 */
163 #define HC_HE3Fire_MASK         0x00100000
164 #define HC_HPMType_MASK         0x000f0000
165 #define HC_HEFlag_MASK          0x0000e000
166 #define HC_HShading_MASK        0x00001c00
167 #define HC_HPMValidN_MASK       0x00000200
168 #define HC_HPLEND_MASK          0x00000100
169 #define HC_HVCycle_MASK         0x000000ff
170 #define HC_HVCycle_Style_MASK   0x000000c0
171 #define HC_HVCycle_ChgA_MASK    0x00000030
172 #define HC_HVCycle_ChgB_MASK    0x0000000c
173 #define HC_HVCycle_ChgC_MASK    0x00000003
174 #define HC_HPMType_Point        0x00000000
175 #define HC_HPMType_Line         0x00010000
176 #define HC_HPMType_Tri          0x00020000
177 #define HC_HPMType_TriWF        0x00040000
178 #define HC_HEFlag_NoAA          0x00000000
179 #define HC_HEFlag_ab            0x00008000
180 #define HC_HEFlag_bc            0x00004000
181 #define HC_HEFlag_ca            0x00002000
182 #define HC_HShading_Solid       0x00000000
183 #define HC_HShading_FlatA       0x00000400
184 #define HC_HShading_FlatB       0x00000800
185 #define HC_HShading_FlatC       0x00000c00
186 #define HC_HShading_Gouraud     0x00001000
187 #define HC_HVCycle_Full         0x00000000
188 #define HC_HVCycle_AFP          0x00000040
189 #define HC_HVCycle_One          0x000000c0
190 #define HC_HVCycle_NewA         0x00000000
191 #define HC_HVCycle_AA           0x00000010
192 #define HC_HVCycle_AB           0x00000020
193 #define HC_HVCycle_AC           0x00000030
194 #define HC_HVCycle_NewB         0x00000000
195 #define HC_HVCycle_BA           0x00000004
196 #define HC_HVCycle_BB           0x00000008
197 #define HC_HVCycle_BC           0x0000000c
198 #define HC_HVCycle_NewC         0x00000000
199 #define HC_HVCycle_CA           0x00000001
200 #define HC_HVCycle_CB           0x00000002
201 #define HC_HVCycle_CC           0x00000003
202 
203 /* Command B
204  */
205 #define HC_HLPrst_MASK          0x00010000
206 #define HC_HLLastP_MASK         0x00008000
207 #define HC_HVPMSK_MASK          0x00007f80
208 #define HC_HBFace_MASK          0x00000040
209 #define HC_H2nd1VT_MASK         0x0000003f
210 #define HC_HVPMSK_X             0x00004000
211 #define HC_HVPMSK_Y             0x00002000
212 #define HC_HVPMSK_Z             0x00001000
213 #define HC_HVPMSK_W             0x00000800
214 #define HC_HVPMSK_Cd            0x00000400
215 #define HC_HVPMSK_Cs            0x00000200
216 #define HC_HVPMSK_S             0x00000100
217 #define HC_HVPMSK_T             0x00000080
218 
219 /* Enable Setting
220  */
221 #define HC_SubA_HEnable         0x0000
222 #define HC_HenForce1P_MASK      0x00800000  /* [Force 1 Pipe] */
223 #define HC_HenZDCheck_MASK      0x00400000  /* [Z dirty bit settings] */
224 #define HC_HenTXEnvMap_MASK     0x00200000
225 #define HC_HenVertexCNT_MASK    0x00100000
226 #define HC_HenCPUDAZ_MASK       0x00080000
227 #define HC_HenDASZWC_MASK       0x00040000
228 #define HC_HenFBCull_MASK       0x00020000
229 #define HC_HenCW_MASK           0x00010000
230 #define HC_HenAA_MASK           0x00008000
231 #define HC_HenST_MASK           0x00004000
232 #define HC_HenZT_MASK           0x00002000
233 #define HC_HenZW_MASK           0x00001000
234 #define HC_HenAT_MASK           0x00000800
235 #define HC_HenAW_MASK           0x00000400
236 #define HC_HenSP_MASK           0x00000200
237 #define HC_HenLP_MASK           0x00000100
238 #define HC_HenTXCH_MASK         0x00000080
239 #define HC_HenTXMP_MASK         0x00000040
240 #define HC_HenTXPP_MASK         0x00000020
241 #define HC_HenTXTR_MASK         0x00000010
242 #define HC_HenCS_MASK           0x00000008
243 #define HC_HenFOG_MASK          0x00000004
244 #define HC_HenABL_MASK          0x00000002
245 #define HC_HenDT_MASK           0x00000001
246 
247 /* Z Setting
248  */
249 #define HC_SubA_HZWBBasL        0x0010
250 #define HC_SubA_HZWBBasH        0x0011
251 #define HC_SubA_HZWBType        0x0012
252 #define HC_SubA_HZBiasL         0x0013
253 #define HC_SubA_HZWBend         0x0014
254 #define HC_SubA_HZWTMD          0x0015
255 #define HC_SubA_HZWCDL          0x0016
256 #define HC_SubA_HZWCTAGnum      0x0017
257 #define HC_SubA_HZCYNum         0x0018
258 #define HC_SubA_HZWCFire        0x0019
259 /* HC_SubA_HZWBType
260  */
261 #define HC_HZWBType_MASK        0x00800000
262 #define HC_HZBiasedWB_MASK      0x00400000
263 #define HC_HZONEasFF_MASK       0x00200000
264 #define HC_HZOONEasFF_MASK      0x00100000
265 #define HC_HZWBFM_MASK          0x00030000
266 #define HC_HZWBLoc_MASK         0x0000c000
267 #define HC_HZWBPit_MASK         0x00003fff
268 #define HC_HZWBFM_16            0x00000000
269 #define HC_HZWBFM_32            0x00020000
270 #define HC_HZWBFM_24            0x00030000
271 #define HC_HZWBLoc_Local        0x00000000
272 #define HC_HZWBLoc_SyS          0x00004000
273 /* HC_SubA_HZWBend
274  */
275 #define HC_HZWBend_MASK         0x00ffe000
276 #define HC_HZBiasH_MASK         0x000000ff
277 #define HC_HZWBend_SHIFT        10
278 /* HC_SubA_HZWTMD
279  */
280 #define HC_HZWTMD_MASK          0x00070000
281 #define HC_HEBEBias_MASK        0x00007f00
282 #define HC_HZNF_MASK            0x000000ff
283 #define HC_HZWTMD_NeverPass     0x00000000
284 #define HC_HZWTMD_LT            0x00010000
285 #define HC_HZWTMD_EQ            0x00020000
286 #define HC_HZWTMD_LE            0x00030000
287 #define HC_HZWTMD_GT            0x00040000
288 #define HC_HZWTMD_NE            0x00050000
289 #define HC_HZWTMD_GE            0x00060000
290 #define HC_HZWTMD_AllPass       0x00070000
291 #define HC_HEBEBias_SHIFT       8
292 /* HC_SubA_HZWCDL          0x0016
293  */
294 #define HC_HZWCDL_MASK          0x00ffffff
295 /* HC_SubA_HZWCTAGnum      0x0017
296  */
297 #define HC_HZWCTAGnum_MASK      0x00ff0000
298 #define HC_HZWCTAGnum_SHIFT     16
299 #define HC_HZWCDH_MASK          0x000000ff
300 #define HC_HZWCDH_SHIFT         0
301 /* HC_SubA_HZCYNum         0x0018
302  */
303 #define HC_HZCYNum_MASK         0x00030000
304 #define HC_HZCYNum_SHIFT        16
305 #define HC_HZWCQWnum_MASK       0x00003fff
306 #define HC_HZWCQWnum_SHIFT      0
307 /* HC_SubA_HZWCFire        0x0019
308  */
309 #define HC_ZWCFire_MASK         0x00010000
310 #define HC_HZWCQWnumLast_MASK   0x00003fff
311 #define HC_HZWCQWnumLast_SHIFT  0
312 
313 /* Stencil Setting
314  */
315 #define HC_SubA_HSTREF          0x0023
316 #define HC_SubA_HSTMD           0x0024
317 /* HC_SubA_HSBFM
318  */
319 #define HC_HSBFM_MASK           0x00030000
320 #define HC_HSBLoc_MASK          0x0000c000
321 #define HC_HSBPit_MASK          0x00003fff
322 /* HC_SubA_HSTREF
323  */
324 #define HC_HSTREF_MASK          0x00ff0000
325 #define HC_HSTOPMSK_MASK        0x0000ff00
326 #define HC_HSTBMSK_MASK         0x000000ff
327 #define HC_HSTREF_SHIFT         16
328 #define HC_HSTOPMSK_SHIFT       8
329 /* HC_SubA_HSTMD
330  */
331 #define HC_HSTMD_MASK           0x00070000
332 #define HC_HSTOPSF_MASK         0x000001c0
333 #define HC_HSTOPSPZF_MASK       0x00000038
334 #define HC_HSTOPSPZP_MASK       0x00000007
335 #define HC_HSTMD_NeverPass      0x00000000
336 #define HC_HSTMD_LT             0x00010000
337 #define HC_HSTMD_EQ             0x00020000
338 #define HC_HSTMD_LE             0x00030000
339 #define HC_HSTMD_GT             0x00040000
340 #define HC_HSTMD_NE             0x00050000
341 #define HC_HSTMD_GE             0x00060000
342 #define HC_HSTMD_AllPass        0x00070000
343 #define HC_HSTOPSF_KEEP         0x00000000
344 #define HC_HSTOPSF_ZERO         0x00000040
345 #define HC_HSTOPSF_REPLACE      0x00000080
346 #define HC_HSTOPSF_INCRSAT      0x000000c0
347 #define HC_HSTOPSF_DECRSAT      0x00000100
348 #define HC_HSTOPSF_INVERT       0x00000140
349 #define HC_HSTOPSF_INCR         0x00000180
350 #define HC_HSTOPSF_DECR         0x000001c0
351 #define HC_HSTOPSPZF_KEEP       0x00000000
352 #define HC_HSTOPSPZF_ZERO       0x00000008
353 #define HC_HSTOPSPZF_REPLACE    0x00000010
354 #define HC_HSTOPSPZF_INCRSAT    0x00000018
355 #define HC_HSTOPSPZF_DECRSAT    0x00000020
356 #define HC_HSTOPSPZF_INVERT     0x00000028
357 #define HC_HSTOPSPZF_INCR       0x00000030
358 #define HC_HSTOPSPZF_DECR       0x00000038
359 #define HC_HSTOPSPZP_KEEP       0x00000000
360 #define HC_HSTOPSPZP_ZERO       0x00000001
361 #define HC_HSTOPSPZP_REPLACE    0x00000002
362 #define HC_HSTOPSPZP_INCRSAT    0x00000003
363 #define HC_HSTOPSPZP_DECRSAT    0x00000004
364 #define HC_HSTOPSPZP_INVERT     0x00000005
365 #define HC_HSTOPSPZP_INCR       0x00000006
366 #define HC_HSTOPSPZP_DECR       0x00000007
367 
368 /* Alpha Setting
369  */
370 #define HC_SubA_HABBasL         0x0030
371 #define HC_SubA_HABBasH         0x0031
372 #define HC_SubA_HABFM           0x0032
373 #define HC_SubA_HATMD           0x0033
374 #define HC_SubA_HABLCsat        0x0034
375 #define HC_SubA_HABLCop         0x0035
376 #define HC_SubA_HABLAsat        0x0036
377 #define HC_SubA_HABLAop         0x0037
378 #define HC_SubA_HABLRCa         0x0038
379 #define HC_SubA_HABLRFCa        0x0039
380 #define HC_SubA_HABLRCbias      0x003a
381 #define HC_SubA_HABLRCb         0x003b
382 #define HC_SubA_HABLRFCb        0x003c
383 #define HC_SubA_HABLRAa         0x003d
384 #define HC_SubA_HABLRAb         0x003e
385 /* HC_SubA_HABFM
386  */
387 #define HC_HABFM_MASK           0x00030000
388 #define HC_HABLoc_MASK          0x0000c000
389 #define HC_HABPit_MASK          0x000007ff
390 /* HC_SubA_HATMD
391  */
392 #define HC_HATMD_MASK           0x00000700
393 #define HC_HATREF_MASK          0x000000ff
394 #define HC_HATMD_NeverPass      0x00000000
395 #define HC_HATMD_LT             0x00000100
396 #define HC_HATMD_EQ             0x00000200
397 #define HC_HATMD_LE             0x00000300
398 #define HC_HATMD_GT             0x00000400
399 #define HC_HATMD_NE             0x00000500
400 #define HC_HATMD_GE             0x00000600
401 #define HC_HATMD_AllPass        0x00000700
402 /* HC_SubA_HABLCsat
403  */
404 #define HC_HABLCsat_MASK        0x00010000
405 #define HC_HABLCa_MASK          0x0000fc00
406 #define HC_HABLCa_C_MASK        0x0000c000
407 #define HC_HABLCa_OPC_MASK      0x00003c00
408 #define HC_HABLFCa_MASK         0x000003f0
409 #define HC_HABLFCa_C_MASK       0x00000300
410 #define HC_HABLFCa_OPC_MASK     0x000000f0
411 #define HC_HABLCbias_MASK       0x0000000f
412 #define HC_HABLCbias_C_MASK     0x00000008
413 #define HC_HABLCbias_OPC_MASK   0x00000007
414 /*-- Define the input color.
415  */
416 #define HC_XC_Csrc              0x00000000
417 #define HC_XC_Cdst              0x00000001
418 #define HC_XC_Asrc              0x00000002
419 #define HC_XC_Adst              0x00000003
420 #define HC_XC_Fog               0x00000004
421 #define HC_XC_HABLRC            0x00000005
422 #define HC_XC_minSrcDst         0x00000006
423 #define HC_XC_maxSrcDst         0x00000007
424 #define HC_XC_mimAsrcInvAdst    0x00000008
425 #define HC_XC_OPC               0x00000000
426 #define HC_XC_InvOPC            0x00000010
427 #define HC_XC_OPCp5             0x00000020
428 /*-- Define the input Alpha
429  */
430 #define HC_XA_OPA               0x00000000
431 #define HC_XA_InvOPA            0x00000010
432 #define HC_XA_OPAp5             0x00000020
433 #define HC_XA_0                 0x00000000
434 #define HC_XA_Asrc              0x00000001
435 #define HC_XA_Adst              0x00000002
436 #define HC_XA_Fog               0x00000003
437 #define HC_XA_minAsrcFog        0x00000004
438 #define HC_XA_minAsrcAdst       0x00000005
439 #define HC_XA_maxAsrcFog        0x00000006
440 #define HC_XA_maxAsrcAdst       0x00000007
441 #define HC_XA_HABLRA            0x00000008
442 #define HC_XA_minAsrcInvAdst    0x00000008
443 #define HC_XA_HABLFRA           0x00000009
444 /*--
445  */
446 #define HC_HABLCa_OPC           (HC_XC_OPC << 10)
447 #define HC_HABLCa_InvOPC        (HC_XC_InvOPC << 10)
448 #define HC_HABLCa_OPCp5         (HC_XC_OPCp5 << 10)
449 #define HC_HABLCa_Csrc          (HC_XC_Csrc << 10)
450 #define HC_HABLCa_Cdst          (HC_XC_Cdst << 10)
451 #define HC_HABLCa_Asrc          (HC_XC_Asrc << 10)
452 #define HC_HABLCa_Adst          (HC_XC_Adst << 10)
453 #define HC_HABLCa_Fog           (HC_XC_Fog << 10)
454 #define HC_HABLCa_HABLRCa       (HC_XC_HABLRC << 10)
455 #define HC_HABLCa_minSrcDst     (HC_XC_minSrcDst << 10)
456 #define HC_HABLCa_maxSrcDst     (HC_XC_maxSrcDst << 10)
457 #define HC_HABLFCa_OPC              (HC_XC_OPC << 4)
458 #define HC_HABLFCa_InvOPC           (HC_XC_InvOPC << 4)
459 #define HC_HABLFCa_OPCp5            (HC_XC_OPCp5 << 4)
460 #define HC_HABLFCa_Csrc             (HC_XC_Csrc << 4)
461 #define HC_HABLFCa_Cdst             (HC_XC_Cdst << 4)
462 #define HC_HABLFCa_Asrc             (HC_XC_Asrc << 4)
463 #define HC_HABLFCa_Adst             (HC_XC_Adst << 4)
464 #define HC_HABLFCa_Fog              (HC_XC_Fog << 4)
465 #define HC_HABLFCa_HABLRCa          (HC_XC_HABLRC << 4)
466 #define HC_HABLFCa_minSrcDst        (HC_XC_minSrcDst << 4)
467 #define HC_HABLFCa_maxSrcDst        (HC_XC_maxSrcDst << 4)
468 #define HC_HABLFCa_mimAsrcInvAdst   (HC_XC_mimAsrcInvAdst << 4)
469 #define HC_HABLCbias_HABLRCbias 0x00000000
470 #define HC_HABLCbias_Asrc       0x00000001
471 #define HC_HABLCbias_Adst       0x00000002
472 #define HC_HABLCbias_Fog        0x00000003
473 #define HC_HABLCbias_Cin        0x00000004
474 /* HC_SubA_HABLCop         0x0035
475  */
476 #define HC_HABLdot_MASK         0x00010000
477 #define HC_HABLCop_MASK         0x00004000
478 #define HC_HABLCb_MASK          0x00003f00
479 #define HC_HABLCb_C_MASK        0x00003000
480 #define HC_HABLCb_OPC_MASK      0x00000f00
481 #define HC_HABLFCb_MASK         0x000000fc
482 #define HC_HABLFCb_C_MASK       0x000000c0
483 #define HC_HABLFCb_OPC_MASK     0x0000003c
484 #define HC_HABLCshift_MASK      0x00000003
485 #define HC_HABLCb_OPC           (HC_XC_OPC << 8)
486 #define HC_HABLCb_InvOPC        (HC_XC_InvOPC << 8)
487 #define HC_HABLCb_OPCp5         (HC_XC_OPCp5 << 8)
488 #define HC_HABLCb_Csrc          (HC_XC_Csrc << 8)
489 #define HC_HABLCb_Cdst          (HC_XC_Cdst << 8)
490 #define HC_HABLCb_Asrc          (HC_XC_Asrc << 8)
491 #define HC_HABLCb_Adst          (HC_XC_Adst << 8)
492 #define HC_HABLCb_Fog           (HC_XC_Fog << 8)
493 #define HC_HABLCb_HABLRCa       (HC_XC_HABLRC << 8)
494 #define HC_HABLCb_minSrcDst     (HC_XC_minSrcDst << 8)
495 #define HC_HABLCb_maxSrcDst     (HC_XC_maxSrcDst << 8)
496 #define HC_HABLFCb_OPC              (HC_XC_OPC << 2)
497 #define HC_HABLFCb_InvOPC           (HC_XC_InvOPC << 2)
498 #define HC_HABLFCb_OPCp5            (HC_XC_OPCp5 << 2)
499 #define HC_HABLFCb_Csrc             (HC_XC_Csrc << 2)
500 #define HC_HABLFCb_Cdst             (HC_XC_Cdst << 2)
501 #define HC_HABLFCb_Asrc             (HC_XC_Asrc << 2)
502 #define HC_HABLFCb_Adst             (HC_XC_Adst << 2)
503 #define HC_HABLFCb_Fog              (HC_XC_Fog << 2)
504 #define HC_HABLFCb_HABLRCb          (HC_XC_HABLRC << 2)
505 #define HC_HABLFCb_minSrcDst        (HC_XC_minSrcDst << 2)
506 #define HC_HABLFCb_maxSrcDst        (HC_XC_maxSrcDst << 2)
507 #define HC_HABLFCb_mimAsrcInvAdst   (HC_XC_mimAsrcInvAdst << 2)
508 /* HC_SubA_HABLAsat        0x0036
509  */
510 #define HC_HABLAsat_MASK        0x00010000
511 #define HC_HABLAa_MASK          0x0000fc00
512 #define HC_HABLAa_A_MASK        0x0000c000
513 #define HC_HABLAa_OPA_MASK      0x00003c00
514 #define HC_HABLFAa_MASK         0x000003f0
515 #define HC_HABLFAa_A_MASK       0x00000300
516 #define HC_HABLFAa_OPA_MASK     0x000000f0
517 #define HC_HABLAbias_MASK       0x0000000f
518 #define HC_HABLAbias_A_MASK     0x00000008
519 #define HC_HABLAbias_OPA_MASK   0x00000007
520 #define HC_HABLAa_OPA           (HC_XA_OPA << 10)
521 #define HC_HABLAa_InvOPA        (HC_XA_InvOPA << 10)
522 #define HC_HABLAa_OPAp5         (HC_XA_OPAp5 << 10)
523 #define HC_HABLAa_0             (HC_XA_0 << 10)
524 #define HC_HABLAa_Asrc          (HC_XA_Asrc << 10)
525 #define HC_HABLAa_Adst          (HC_XA_Adst << 10)
526 #define HC_HABLAa_Fog           (HC_XA_Fog << 10)
527 #define HC_HABLAa_minAsrcFog    (HC_XA_minAsrcFog << 10)
528 #define HC_HABLAa_minAsrcAdst   (HC_XA_minAsrcAdst << 10)
529 #define HC_HABLAa_maxAsrcFog    (HC_XA_maxAsrcFog << 10)
530 #define HC_HABLAa_maxAsrcAdst   (HC_XA_maxAsrcAdst << 10)
531 #define HC_HABLAa_HABLRA        (HC_XA_HABLRA << 10)
532 #define HC_HABLFAa_OPA          (HC_XA_OPA << 4)
533 #define HC_HABLFAa_InvOPA       (HC_XA_InvOPA << 4)
534 #define HC_HABLFAa_OPAp5        (HC_XA_OPAp5 << 4)
535 #define HC_HABLFAa_0            (HC_XA_0 << 4)
536 #define HC_HABLFAa_Asrc         (HC_XA_Asrc << 4)
537 #define HC_HABLFAa_Adst         (HC_XA_Adst << 4)
538 #define HC_HABLFAa_Fog          (HC_XA_Fog << 4)
539 #define HC_HABLFAa_minAsrcFog   (HC_XA_minAsrcFog << 4)
540 #define HC_HABLFAa_minAsrcAdst  (HC_XA_minAsrcAdst << 4)
541 #define HC_HABLFAa_maxAsrcFog   (HC_XA_maxAsrcFog << 4)
542 #define HC_HABLFAa_maxAsrcAdst  (HC_XA_maxAsrcAdst << 4)
543 #define HC_HABLFAa_minAsrcInvAdst   (HC_XA_minAsrcInvAdst << 4)
544 #define HC_HABLFAa_HABLFRA          (HC_XA_HABLFRA << 4)
545 #define HC_HABLAbias_HABLRAbias 0x00000000
546 #define HC_HABLAbias_Asrc       0x00000001
547 #define HC_HABLAbias_Adst       0x00000002
548 #define HC_HABLAbias_Fog        0x00000003
549 #define HC_HABLAbias_Aaa        0x00000004
550 /* HC_SubA_HABLAop         0x0037
551  */
552 #define HC_HABLAop_MASK         0x00004000
553 #define HC_HABLAb_MASK          0x00003f00
554 #define HC_HABLAb_OPA_MASK      0x00000f00
555 #define HC_HABLFAb_MASK         0x000000fc
556 #define HC_HABLFAb_OPA_MASK     0x0000003c
557 #define HC_HABLAshift_MASK      0x00000003
558 #define HC_HABLAb_OPA           (HC_XA_OPA << 8)
559 #define HC_HABLAb_InvOPA        (HC_XA_InvOPA << 8)
560 #define HC_HABLAb_OPAp5         (HC_XA_OPAp5 << 8)
561 #define HC_HABLAb_0             (HC_XA_0 << 8)
562 #define HC_HABLAb_Asrc          (HC_XA_Asrc << 8)
563 #define HC_HABLAb_Adst          (HC_XA_Adst << 8)
564 #define HC_HABLAb_Fog           (HC_XA_Fog << 8)
565 #define HC_HABLAb_minAsrcFog    (HC_XA_minAsrcFog << 8)
566 #define HC_HABLAb_minAsrcAdst   (HC_XA_minAsrcAdst << 8)
567 #define HC_HABLAb_maxAsrcFog    (HC_XA_maxAsrcFog << 8)
568 #define HC_HABLAb_maxAsrcAdst   (HC_XA_maxAsrcAdst << 8)
569 #define HC_HABLAb_HABLRA        (HC_XA_HABLRA << 8)
570 #define HC_HABLFAb_OPA          (HC_XA_OPA << 2)
571 #define HC_HABLFAb_InvOPA       (HC_XA_InvOPA << 2)
572 #define HC_HABLFAb_OPAp5        (HC_XA_OPAp5 << 2)
573 #define HC_HABLFAb_0            (HC_XA_0 << 2)
574 #define HC_HABLFAb_Asrc         (HC_XA_Asrc << 2)
575 #define HC_HABLFAb_Adst         (HC_XA_Adst << 2)
576 #define HC_HABLFAb_Fog          (HC_XA_Fog << 2)
577 #define HC_HABLFAb_minAsrcFog   (HC_XA_minAsrcFog << 2)
578 #define HC_HABLFAb_minAsrcAdst  (HC_XA_minAsrcAdst << 2)
579 #define HC_HABLFAb_maxAsrcFog   (HC_XA_maxAsrcFog << 2)
580 #define HC_HABLFAb_maxAsrcAdst  (HC_XA_maxAsrcAdst << 2)
581 #define HC_HABLFAb_minAsrcInvAdst   (HC_XA_minAsrcInvAdst << 2)
582 #define HC_HABLFAb_HABLFRA          (HC_XA_HABLFRA << 2)
583 /* HC_SubA_HABLRAa         0x003d
584  */
585 #define HC_HABLRAa_MASK         0x00ff0000
586 #define HC_HABLRFAa_MASK        0x0000ff00
587 #define HC_HABLRAbias_MASK      0x000000ff
588 #define HC_HABLRAa_SHIFT        16
589 #define HC_HABLRFAa_SHIFT       8
590 /* HC_SubA_HABLRAb         0x003e
591  */
592 #define HC_HABLRAb_MASK         0x0000ff00
593 #define HC_HABLRFAb_MASK        0x000000ff
594 #define HC_HABLRAb_SHIFT        8
595 
596 /* Destination Setting
597  */
598 #define HC_SubA_HDBBasL         0x0040
599 #define HC_SubA_HDBBasH         0x0041
600 #define HC_SubA_HDBFM           0x0042
601 #define HC_SubA_HFBBMSKL        0x0043
602 #define HC_SubA_HROP            0x0044
603 /* HC_SubA_HDBFM           0x0042
604  */
605 #define HC_HDBFM_MASK           0x001f0000
606 #define HC_HDBLoc_MASK          0x0000c000
607 #define HC_HDBPit_MASK          0x00003fff
608 #define HC_HDBFM_RGB555         0x00000000
609 #define HC_HDBFM_RGB565         0x00010000
610 #define HC_HDBFM_ARGB4444       0x00020000
611 #define HC_HDBFM_ARGB1555       0x00030000
612 #define HC_HDBFM_BGR555         0x00040000
613 #define HC_HDBFM_BGR565         0x00050000
614 #define HC_HDBFM_ABGR4444       0x00060000
615 #define HC_HDBFM_ABGR1555       0x00070000
616 #define HC_HDBFM_ARGB0888       0x00080000
617 #define HC_HDBFM_ARGB8888       0x00090000
618 #define HC_HDBFM_ABGR0888       0x000a0000
619 #define HC_HDBFM_ABGR8888       0x000b0000
620 #define HC_HDBLoc_Local         0x00000000
621 #define HC_HDBLoc_Sys           0x00004000
622 /* HC_SubA_HROP            0x0044
623  */
624 #define HC_HROP_MASK            0x00000f00
625 #define HC_HFBBMSKH_MASK        0x000000ff
626 #define HC_HROP_BLACK           0x00000000
627 #define HC_HROP_DPon            0x00000100
628 #define HC_HROP_DPna            0x00000200
629 #define HC_HROP_Pn              0x00000300
630 #define HC_HROP_PDna            0x00000400
631 #define HC_HROP_Dn              0x00000500
632 #define HC_HROP_DPx             0x00000600
633 #define HC_HROP_DPan            0x00000700
634 #define HC_HROP_DPa             0x00000800
635 #define HC_HROP_DPxn            0x00000900
636 #define HC_HROP_D               0x00000a00
637 #define HC_HROP_DPno            0x00000b00
638 #define HC_HROP_P               0x00000c00
639 #define HC_HROP_PDno            0x00000d00
640 #define HC_HROP_DPo             0x00000e00
641 #define HC_HROP_WHITE           0x00000f00
642 
643 /* Fog Setting
644  */
645 #define HC_SubA_HFogLF          0x0050
646 #define HC_SubA_HFogCL          0x0051
647 #define HC_SubA_HFogCH          0x0052
648 #define HC_SubA_HFogStL         0x0053
649 #define HC_SubA_HFogStH         0x0054
650 #define HC_SubA_HFogOOdMF       0x0055
651 #define HC_SubA_HFogOOdEF       0x0056
652 #define HC_SubA_HFogEndL        0x0057
653 #define HC_SubA_HFogDenst       0x0058
654 /* HC_SubA_FogLF           0x0050
655  */
656 #define HC_FogLF_MASK           0x00000010
657 #define HC_FogEq_MASK           0x00000008
658 #define HC_FogMD_MASK           0x00000007
659 #define HC_FogMD_LocalFog        0x00000000
660 #define HC_FogMD_LinearFog       0x00000002
661 #define HC_FogMD_ExponentialFog  0x00000004
662 #define HC_FogMD_Exponential2Fog 0x00000005
663 /* #define HC_FogMD_FogTable       0x00000003 */
664 
665 /* HC_SubA_HFogDenst        0x0058
666  */
667 #define HC_FogDenst_MASK        0x001fff00
668 #define HC_FogEndL_MASK         0x000000ff
669 
670 /* Texture subtype definitions
671  */
672 #define HC_SubType_Samp0        0x00000020
673 #define HC_SubType_Samp1        0x00000021
674 
675 
676 /* Texture subtype definitions
677  */
678 #define HC_SubType_Tex0         0x00000000
679 #define HC_SubType_Tex1         0x00000001
680 #define HC_SubType_TexGeneral   0x000000fe
681 
682 /* Attribute of texture n
683  */
684 #define HC_SubA_HTXnL0BasL      0x0000
685 #define HC_SubA_HTXnL1BasL      0x0001
686 #define HC_SubA_HTXnL2BasL      0x0002
687 #define HC_SubA_HTXnL3BasL      0x0003
688 #define HC_SubA_HTXnL4BasL      0x0004
689 #define HC_SubA_HTXnL5BasL      0x0005
690 #define HC_SubA_HTXnL6BasL      0x0006
691 #define HC_SubA_HTXnL7BasL      0x0007
692 #define HC_SubA_HTXnL8BasL      0x0008
693 #define HC_SubA_HTXnL9BasL      0x0009
694 #define HC_SubA_HTXnLaBasL      0x000a
695 #define HC_SubA_HTXnLbBasL      0x000b
696 #define HC_SubA_HTXnLcBasL      0x000c
697 #define HC_SubA_HTXnLdBasL      0x000d
698 #define HC_SubA_HTXnLeBasL      0x000e
699 #define HC_SubA_HTXnLfBasL      0x000f
700 #define HC_SubA_HTXnL10BasL     0x0010
701 #define HC_SubA_HTXnL11BasL     0x0011
702 #define HC_SubA_HTXnL012BasH    0x0020
703 #define HC_SubA_HTXnL345BasH    0x0021
704 #define HC_SubA_HTXnL678BasH    0x0022
705 #define HC_SubA_HTXnL9abBasH    0x0023
706 #define HC_SubA_HTXnLcdeBasH    0x0024
707 #define HC_SubA_HTXnLf1011BasH  0x0025
708 #define HC_SubA_HTXnL0Pit       0x002b
709 #define HC_SubA_HTXnL1Pit       0x002c
710 #define HC_SubA_HTXnL2Pit       0x002d
711 #define HC_SubA_HTXnL3Pit       0x002e
712 #define HC_SubA_HTXnL4Pit       0x002f
713 #define HC_SubA_HTXnL5Pit       0x0030
714 #define HC_SubA_HTXnL6Pit       0x0031
715 #define HC_SubA_HTXnL7Pit       0x0032
716 #define HC_SubA_HTXnL8Pit       0x0033
717 #define HC_SubA_HTXnL9Pit       0x0034
718 #define HC_SubA_HTXnLaPit       0x0035
719 #define HC_SubA_HTXnLbPit       0x0036
720 #define HC_SubA_HTXnLcPit       0x0037
721 #define HC_SubA_HTXnLdPit       0x0038
722 #define HC_SubA_HTXnLePit       0x0039
723 #define HC_SubA_HTXnLfPit       0x003a
724 #define HC_SubA_HTXnL10Pit      0x003b
725 #define HC_SubA_HTXnL11Pit      0x003c
726 #define HC_SubA_HTXnL0_5WE      0x004b
727 #define HC_SubA_HTXnL6_bWE      0x004c
728 #define HC_SubA_HTXnLc_11WE     0x004d
729 #define HC_SubA_HTXnL0_5HE      0x0051
730 #define HC_SubA_HTXnL6_bHE      0x0052
731 #define HC_SubA_HTXnLc_11HE     0x0053
732 #define HC_SubA_HTXnL0OS        0x0077
733 #define HC_SubA_HTXnTB          0x0078
734 #define HC_SubA_HTXnMPMD        0x0079
735 #define HC_SubA_HTXnCLODu       0x007a
736 #define HC_SubA_HTXnFM          0x007b
737 #define HC_SubA_HTXnTRCH        0x007c
738 #define HC_SubA_HTXnTRCL        0x007d
739 #define HC_SubA_HTXnTBC         0x007e
740 #define HC_SubA_HTXnTRAH        0x007f
741 #define HC_SubA_HTXnTBLCsat     0x0080
742 #define HC_SubA_HTXnTBLCop      0x0081
743 #define HC_SubA_HTXnTBLMPfog    0x0082
744 #define HC_SubA_HTXnTBLAsat     0x0083
745 #define HC_SubA_HTXnTBLRCa      0x0085
746 #define HC_SubA_HTXnTBLRCb      0x0086
747 #define HC_SubA_HTXnTBLRCc      0x0087
748 #define HC_SubA_HTXnTBLRCbias   0x0088
749 #define HC_SubA_HTXnTBLRAa      0x0089
750 #define HC_SubA_HTXnTBLRFog     0x008a
751 #define HC_SubA_HTXnBumpM00     0x0090
752 #define HC_SubA_HTXnBumpM01     0x0091
753 #define HC_SubA_HTXnBumpM10     0x0092
754 #define HC_SubA_HTXnBumpM11     0x0093
755 #define HC_SubA_HTXnLScale      0x0094
756 
757 #define HC_SubA_HTXSMD             0x0000
758 #define HC_SubA_HTXYUV2RGB1        0x0001
759 #define HC_SubA_HTXYUV2RGB2        0x0002
760 #define HC_SubA_HTXYUV2RGB3        0x0003
761 #define HTXYUV2RGB4BT601           (1<<23)
762 #define HTXYUV2RGB4BT709           (1<<22)
763 /* HC_SubA_HTXnL012BasH    0x0020
764  */
765 #define HC_HTXnL0BasH_MASK      0x000000ff
766 #define HC_HTXnL1BasH_MASK      0x0000ff00
767 #define HC_HTXnL2BasH_MASK      0x00ff0000
768 #define HC_HTXnL1BasH_SHIFT     8
769 #define HC_HTXnL2BasH_SHIFT     16
770 /* HC_SubA_HTXnL345BasH    0x0021
771  */
772 #define HC_HTXnL3BasH_MASK      0x000000ff
773 #define HC_HTXnL4BasH_MASK      0x0000ff00
774 #define HC_HTXnL5BasH_MASK      0x00ff0000
775 #define HC_HTXnL4BasH_SHIFT     8
776 #define HC_HTXnL5BasH_SHIFT     16
777 /* HC_SubA_HTXnL678BasH    0x0022
778  */
779 #define HC_HTXnL6BasH_MASK      0x000000ff
780 #define HC_HTXnL7BasH_MASK      0x0000ff00
781 #define HC_HTXnL8BasH_MASK      0x00ff0000
782 #define HC_HTXnL7BasH_SHIFT     8
783 #define HC_HTXnL8BasH_SHIFT     16
784 /* HC_SubA_HTXnL9abBasH    0x0023
785  */
786 #define HC_HTXnL9BasH_MASK      0x000000ff
787 #define HC_HTXnLaBasH_MASK      0x0000ff00
788 #define HC_HTXnLbBasH_MASK      0x00ff0000
789 #define HC_HTXnLaBasH_SHIFT     8
790 #define HC_HTXnLbBasH_SHIFT     16
791 /* HC_SubA_HTXnLcdeBasH    0x0024
792  */
793 #define HC_HTXnLcBasH_MASK      0x000000ff
794 #define HC_HTXnLdBasH_MASK      0x0000ff00
795 #define HC_HTXnLeBasH_MASK      0x00ff0000
796 #define HC_HTXnLdBasH_SHIFT     8
797 #define HC_HTXnLeBasH_SHIFT     16
798 /* HC_SubA_HTXnLcdeBasH    0x0025
799  */
800 #define HC_HTXnLfBasH_MASK      0x000000ff
801 #define HC_HTXnL10BasH_MASK      0x0000ff00
802 #define HC_HTXnL11BasH_MASK      0x00ff0000
803 #define HC_HTXnL10BasH_SHIFT     8
804 #define HC_HTXnL11BasH_SHIFT     16
805 /* HC_SubA_HTXnL0Pit       0x002b
806  */
807 #define HC_HTXnLnPit_MASK       0x00003fff
808 #define HC_HTXnEnPit_MASK       0x00080000
809 #define HC_HTXnLnPitE_MASK      0x00f00000
810 #define HC_HTXnLnPitE_SHIFT     20
811 /* HC_SubA_HTXnL0_5WE      0x004b
812  */
813 #define HC_HTXnL0WE_MASK        0x0000000f
814 #define HC_HTXnL1WE_MASK        0x000000f0
815 #define HC_HTXnL2WE_MASK        0x00000f00
816 #define HC_HTXnL3WE_MASK        0x0000f000
817 #define HC_HTXnL4WE_MASK        0x000f0000
818 #define HC_HTXnL5WE_MASK        0x00f00000
819 #define HC_HTXnL1WE_SHIFT       4
820 #define HC_HTXnL2WE_SHIFT       8
821 #define HC_HTXnL3WE_SHIFT       12
822 #define HC_HTXnL4WE_SHIFT       16
823 #define HC_HTXnL5WE_SHIFT       20
824 /* HC_SubA_HTXnL6_bWE      0x004c
825  */
826 #define HC_HTXnL6WE_MASK        0x0000000f
827 #define HC_HTXnL7WE_MASK        0x000000f0
828 #define HC_HTXnL8WE_MASK        0x00000f00
829 #define HC_HTXnL9WE_MASK        0x0000f000
830 #define HC_HTXnLaWE_MASK        0x000f0000
831 #define HC_HTXnLbWE_MASK        0x00f00000
832 #define HC_HTXnL7WE_SHIFT       4
833 #define HC_HTXnL8WE_SHIFT       8
834 #define HC_HTXnL9WE_SHIFT       12
835 #define HC_HTXnLaWE_SHIFT       16
836 #define HC_HTXnLbWE_SHIFT       20
837 /* HC_SubA_HTXnLc_11WE      0x004d
838  */
839 #define HC_HTXnLcWE_MASK        0x0000000f
840 #define HC_HTXnLdWE_MASK        0x000000f0
841 #define HC_HTXnLeWE_MASK        0x00000f00
842 #define HC_HTXnLfWE_MASK        0x0000f000
843 #define HC_HTXnL10WE_MASK       0x000f0000
844 #define HC_HTXnL11WE_MASK       0x00f00000
845 #define HC_HTXnLdWE_SHIFT       4
846 #define HC_HTXnLeWE_SHIFT       8
847 #define HC_HTXnLfWE_SHIFT       12
848 #define HC_HTXnL10WE_SHIFT      16
849 #define HC_HTXnL11WE_SHIFT      20
850 /* HC_SubA_HTXnL0_5HE      0x0051
851  */
852 #define HC_HTXnL0HE_MASK        0x0000000f
853 #define HC_HTXnL1HE_MASK        0x000000f0
854 #define HC_HTXnL2HE_MASK        0x00000f00
855 #define HC_HTXnL3HE_MASK        0x0000f000
856 #define HC_HTXnL4HE_MASK        0x000f0000
857 #define HC_HTXnL5HE_MASK        0x00f00000
858 #define HC_HTXnL1HE_SHIFT       4
859 #define HC_HTXnL2HE_SHIFT       8
860 #define HC_HTXnL3HE_SHIFT       12
861 #define HC_HTXnL4HE_SHIFT       16
862 #define HC_HTXnL5HE_SHIFT       20
863 /* HC_SubA_HTXnL6_bHE      0x0052
864  */
865 #define HC_HTXnL6HE_MASK        0x0000000f
866 #define HC_HTXnL7HE_MASK        0x000000f0
867 #define HC_HTXnL8HE_MASK        0x00000f00
868 #define HC_HTXnL9HE_MASK        0x0000f000
869 #define HC_HTXnLaHE_MASK        0x000f0000
870 #define HC_HTXnLbHE_MASK        0x00f00000
871 #define HC_HTXnL7HE_SHIFT       4
872 #define HC_HTXnL8HE_SHIFT       8
873 #define HC_HTXnL9HE_SHIFT       12
874 #define HC_HTXnLaHE_SHIFT       16
875 #define HC_HTXnLbHE_SHIFT       20
876 /* HC_SubA_HTXnLc_11HE      0x0053
877  */
878 #define HC_HTXnLcHE_MASK        0x0000000f
879 #define HC_HTXnLdHE_MASK        0x000000f0
880 #define HC_HTXnLeHE_MASK        0x00000f00
881 #define HC_HTXnLfHE_MASK        0x0000f000
882 #define HC_HTXnL10HE_MASK       0x000f0000
883 #define HC_HTXnL11HE_MASK       0x00f00000
884 #define HC_HTXnLdHE_SHIFT       4
885 #define HC_HTXnLeHE_SHIFT       8
886 #define HC_HTXnLfHE_SHIFT       12
887 #define HC_HTXnL10HE_SHIFT      16
888 #define HC_HTXnL11HE_SHIFT      20
889 /* HC_SubA_HTXnL0OS        0x0077
890  */
891 #define HC_HTXnL0OS_MASK        0x003ff000
892 #define HC_HTXnLVmax_MASK       0x00000fc0
893 #define HC_HTXnLVmin_MASK       0x0000003f
894 #define HC_HTXnL0OS_SHIFT       12
895 #define HC_HTXnLVmax_SHIFT      6
896 /* HC_SubA_HTXnTB          0x0078
897  */
898 #define HC_HTXnTB_MASK          0x00f00000
899 #define HC_HTXnFLSe_MASK        0x0000e000
900 #define HC_HTXnFLSs_MASK        0x00001c00
901 #define HC_HTXnFLTe_MASK        0x00000380
902 #define HC_HTXnFLTs_MASK        0x00000070
903 #define HC_HTXnFLDs_MASK        0x0000000f
904 #define HC_HTXnTB_NoTB          0x00000000
905 #define HC_HTXnTB_TBC_S         0x00100000
906 #define HC_HTXnTB_TBC_T         0x00200000
907 #define HC_HTXnTB_TB_S          0x00400000
908 #define HC_HTXnTB_TB_T          0x00800000
909 #define HC_HTXnFLSe_Nearest     0x00000000
910 #define HC_HTXnFLSe_Linear      0x00002000
911 #define HC_HTXnFLSe_NonLinear   0x00004000
912 #define HC_HTXnFLSe_Sharp       0x00008000
913 #define HC_HTXnFLSe_Flat_Gaussian_Cubic 0x0000c000
914 #define HC_HTXnFLSs_Nearest     0x00000000
915 #define HC_HTXnFLSs_Linear      0x00000400
916 #define HC_HTXnFLSs_NonLinear   0x00000800
917 #define HC_HTXnFLSs_Flat_Gaussian_Cubic 0x00001800
918 #define HC_HTXnFLTe_Nearest     0x00000000
919 #define HC_HTXnFLTe_Linear      0x00000080
920 #define HC_HTXnFLTe_NonLinear   0x00000100
921 #define HC_HTXnFLTe_Sharp       0x00000180
922 #define HC_HTXnFLTe_Flat_Gaussian_Cubic 0x00000300
923 #define HC_HTXnFLTs_Nearest     0x00000000
924 #define HC_HTXnFLTs_Linear      0x00000010
925 #define HC_HTXnFLTs_NonLinear   0x00000020
926 #define HC_HTXnFLTs_Flat_Gaussian_Cubic 0x00000060
927 #define HC_HTXnFLDs_Tex0        0x00000000
928 #define HC_HTXnFLDs_Nearest     0x00000001
929 #define HC_HTXnFLDs_Linear      0x00000002
930 #define HC_HTXnFLDs_NonLinear   0x00000003
931 #define HC_HTXnFLDs_Dither      0x00000004
932 #define HC_HTXnFLDs_ConstLOD    0x00000005
933 #define HC_HTXnFLDs_Ani         0x00000006
934 #define HC_HTXnFLDs_AniDither   0x00000007
935 /* HC_SubA_HTXnMPMD        0x0079
936  */
937 #define HC_HTXnMPMD_SMASK       0x00070000
938 #define HC_HTXnMPMD_TMASK       0x00380000
939 #define HC_HTXnLODDTf_MASK      0x00000007
940 #define HC_HTXnXY2ST_MASK       0x00000008
941 #define HC_HTXnMPMD_Tsingle     0x00000000
942 #define HC_HTXnMPMD_Tclamp      0x00080000
943 #define HC_HTXnMPMD_Trepeat     0x00100000
944 #define HC_HTXnMPMD_Tmirror     0x00180000
945 #define HC_HTXnMPMD_Twrap       0x00200000
946 #define HC_HTXnMPMD_Ssingle     0x00000000
947 #define HC_HTXnMPMD_Sclamp      0x00010000
948 #define HC_HTXnMPMD_Srepeat     0x00020000
949 #define HC_HTXnMPMD_Smirror     0x00030000
950 #define HC_HTXnMPMD_Swrap       0x00040000
951 /* HC_SubA_HTXnCLODu       0x007a
952  */
953 #define HC_HTXnCLODu_MASK       0x000ffc00
954 #define HC_HTXnCLODd_MASK       0x000003ff
955 #define HC_HTXnCLODu_SHIFT      10
956 /* HC_SubA_HTXnFM          0x007b
957  */
958 #define HC_HTXnFM_MASK          0x00ff0000
959 #define HC_HTXnLoc_MASK         0x00000003
960 #define HC_HTXnFM_INDEX         0x00000000
961 #define HC_HTXnFM_Intensity     0x00080000
962 #define HC_HTXnFM_Lum           0x00100000
963 #define HC_HTXnFM_Alpha         0x00180000
964 #define HC_HTXnFM_DX            0x00280000
965 #define HC_HTXnFM_YUV           0x00300000
966 #define HC_HTXnFM_ARGB16        0x00880000
967 #define HC_HTXnFM_ARGB32        0x00980000
968 #define HC_HTXnFM_ABGR16        0x00a80000
969 #define HC_HTXnFM_ABGR32        0x00b80000
970 #define HC_HTXnFM_RGBA16        0x00c80000
971 #define HC_HTXnFM_RGBA32        0x00d80000
972 #define HC_HTXnFM_BGRA16        0x00e80000
973 #define HC_HTXnFM_BGRA32        0x00f80000
974 #define HC_HTXnFM_BUMPMAP       0x00380000
975 #define HC_HTXnFM_Index1        (HC_HTXnFM_INDEX     | 0x00000000)
976 #define HC_HTXnFM_Index2        (HC_HTXnFM_INDEX     | 0x00010000)
977 #define HC_HTXnFM_Index4        (HC_HTXnFM_INDEX     | 0x00020000)
978 #define HC_HTXnFM_Index8        (HC_HTXnFM_INDEX     | 0x00030000)
979 #define HC_HTXnFM_T1            (HC_HTXnFM_Intensity | 0x00000000)
980 #define HC_HTXnFM_T2            (HC_HTXnFM_Intensity | 0x00010000)
981 #define HC_HTXnFM_T4            (HC_HTXnFM_Intensity | 0x00020000)
982 #define HC_HTXnFM_T8            (HC_HTXnFM_Intensity | 0x00030000)
983 #define HC_HTXnFM_L1            (HC_HTXnFM_Lum       | 0x00000000)
984 #define HC_HTXnFM_L2            (HC_HTXnFM_Lum       | 0x00010000)
985 #define HC_HTXnFM_L4            (HC_HTXnFM_Lum       | 0x00020000)
986 #define HC_HTXnFM_L8            (HC_HTXnFM_Lum       | 0x00030000)
987 #define HC_HTXnFM_AL44          (HC_HTXnFM_Lum       | 0x00040000)
988 #define HC_HTXnFM_AL88          (HC_HTXnFM_Lum       | 0x00050000)
989 #define HC_HTXnFM_A1            (HC_HTXnFM_Alpha     | 0x00000000)
990 #define HC_HTXnFM_A2            (HC_HTXnFM_Alpha     | 0x00010000)
991 #define HC_HTXnFM_A4            (HC_HTXnFM_Alpha     | 0x00020000)
992 #define HC_HTXnFM_A8            (HC_HTXnFM_Alpha     | 0x00030000)
993 #define HC_HTXnFM_DX1           (HC_HTXnFM_DX        | 0x00010000)
994 #define HC_HTXnFM_DX23          (HC_HTXnFM_DX        | 0x00020000)
995 #define HC_HTXnFM_DX45          (HC_HTXnFM_DX        | 0x00030000)
996 /* YUV package mode */
997 #define HC_HTXnFM_YUY2          (HC_HTXnFM_YUV           | 0x00000000)
998 /* YUV planner mode */
999 #define HC_HTXnFM_YV12          (HC_HTXnFM_YUV           | 0x00040000)
1000 /* YUV planner mode */
1001 #define HC_HTXnFM_IYUV          (HC_HTXnFM_YUV           | 0x00040000)
1002 #define HC_HTXnFM_RGB555        (HC_HTXnFM_ARGB16    | 0x00000000)
1003 #define HC_HTXnFM_RGB565        (HC_HTXnFM_ARGB16    | 0x00010000)
1004 #define HC_HTXnFM_ARGB1555      (HC_HTXnFM_ARGB16    | 0x00020000)
1005 #define HC_HTXnFM_ARGB4444      (HC_HTXnFM_ARGB16    | 0x00030000)
1006 #define HC_HTXnFM_ARGB0888      (HC_HTXnFM_ARGB32    | 0x00000000)
1007 #define HC_HTXnFM_ARGB8888      (HC_HTXnFM_ARGB32    | 0x00010000)
1008 #define HC_HTXnFM_BGR555        (HC_HTXnFM_ABGR16    | 0x00000000)
1009 #define HC_HTXnFM_BGR565        (HC_HTXnFM_ABGR16    | 0x00010000)
1010 #define HC_HTXnFM_ABGR1555      (HC_HTXnFM_ABGR16    | 0x00020000)
1011 #define HC_HTXnFM_ABGR4444      (HC_HTXnFM_ABGR16    | 0x00030000)
1012 #define HC_HTXnFM_ABGR0888      (HC_HTXnFM_ABGR32    | 0x00000000)
1013 #define HC_HTXnFM_ABGR8888      (HC_HTXnFM_ABGR32    | 0x00010000)
1014 #define HC_HTXnFM_RGBA5550      (HC_HTXnFM_RGBA16    | 0x00000000)
1015 #define HC_HTXnFM_RGBA5551      (HC_HTXnFM_RGBA16    | 0x00020000)
1016 #define HC_HTXnFM_RGBA4444      (HC_HTXnFM_RGBA16    | 0x00030000)
1017 #define HC_HTXnFM_RGBA8880      (HC_HTXnFM_RGBA32    | 0x00000000)
1018 #define HC_HTXnFM_RGBA8888      (HC_HTXnFM_RGBA32    | 0x00010000)
1019 #define HC_HTXnFM_BGRA5550      (HC_HTXnFM_BGRA16    | 0x00000000)
1020 #define HC_HTXnFM_BGRA5551      (HC_HTXnFM_BGRA16    | 0x00020000)
1021 #define HC_HTXnFM_BGRA4444      (HC_HTXnFM_BGRA16    | 0x00030000)
1022 #define HC_HTXnFM_BGRA8880      (HC_HTXnFM_BGRA32    | 0x00000000)
1023 #define HC_HTXnFM_BGRA8888      (HC_HTXnFM_BGRA32    | 0x00010000)
1024 #define HC_HTXnFM_VU88          (HC_HTXnFM_BUMPMAP   | 0x00000000)
1025 #define HC_HTXnFM_LVU655        (HC_HTXnFM_BUMPMAP   | 0x00010000)
1026 #define HC_HTXnFM_LVU888        (HC_HTXnFM_BUMPMAP   | 0x00020000)
1027 #define HC_HTXnLoc_Local        0x00000000
1028 #define HC_HTXnLoc_Sys          0x00000002
1029 #define HC_HTXnLoc_AGP          0x00000003
1030 
1031 /* Video Texture */
1032 #define HC_HTXnYUV2RGBMode_RGB          0x00000000
1033 #define HC_HTXnYUV2RGBMode_SDTV         0x00000001
1034 #define HC_HTXnYUV2RGBMode_HDTV         0x00000002
1035 #define HC_HTXnYUV2RGBMode_TABLE        0x00000003
1036 
1037 /* HC_SubA_HTXnTRAH        0x007f
1038  */
1039 #define HC_HTXnTRAH_MASK        0x00ff0000
1040 #define HC_HTXnTRAL_MASK        0x0000ff00
1041 #define HC_HTXnTBA_MASK         0x000000ff
1042 #define HC_HTXnTRAH_SHIFT       16
1043 #define HC_HTXnTRAL_SHIFT       8
1044 /* HC_SubA_HTXnTBLCsat     0x0080
1045  *-- Define the input texture.
1046  */
1047 #define HC_XTC_TOPC             0x00000000
1048 #define HC_XTC_InvTOPC          0x00000010
1049 #define HC_XTC_TOPCp5           0x00000020
1050 #define HC_XTC_Cbias            0x00000000
1051 #define HC_XTC_InvCbias         0x00000010
1052 #define HC_XTC_0                0x00000000
1053 #define HC_XTC_Dif              0x00000001
1054 #define HC_XTC_Spec             0x00000002
1055 #define HC_XTC_Tex              0x00000003
1056 #define HC_XTC_Cur              0x00000004
1057 #define HC_XTC_Adif             0x00000005
1058 #define HC_XTC_Fog              0x00000006
1059 #define HC_XTC_Atex             0x00000007
1060 #define HC_XTC_Acur             0x00000008
1061 #define HC_XTC_HTXnTBLRC        0x00000009
1062 #define HC_XTC_Ctexnext         0x0000000a
1063 /*--
1064  */
1065 #define HC_HTXnTBLCsat_MASK     0x00800000
1066 #define HC_HTXnTBLCa_MASK       0x000fc000
1067 #define HC_HTXnTBLCb_MASK       0x00001f80
1068 #define HC_HTXnTBLCc_MASK       0x0000003f
1069 #define HC_HTXnTBLCa_TOPC       (HC_XTC_TOPC << 14)
1070 #define HC_HTXnTBLCa_InvTOPC    (HC_XTC_InvTOPC << 14)
1071 #define HC_HTXnTBLCa_TOPCp5     (HC_XTC_TOPCp5 << 14)
1072 #define HC_HTXnTBLCa_0          (HC_XTC_0 << 14)
1073 #define HC_HTXnTBLCa_Dif        (HC_XTC_Dif << 14)
1074 #define HC_HTXnTBLCa_Spec       (HC_XTC_Spec << 14)
1075 #define HC_HTXnTBLCa_Tex        (HC_XTC_Tex << 14)
1076 #define HC_HTXnTBLCa_Cur        (HC_XTC_Cur << 14)
1077 #define HC_HTXnTBLCa_Adif       (HC_XTC_Adif << 14)
1078 #define HC_HTXnTBLCa_Fog        (HC_XTC_Fog << 14)
1079 #define HC_HTXnTBLCa_Atex       (HC_XTC_Atex << 14)
1080 #define HC_HTXnTBLCa_Acur       (HC_XTC_Acur << 14)
1081 #define HC_HTXnTBLCa_HTXnTBLRC  (HC_XTC_HTXnTBLRC << 14)
1082 #define HC_HTXnTBLCa_Ctexnext   (HC_XTC_Ctexnext << 14)
1083 #define HC_HTXnTBLCb_TOPC       (HC_XTC_TOPC << 7)
1084 #define HC_HTXnTBLCb_InvTOPC    (HC_XTC_InvTOPC << 7)
1085 #define HC_HTXnTBLCb_TOPCp5     (HC_XTC_TOPCp5 << 7)
1086 #define HC_HTXnTBLCb_0          (HC_XTC_0 << 7)
1087 #define HC_HTXnTBLCb_Dif        (HC_XTC_Dif << 7)
1088 #define HC_HTXnTBLCb_Spec       (HC_XTC_Spec << 7)
1089 #define HC_HTXnTBLCb_Tex        (HC_XTC_Tex << 7)
1090 #define HC_HTXnTBLCb_Cur        (HC_XTC_Cur << 7)
1091 #define HC_HTXnTBLCb_Adif       (HC_XTC_Adif << 7)
1092 #define HC_HTXnTBLCb_Fog        (HC_XTC_Fog << 7)
1093 #define HC_HTXnTBLCb_Atex       (HC_XTC_Atex << 7)
1094 #define HC_HTXnTBLCb_Acur       (HC_XTC_Acur << 7)
1095 #define HC_HTXnTBLCb_HTXnTBLRC  (HC_XTC_HTXnTBLRC << 7)
1096 #define HC_HTXnTBLCb_Ctexnext   (HC_XTC_Ctexnext << 7)
1097 #define HC_HTXnTBLCc_TOPC       (HC_XTC_TOPC << 0)
1098 #define HC_HTXnTBLCc_InvTOPC    (HC_XTC_InvTOPC << 0)
1099 #define HC_HTXnTBLCc_TOPCp5     (HC_XTC_TOPCp5 << 0)
1100 #define HC_HTXnTBLCc_0          (HC_XTC_0 << 0)
1101 #define HC_HTXnTBLCc_Dif        (HC_XTC_Dif << 0)
1102 #define HC_HTXnTBLCc_Spec       (HC_XTC_Spec << 0)
1103 #define HC_HTXnTBLCc_Tex        (HC_XTC_Tex << 0)
1104 #define HC_HTXnTBLCc_Cur        (HC_XTC_Cur << 0)
1105 #define HC_HTXnTBLCc_Adif       (HC_XTC_Adif << 0)
1106 #define HC_HTXnTBLCc_Fog        (HC_XTC_Fog << 0)
1107 #define HC_HTXnTBLCc_Atex       (HC_XTC_Atex << 0)
1108 #define HC_HTXnTBLCc_Acur       (HC_XTC_Acur << 0)
1109 #define HC_HTXnTBLCc_HTXnTBLRC  (HC_XTC_HTXnTBLRC << 0)
1110 #define HC_HTXnTBLCc_Ctexnext   (HC_XTC_Ctexnext << 0)
1111 /* HC_SubA_HTXnTBLCop      0x0081
1112  */
1113 #define HC_HTXnTBLdot_MASK      0x00c00000
1114 #define HC_HTXnTBLCop_MASK      0x00380000
1115 #define HC_HTXnTBLCbias_MASK    0x0007c000
1116 #define HC_HTXnTBLCshift_MASK   0x00001800
1117 #define HC_HTXnTBLAop_MASK      0x00000380
1118 #define HC_HTXnTBLAbias_MASK    0x00000078
1119 #define HC_HTXnTBLAshift_MASK   0x00000003
1120 #define HC_HTXnTBLCop_Add       0x00000000
1121 #define HC_HTXnTBLCop_Sub       0x00080000
1122 #define HC_HTXnTBLCop_Min       0x00100000
1123 #define HC_HTXnTBLCop_Max       0x00180000
1124 #define HC_HTXnTBLCop_Mask      0x00200000
1125 #define HC_HTXnTBLCbias_Cbias           (HC_XTC_Cbias << 14)
1126 #define HC_HTXnTBLCbias_InvCbias        (HC_XTC_InvCbias << 14)
1127 #define HC_HTXnTBLCbias_0               (HC_XTC_0 << 14)
1128 #define HC_HTXnTBLCbias_Dif             (HC_XTC_Dif << 14)
1129 #define HC_HTXnTBLCbias_Spec            (HC_XTC_Spec << 14)
1130 #define HC_HTXnTBLCbias_Tex             (HC_XTC_Tex << 14)
1131 #define HC_HTXnTBLCbias_Cur             (HC_XTC_Cur << 14)
1132 #define HC_HTXnTBLCbias_Adif            (HC_XTC_Adif << 14)
1133 #define HC_HTXnTBLCbias_Fog             (HC_XTC_Fog << 14)
1134 #define HC_HTXnTBLCbias_Atex            (HC_XTC_Atex << 14)
1135 #define HC_HTXnTBLCbias_Acur            (HC_XTC_Acur << 14)
1136 #define HC_HTXnTBLCbias_HTXnTBLRC       (HC_XTC_HTXnTBLRC << 14)
1137 #define HC_HTXnTBLCshift_1      0x00000000
1138 #define HC_HTXnTBLCshift_2      0x00000800
1139 #define HC_HTXnTBLCshift_No     0x00001000
1140 #define HC_HTXnTBLCshift_DotP   0x00001800
1141 /*=* John Sheng [2003.7.18] texture combine *=*/
1142 #define HC_HTXnTBLDOT3   0x00080000
1143 #define HC_HTXnTBLDOT4   0x000C0000
1144 
1145 #define HC_HTXnTBLAop_Add       0x00000000
1146 #define HC_HTXnTBLAop_Sub       0x00000080
1147 #define HC_HTXnTBLAop_Min       0x00000100
1148 #define HC_HTXnTBLAop_Max       0x00000180
1149 #define HC_HTXnTBLAop_Mask      0x00000200
1150 #define HC_HTXnTBLAbias_Inv             0x00000040
1151 #define HC_HTXnTBLAbias_Adif            0x00000000
1152 #define HC_HTXnTBLAbias_Fog             0x00000008
1153 #define HC_HTXnTBLAbias_Acur            0x00000010
1154 #define HC_HTXnTBLAbias_HTXnTBLRAbias   0x00000018
1155 #define HC_HTXnTBLAbias_Atex            0x00000020
1156 #define HC_HTXnTBLAshift_1      0x00000000
1157 #define HC_HTXnTBLAshift_2      0x00000001
1158 #define HC_HTXnTBLAshift_No     0x00000002
1159 /* #define HC_HTXnTBLAshift_DotP   0x00000003 */
1160 /* HC_SubA_HTXnTBLMPFog    0x0082
1161  */
1162 #define HC_HTXnTBLMPfog_MASK    0x00e00000
1163 #define HC_HTXnTBLMPfog_0       0x00000000
1164 #define HC_HTXnTBLMPfog_Adif    0x00200000
1165 #define HC_HTXnTBLMPfog_Fog     0x00400000
1166 #define HC_HTXnTBLMPfog_Atex    0x00600000
1167 #define HC_HTXnTBLMPfog_Acur    0x00800000
1168 #define HC_HTXnTBLMPfog_GHTXnTBLRFog    0x00a00000
1169 /* HC_SubA_HTXnTBLAsat     0x0083
1170  *-- Define the texture alpha input.
1171  */
1172 #define HC_XTA_TOPA             0x00000000
1173 #define HC_XTA_InvTOPA          0x00000008
1174 #define HC_XTA_TOPAp5           0x00000010
1175 #define HC_XTA_Adif             0x00000000
1176 #define HC_XTA_Fog              0x00000001
1177 #define HC_XTA_Acur             0x00000002
1178 #define HC_XTA_HTXnTBLRA        0x00000003
1179 #define HC_XTA_Atex             0x00000004
1180 #define HC_XTA_Atexnext         0x00000005
1181 /*--
1182  */
1183 #define HC_HTXnTBLAsat_MASK     0x00800000
1184 #define HC_HTXnTBLAMB_MASK      0x00700000
1185 #define HC_HTXnTBLAa_MASK       0x0007c000
1186 #define HC_HTXnTBLAb_MASK       0x00000f80
1187 #define HC_HTXnTBLAc_MASK       0x0000001f
1188 #define HC_HTXnTBLAMB_SHIFT     20
1189 #define HC_HTXnTBLAa_TOPA       (HC_XTA_TOPA << 14)
1190 #define HC_HTXnTBLAa_InvTOPA    (HC_XTA_InvTOPA << 14)
1191 #define HC_HTXnTBLAa_TOPAp5     (HC_XTA_TOPAp5 << 14)
1192 #define HC_HTXnTBLAa_Adif       (HC_XTA_Adif << 14)
1193 #define HC_HTXnTBLAa_Fog        (HC_XTA_Fog << 14)
1194 #define HC_HTXnTBLAa_Acur       (HC_XTA_Acur << 14)
1195 #define HC_HTXnTBLAa_HTXnTBLRA  (HC_XTA_HTXnTBLRA << 14)
1196 #define HC_HTXnTBLAa_Atex       (HC_XTA_Atex << 14)
1197 #define HC_HTXnTBLAa_Atexnext   (HC_XTA_Atexnext << 14)
1198 #define HC_HTXnTBLAb_TOPA       (HC_XTA_TOPA << 7)
1199 #define HC_HTXnTBLAb_InvTOPA    (HC_XTA_InvTOPA << 7)
1200 #define HC_HTXnTBLAb_TOPAp5     (HC_XTA_TOPAp5 << 7)
1201 #define HC_HTXnTBLAb_Adif       (HC_XTA_Adif << 7)
1202 #define HC_HTXnTBLAb_Fog        (HC_XTA_Fog << 7)
1203 #define HC_HTXnTBLAb_Acur       (HC_XTA_Acur << 7)
1204 #define HC_HTXnTBLAb_HTXnTBLRA  (HC_XTA_HTXnTBLRA << 7)
1205 #define HC_HTXnTBLAb_Atex       (HC_XTA_Atex << 7)
1206 #define HC_HTXnTBLAb_Atexnext   (HC_XTA_Atexnext << 7)
1207 #define HC_HTXnTBLAc_TOPA       (HC_XTA_TOPA << 0)
1208 #define HC_HTXnTBLAc_InvTOPA    (HC_XTA_InvTOPA << 0)
1209 #define HC_HTXnTBLAc_TOPAp5     (HC_XTA_TOPAp5 << 0)
1210 #define HC_HTXnTBLAc_Adif       (HC_XTA_Adif << 0)
1211 #define HC_HTXnTBLAc_Fog        (HC_XTA_Fog << 0)
1212 #define HC_HTXnTBLAc_Acur       (HC_XTA_Acur << 0)
1213 #define HC_HTXnTBLAc_HTXnTBLRA  (HC_XTA_HTXnTBLRA << 0)
1214 #define HC_HTXnTBLAc_Atex       (HC_XTA_Atex << 0)
1215 #define HC_HTXnTBLAc_Atexnext   (HC_XTA_Atexnext << 0)
1216 /* HC_SubA_HTXnTBLRAa      0x0089
1217  */
1218 #define HC_HTXnTBLRAa_MASK      0x00ff0000
1219 #define HC_HTXnTBLRAb_MASK      0x0000ff00
1220 #define HC_HTXnTBLRAc_MASK      0x000000ff
1221 #define HC_HTXnTBLRAa_SHIFT     16
1222 #define HC_HTXnTBLRAb_SHIFT     8
1223 #define HC_HTXnTBLRAc_SHIFT     0
1224 /* HC_SubA_HTXnTBLRFog     0x008a
1225  */
1226 #define HC_HTXnTBLRFog_MASK     0x0000ff00
1227 #define HC_HTXnTBLRAbias_MASK   0x000000ff
1228 #define HC_HTXnTBLRFog_SHIFT    8
1229 #define HC_HTXnTBLRAbias_SHIFT  0
1230 /* HC_SubA_HTXnLScale      0x0094
1231  */
1232 #define HC_HTXnLScale_MASK      0x0007fc00
1233 #define HC_HTXnLOff_MASK        0x000001ff
1234 #define HC_HTXnLScale_SHIFT     10
1235 /* HC_SubA_HTXSMD          0x0000
1236  */
1237 #define HC_HTXSMD_MASK          0x00000080
1238 #define HC_HTXTMD_MASK          0x00000040
1239 #define HC_HTXNum_MASK          0x00000038
1240 #define HC_HTXTRMD_MASK         0x00000006
1241 #define HC_HTXCHCLR_MASK        0x00000001
1242 #define HC_HTXNum_SHIFT         3
1243 
1244 /* Texture Palette n
1245  */
1246 #define HC_SubType_TexPalette0  0x00000000
1247 #define HC_SubType_TexPalette1  0x00000001
1248 #define HC_SubType_FogTable     0x00000010
1249 #define HC_SubType_Stipple      0x00000014
1250 /* HC_SubA_TexPalette0     0x0000
1251  */
1252 #define HC_HTPnA_MASK           0xff000000
1253 #define HC_HTPnR_MASK           0x00ff0000
1254 #define HC_HTPnG_MASK           0x0000ff00
1255 #define HC_HTPnB_MASK           0x000000ff
1256 /* HC_SubA_FogTable        0x0010
1257  */
1258 #define HC_HFPn3_MASK           0xff000000
1259 #define HC_HFPn2_MASK           0x00ff0000
1260 #define HC_HFPn1_MASK           0x0000ff00
1261 #define HC_HFPn_MASK            0x000000ff
1262 #define HC_HFPn3_SHIFT          24
1263 #define HC_HFPn2_SHIFT          16
1264 #define HC_HFPn1_SHIFT          8
1265 
1266 /* Auto Testing & Security
1267  */
1268 #define HC_SubA_HenFIFOAT       0x0000
1269 #define HC_SubA_HFBDrawFirst    0x0004
1270 #define HC_SubA_HFBBasL         0x0005
1271 #define HC_SubA_HFBDst          0x0006
1272 /* HC_SubA_HenFIFOAT       0x0000
1273  */
1274 #define HC_HenFIFOAT_MASK       0x00000020
1275 #define HC_HenGEMILock_MASK     0x00000010
1276 #define HC_HenFBASwap_MASK      0x00000008
1277 #define HC_HenOT_MASK           0x00000004
1278 #define HC_HenCMDQ_MASK         0x00000002
1279 #define HC_HenTXCTSU_MASK       0x00000001
1280 /* HC_SubA_HFBDrawFirst    0x0004
1281  */
1282 #define HC_HFBDrawFirst_MASK    0x00000800
1283 #define HC_HFBQueue_MASK        0x00000400
1284 #define HC_HFBLock_MASK         0x00000200
1285 #define HC_HEOF_MASK            0x00000100
1286 #define HC_HFBBasH_MASK         0x000000ff
1287 
1288 /* GEMI Setting
1289  */
1290 #define HC_SubA_HTArbRCM        0x0008
1291 #define HC_SubA_HTArbRZ         0x000a
1292 #define HC_SubA_HTArbWZ         0x000b
1293 #define HC_SubA_HTArbRTX        0x000c
1294 #define HC_SubA_HTArbRCW        0x000d
1295 #define HC_SubA_HTArbE2         0x000e
1296 #define HC_SubA_HArbRQCM        0x0010
1297 #define HC_SubA_HArbWQCM        0x0011
1298 #define HC_SubA_HGEMITout       0x0020
1299 #define HC_SubA_HFthRTXD        0x0040
1300 #define HC_SubA_HFthRTXA        0x0044
1301 #define HC_SubA_HCMDQstL        0x0050
1302 #define HC_SubA_HCMDQendL       0x0051
1303 #define HC_SubA_HCMDQLen        0x0052
1304 /* HC_SubA_HTArbRCM        0x0008
1305  */
1306 #define HC_HTArbRCM_MASK        0x0000ffff
1307 /* HC_SubA_HTArbRZ         0x000a
1308  */
1309 #define HC_HTArbRZ_MASK         0x0000ffff
1310 /* HC_SubA_HTArbWZ         0x000b
1311  */
1312 #define HC_HTArbWZ_MASK         0x0000ffff
1313 /* HC_SubA_HTArbRTX        0x000c
1314  */
1315 #define HC_HTArbRTX_MASK        0x0000ffff
1316 /* HC_SubA_HTArbRCW        0x000d
1317  */
1318 #define HC_HTArbRCW_MASK        0x0000ffff
1319 /* HC_SubA_HTArbE2         0x000e
1320  */
1321 #define HC_HTArbE2_MASK         0x0000ffff
1322 /* HC_SubA_HArbRQCM        0x0010
1323  */
1324 #define HC_HTArbRQCM_MASK       0x0000ffff
1325 /* HC_SubA_HArbWQCM        0x0011
1326  */
1327 #define HC_HArbWQCM_MASK        0x0000ffff
1328 /* HC_SubA_HGEMITout       0x0020
1329  */
1330 #define HC_HGEMITout_MASK       0x000f0000
1331 #define HC_HNPArbZC_MASK        0x0000ffff
1332 #define HC_HGEMITout_SHIFT      16
1333 /* HC_SubA_HFthRTXD        0x0040
1334  */
1335 #define HC_HFthRTXD_MASK        0x00ff0000
1336 #define HC_HFthRZD_MASK         0x0000ff00
1337 #define HC_HFthWZD_MASK         0x000000ff
1338 #define HC_HFthRTXD_SHIFT       16
1339 #define HC_HFthRZD_SHIFT        8
1340 /* HC_SubA_HFthRTXA        0x0044
1341  */
1342 #define HC_HFthRTXA_MASK        0x000000ff
1343 
1344 /****************************************************************************
1345  * Define the Halcyon Internal register access constants. For simulator only.
1346  ***************************************************************************/
1347 #define HC_SIMA_HAGPBstL        0x0000
1348 #define HC_SIMA_HAGPBendL       0x0001
1349 #define HC_SIMA_HAGPCMNT        0x0002
1350 #define HC_SIMA_HAGPBpL         0x0003
1351 #define HC_SIMA_HAGPBpH         0x0004
1352 #define HC_SIMA_HClipTB         0x0005
1353 #define HC_SIMA_HClipLR         0x0006
1354 #define HC_SIMA_HFPClipTL       0x0007
1355 #define HC_SIMA_HFPClipBL       0x0008
1356 #define HC_SIMA_HFPClipLL       0x0009
1357 #define HC_SIMA_HFPClipRL       0x000a
1358 #define HC_SIMA_HFPClipTBH      0x000b
1359 #define HC_SIMA_HFPClipLRH      0x000c
1360 #define HC_SIMA_HLP             0x000d
1361 #define HC_SIMA_HLPRF           0x000e
1362 #define HC_SIMA_HSolidCL        0x000f
1363 #define HC_SIMA_HPixGC          0x0010
1364 #define HC_SIMA_HSPXYOS         0x0011
1365 #define HC_SIMA_HCmdA           0x0012
1366 #define HC_SIMA_HCmdB           0x0013
1367 #define HC_SIMA_HEnable         0x0014
1368 #define HC_SIMA_HZWBBasL        0x0015
1369 #define HC_SIMA_HZWBBasH        0x0016
1370 #define HC_SIMA_HZWBType        0x0017
1371 #define HC_SIMA_HZBiasL         0x0018
1372 #define HC_SIMA_HZWBend         0x0019
1373 #define HC_SIMA_HZWTMD          0x001a
1374 #define HC_SIMA_HZWCDL          0x001b
1375 #define HC_SIMA_HZWCTAGnum      0x001c
1376 #define HC_SIMA_HZCYNum         0x001d
1377 #define HC_SIMA_HZWCFire        0x001e
1378 /* #define HC_SIMA_HSBBasL         0x001d */
1379 /* #define HC_SIMA_HSBBasH         0x001e */
1380 /* #define HC_SIMA_HSBFM           0x001f */
1381 #define HC_SIMA_HSTREF          0x0020
1382 #define HC_SIMA_HSTMD           0x0021
1383 #define HC_SIMA_HABBasL         0x0022
1384 #define HC_SIMA_HABBasH         0x0023
1385 #define HC_SIMA_HABFM           0x0024
1386 #define HC_SIMA_HATMD           0x0025
1387 #define HC_SIMA_HABLCsat        0x0026
1388 #define HC_SIMA_HABLCop         0x0027
1389 #define HC_SIMA_HABLAsat        0x0028
1390 #define HC_SIMA_HABLAop         0x0029
1391 #define HC_SIMA_HABLRCa         0x002a
1392 #define HC_SIMA_HABLRFCa        0x002b
1393 #define HC_SIMA_HABLRCbias      0x002c
1394 #define HC_SIMA_HABLRCb         0x002d
1395 #define HC_SIMA_HABLRFCb        0x002e
1396 #define HC_SIMA_HABLRAa         0x002f
1397 #define HC_SIMA_HABLRAb         0x0030
1398 #define HC_SIMA_HDBBasL         0x0031
1399 #define HC_SIMA_HDBBasH         0x0032
1400 #define HC_SIMA_HDBFM           0x0033
1401 #define HC_SIMA_HFBBMSKL        0x0034
1402 #define HC_SIMA_HROP            0x0035
1403 #define HC_SIMA_HFogLF          0x0036
1404 #define HC_SIMA_HFogCL          0x0037
1405 #define HC_SIMA_HFogCH          0x0038
1406 #define HC_SIMA_HFogStL         0x0039
1407 #define HC_SIMA_HFogStH         0x003a
1408 #define HC_SIMA_HFogOOdMF       0x003b
1409 #define HC_SIMA_HFogOOdEF       0x003c
1410 #define HC_SIMA_HFogEndL        0x003d
1411 #define HC_SIMA_HFogDenst       0x003e
1412 /*---- start of texture 0 setting ----
1413  */
1414 #define HC_SIMA_HTX0L0BasL      0x0040
1415 #define HC_SIMA_HTX0L1BasL      0x0041
1416 #define HC_SIMA_HTX0L2BasL      0x0042
1417 #define HC_SIMA_HTX0L3BasL      0x0043
1418 #define HC_SIMA_HTX0L4BasL      0x0044
1419 #define HC_SIMA_HTX0L5BasL      0x0045
1420 #define HC_SIMA_HTX0L6BasL      0x0046
1421 #define HC_SIMA_HTX0L7BasL      0x0047
1422 #define HC_SIMA_HTX0L8BasL      0x0048
1423 #define HC_SIMA_HTX0L9BasL      0x0049
1424 #define HC_SIMA_HTX0LaBasL      0x004a
1425 #define HC_SIMA_HTX0LbBasL      0x004b
1426 #define HC_SIMA_HTX0LcBasL      0x004c
1427 #define HC_SIMA_HTX0LdBasL      0x004d
1428 #define HC_SIMA_HTX0LeBasL      0x004e
1429 #define HC_SIMA_HTX0LfBasL      0x004f
1430 #define HC_SIMA_HTX0L10BasL     0x0050
1431 #define HC_SIMA_HTX0L11BasL     0x0051
1432 #define HC_SIMA_HTX0L012BasH    0x0052
1433 #define HC_SIMA_HTX0L345BasH    0x0053
1434 #define HC_SIMA_HTX0L678BasH    0x0054
1435 #define HC_SIMA_HTX0L9abBasH    0x0055
1436 #define HC_SIMA_HTX0LcdeBasH    0x0056
1437 #define HC_SIMA_HTX0Lf1011BasH  0x0057
1438 #define HC_SIMA_HTX0L0Pit       0x0058
1439 #define HC_SIMA_HTX0L1Pit       0x0059
1440 #define HC_SIMA_HTX0L2Pit       0x005a
1441 #define HC_SIMA_HTX0L3Pit       0x005b
1442 #define HC_SIMA_HTX0L4Pit       0x005c
1443 #define HC_SIMA_HTX0L5Pit       0x005d
1444 #define HC_SIMA_HTX0L6Pit       0x005e
1445 #define HC_SIMA_HTX0L7Pit       0x005f
1446 #define HC_SIMA_HTX0L8Pit       0x0060
1447 #define HC_SIMA_HTX0L9Pit       0x0061
1448 #define HC_SIMA_HTX0LaPit       0x0062
1449 #define HC_SIMA_HTX0LbPit       0x0063
1450 #define HC_SIMA_HTX0LcPit       0x0064
1451 #define HC_SIMA_HTX0LdPit       0x0065
1452 #define HC_SIMA_HTX0LePit       0x0066
1453 #define HC_SIMA_HTX0LfPit       0x0067
1454 #define HC_SIMA_HTX0L10Pit      0x0068
1455 #define HC_SIMA_HTX0L11Pit      0x0069
1456 #define HC_SIMA_HTX0L0_5WE      0x006a
1457 #define HC_SIMA_HTX0L6_bWE      0x006b
1458 #define HC_SIMA_HTX0Lc_11WE     0x006c
1459 #define HC_SIMA_HTX0L0_5HE      0x006d
1460 #define HC_SIMA_HTX0L6_bHE      0x006e
1461 #define HC_SIMA_HTX0Lc_11HE     0x006f
1462 #define HC_SIMA_HTX0L0OS        0x0070
1463 #define HC_SIMA_HTX0TB          0x0071
1464 #define HC_SIMA_HTX0MPMD        0x0072
1465 #define HC_SIMA_HTX0CLODu       0x0073
1466 #define HC_SIMA_HTX0FM          0x0074
1467 #define HC_SIMA_HTX0TRCH        0x0075
1468 #define HC_SIMA_HTX0TRCL        0x0076
1469 #define HC_SIMA_HTX0TBC         0x0077
1470 #define HC_SIMA_HTX0TRAH        0x0078
1471 #define HC_SIMA_HTX0TBLCsat     0x0079
1472 #define HC_SIMA_HTX0TBLCop      0x007a
1473 #define HC_SIMA_HTX0TBLMPfog    0x007b
1474 #define HC_SIMA_HTX0TBLAsat     0x007c
1475 #define HC_SIMA_HTX0TBLRCa      0x007d
1476 #define HC_SIMA_HTX0TBLRCb      0x007e
1477 #define HC_SIMA_HTX0TBLRCc      0x007f
1478 #define HC_SIMA_HTX0TBLRCbias   0x0080
1479 #define HC_SIMA_HTX0TBLRAa      0x0081
1480 #define HC_SIMA_HTX0TBLRFog     0x0082
1481 #define HC_SIMA_HTX0BumpM00     0x0083
1482 #define HC_SIMA_HTX0BumpM01     0x0084
1483 #define HC_SIMA_HTX0BumpM10     0x0085
1484 #define HC_SIMA_HTX0BumpM11     0x0086
1485 #define HC_SIMA_HTX0LScale      0x0087
1486 /*---- end of texture 0 setting ----      0x008f
1487  */
1488 #define HC_SIMA_TX0TX1_OFF      0x0050
1489 /*---- start of texture 1 setting ----
1490  */
1491 #define HC_SIMA_HTX1L0BasL       (HC_SIMA_HTX0L0BasL + HC_SIMA_TX0TX1_OFF)
1492 #define HC_SIMA_HTX1L1BasL       (HC_SIMA_HTX0L1BasL + HC_SIMA_TX0TX1_OFF)
1493 #define HC_SIMA_HTX1L2BasL       (HC_SIMA_HTX0L2BasL + HC_SIMA_TX0TX1_OFF)
1494 #define HC_SIMA_HTX1L3BasL       (HC_SIMA_HTX0L3BasL + HC_SIMA_TX0TX1_OFF)
1495 #define HC_SIMA_HTX1L4BasL       (HC_SIMA_HTX0L4BasL + HC_SIMA_TX0TX1_OFF)
1496 #define HC_SIMA_HTX1L5BasL       (HC_SIMA_HTX0L5BasL + HC_SIMA_TX0TX1_OFF)
1497 #define HC_SIMA_HTX1L6BasL       (HC_SIMA_HTX0L6BasL + HC_SIMA_TX0TX1_OFF)
1498 #define HC_SIMA_HTX1L7BasL       (HC_SIMA_HTX0L7BasL + HC_SIMA_TX0TX1_OFF)
1499 #define HC_SIMA_HTX1L8BasL       (HC_SIMA_HTX0L8BasL + HC_SIMA_TX0TX1_OFF)
1500 #define HC_SIMA_HTX1L9BasL       (HC_SIMA_HTX0L9BasL + HC_SIMA_TX0TX1_OFF)
1501 #define HC_SIMA_HTX1LaBasL       (HC_SIMA_HTX0LaBasL + HC_SIMA_TX0TX1_OFF)
1502 #define HC_SIMA_HTX1LbBasL       (HC_SIMA_HTX0LbBasL + HC_SIMA_TX0TX1_OFF)
1503 #define HC_SIMA_HTX1LcBasL       (HC_SIMA_HTX0LcBasL + HC_SIMA_TX0TX1_OFF)
1504 #define HC_SIMA_HTX1LdBasL       (HC_SIMA_HTX0LdBasL + HC_SIMA_TX0TX1_OFF)
1505 #define HC_SIMA_HTX1LeBasL       (HC_SIMA_HTX0LeBasL + HC_SIMA_TX0TX1_OFF)
1506 #define HC_SIMA_HTX1LfBasL       (HC_SIMA_HTX0LfBasL + HC_SIMA_TX0TX1_OFF)
1507 #define HC_SIMA_HTX1L10BasL      (HC_SIMA_HTX0L10BasL + HC_SIMA_TX0TX1_OFF)
1508 #define HC_SIMA_HTX1L11BasL      (HC_SIMA_HTX0L11BasL + HC_SIMA_TX0TX1_OFF)
1509 #define HC_SIMA_HTX1L012BasH     (HC_SIMA_HTX0L012BasH + HC_SIMA_TX0TX1_OFF)
1510 #define HC_SIMA_HTX1L345BasH     (HC_SIMA_HTX0L345BasH + HC_SIMA_TX0TX1_OFF)
1511 #define HC_SIMA_HTX1L678BasH     (HC_SIMA_HTX0L678BasH + HC_SIMA_TX0TX1_OFF)
1512 #define HC_SIMA_HTX1L9abBasH     (HC_SIMA_HTX0L9abBasH + HC_SIMA_TX0TX1_OFF)
1513 #define HC_SIMA_HTX1LcdeBasH     (HC_SIMA_HTX0LcdeBasH + HC_SIMA_TX0TX1_OFF)
1514 #define HC_SIMA_HTX1Lf1011BasH   (HC_SIMA_HTX0Lf1011BasH + HC_SIMA_TX0TX1_OFF)
1515 #define HC_SIMA_HTX1L0Pit        (HC_SIMA_HTX0L0Pit + HC_SIMA_TX0TX1_OFF)
1516 #define HC_SIMA_HTX1L1Pit        (HC_SIMA_HTX0L1Pit + HC_SIMA_TX0TX1_OFF)
1517 #define HC_SIMA_HTX1L2Pit        (HC_SIMA_HTX0L2Pit + HC_SIMA_TX0TX1_OFF)
1518 #define HC_SIMA_HTX1L3Pit        (HC_SIMA_HTX0L3Pit + HC_SIMA_TX0TX1_OFF)
1519 #define HC_SIMA_HTX1L4Pit        (HC_SIMA_HTX0L4Pit + HC_SIMA_TX0TX1_OFF)
1520 #define HC_SIMA_HTX1L5Pit        (HC_SIMA_HTX0L5Pit + HC_SIMA_TX0TX1_OFF)
1521 #define HC_SIMA_HTX1L6Pit        (HC_SIMA_HTX0L6Pit + HC_SIMA_TX0TX1_OFF)
1522 #define HC_SIMA_HTX1L7Pit        (HC_SIMA_HTX0L7Pit + HC_SIMA_TX0TX1_OFF)
1523 #define HC_SIMA_HTX1L8Pit        (HC_SIMA_HTX0L8Pit + HC_SIMA_TX0TX1_OFF)
1524 #define HC_SIMA_HTX1L9Pit        (HC_SIMA_HTX0L9Pit + HC_SIMA_TX0TX1_OFF)
1525 #define HC_SIMA_HTX1LaPit        (HC_SIMA_HTX0LaPit + HC_SIMA_TX0TX1_OFF)
1526 #define HC_SIMA_HTX1LbPit        (HC_SIMA_HTX0LbPit + HC_SIMA_TX0TX1_OFF)
1527 #define HC_SIMA_HTX1LcPit        (HC_SIMA_HTX0LcPit + HC_SIMA_TX0TX1_OFF)
1528 #define HC_SIMA_HTX1LdPit        (HC_SIMA_HTX0LdPit + HC_SIMA_TX0TX1_OFF)
1529 #define HC_SIMA_HTX1LePit        (HC_SIMA_HTX0LePit + HC_SIMA_TX0TX1_OFF)
1530 #define HC_SIMA_HTX1LfPit        (HC_SIMA_HTX0LfPit + HC_SIMA_TX0TX1_OFF)
1531 #define HC_SIMA_HTX1L10Pit       (HC_SIMA_HTX0L10Pit + HC_SIMA_TX0TX1_OFF)
1532 #define HC_SIMA_HTX1L11Pit       (HC_SIMA_HTX0L11Pit + HC_SIMA_TX0TX1_OFF)
1533 #define HC_SIMA_HTX1L0_5WE       (HC_SIMA_HTX0L0_5WE + HC_SIMA_TX0TX1_OFF)
1534 #define HC_SIMA_HTX1L6_bWE       (HC_SIMA_HTX0L6_bWE + HC_SIMA_TX0TX1_OFF)
1535 #define HC_SIMA_HTX1Lc_11WE      (HC_SIMA_HTX0Lc_11WE + HC_SIMA_TX0TX1_OFF)
1536 #define HC_SIMA_HTX1L0_5HE       (HC_SIMA_HTX0L0_5HE + HC_SIMA_TX0TX1_OFF)
1537 #define HC_SIMA_HTX1L6_bHE       (HC_SIMA_HTX0L6_bHE + HC_SIMA_TX0TX1_OFF)
1538 #define HC_SIMA_HTX1Lc_11HE      (HC_SIMA_HTX0Lc_11HE + HC_SIMA_TX0TX1_OFF)
1539 #define HC_SIMA_HTX1L0OS         (HC_SIMA_HTX0L0OS + HC_SIMA_TX0TX1_OFF)
1540 #define HC_SIMA_HTX1TB           (HC_SIMA_HTX0TB + HC_SIMA_TX0TX1_OFF)
1541 #define HC_SIMA_HTX1MPMD         (HC_SIMA_HTX0MPMD + HC_SIMA_TX0TX1_OFF)
1542 #define HC_SIMA_HTX1CLODu        (HC_SIMA_HTX0CLODu + HC_SIMA_TX0TX1_OFF)
1543 #define HC_SIMA_HTX1FM           (HC_SIMA_HTX0FM + HC_SIMA_TX0TX1_OFF)
1544 #define HC_SIMA_HTX1TRCH         (HC_SIMA_HTX0TRCH + HC_SIMA_TX0TX1_OFF)
1545 #define HC_SIMA_HTX1TRCL         (HC_SIMA_HTX0TRCL + HC_SIMA_TX0TX1_OFF)
1546 #define HC_SIMA_HTX1TBC          (HC_SIMA_HTX0TBC + HC_SIMA_TX0TX1_OFF)
1547 #define HC_SIMA_HTX1TRAH         (HC_SIMA_HTX0TRAH + HC_SIMA_TX0TX1_OFF)
1548 #define HC_SIMA_HTX1LTC          (HC_SIMA_HTX0LTC + HC_SIMA_TX0TX1_OFF)
1549 #define HC_SIMA_HTX1LTA          (HC_SIMA_HTX0LTA + HC_SIMA_TX0TX1_OFF)
1550 #define HC_SIMA_HTX1TBLCsat      (HC_SIMA_HTX0TBLCsat + HC_SIMA_TX0TX1_OFF)
1551 #define HC_SIMA_HTX1TBLCop       (HC_SIMA_HTX0TBLCop + HC_SIMA_TX0TX1_OFF)
1552 #define HC_SIMA_HTX1TBLMPfog     (HC_SIMA_HTX0TBLMPfog + HC_SIMA_TX0TX1_OFF)
1553 #define HC_SIMA_HTX1TBLAsat      (HC_SIMA_HTX0TBLAsat + HC_SIMA_TX0TX1_OFF)
1554 #define HC_SIMA_HTX1TBLRCa       (HC_SIMA_HTX0TBLRCa + HC_SIMA_TX0TX1_OFF)
1555 #define HC_SIMA_HTX1TBLRCb       (HC_SIMA_HTX0TBLRCb + HC_SIMA_TX0TX1_OFF)
1556 #define HC_SIMA_HTX1TBLRCc       (HC_SIMA_HTX0TBLRCc + HC_SIMA_TX0TX1_OFF)
1557 #define HC_SIMA_HTX1TBLRCbias    (HC_SIMA_HTX0TBLRCbias + HC_SIMA_TX0TX1_OFF)
1558 #define HC_SIMA_HTX1TBLRAa       (HC_SIMA_HTX0TBLRAa + HC_SIMA_TX0TX1_OFF)
1559 #define HC_SIMA_HTX1TBLRFog      (HC_SIMA_HTX0TBLRFog + HC_SIMA_TX0TX1_OFF)
1560 #define HC_SIMA_HTX1BumpM00      (HC_SIMA_HTX0BumpM00 + HC_SIMA_TX0TX1_OFF)
1561 #define HC_SIMA_HTX1BumpM01      (HC_SIMA_HTX0BumpM01 + HC_SIMA_TX0TX1_OFF)
1562 #define HC_SIMA_HTX1BumpM10      (HC_SIMA_HTX0BumpM10 + HC_SIMA_TX0TX1_OFF)
1563 #define HC_SIMA_HTX1BumpM11      (HC_SIMA_HTX0BumpM11 + HC_SIMA_TX0TX1_OFF)
1564 #define HC_SIMA_HTX1LScale       (HC_SIMA_HTX0LScale + HC_SIMA_TX0TX1_OFF)
1565 /*---- end of texture 1 setting ---- 0xaf
1566  */
1567 #define HC_SIMA_HTXSMD          0x00b0
1568 #define HC_SIMA_HenFIFOAT       0x00b1
1569 #define HC_SIMA_HFBDrawFirst    0x00b2
1570 #define HC_SIMA_HFBBasL         0x00b3
1571 #define HC_SIMA_HTArbRCM        0x00b4
1572 #define HC_SIMA_HTArbRZ         0x00b5
1573 #define HC_SIMA_HTArbWZ         0x00b6
1574 #define HC_SIMA_HTArbRTX        0x00b7
1575 #define HC_SIMA_HTArbRCW        0x00b8
1576 #define HC_SIMA_HTArbE2         0x00b9
1577 #define HC_SIMA_HGEMITout       0x00ba
1578 #define HC_SIMA_HFthRTXD        0x00bb
1579 #define HC_SIMA_HFthRTXA        0x00bc
1580 /* Define the texture palette 0
1581  */
1582 #define HC_SIMA_HTP0            0x0100
1583 #define HC_SIMA_HTP1            0x0200
1584 #define HC_SIMA_FOGTABLE        0x0300
1585 #define HC_SIMA_STIPPLE         0x0400
1586 #define HC_SIMA_HE3Fire         0x0440
1587 #define HC_SIMA_TRANS_SET       0x0441
1588 #define HC_SIMA_HREngSt         0x0442
1589 #define HC_SIMA_HRFIFOempty     0x0443
1590 #define HC_SIMA_HRFIFOfull      0x0444
1591 #define HC_SIMA_HRErr           0x0445
1592 #define HC_SIMA_FIFOstatus      0x0446
1593 
1594 /****************************************************************************
1595  * Define the AGP command header.
1596  ***************************************************************************/
1597 #define HC_ACMD_MASK            0xfe000000
1598 #define HC_ACMD_SUB_MASK        0x0c000000
1599 #define HC_ACMD_HCmdA           0xee000000
1600 #define HC_ACMD_HCmdB           0xec000000
1601 #define HC_ACMD_HCmdC           0xea000000
1602 #define HC_ACMD_H1              0xf0000000
1603 #define HC_ACMD_H2              0xf2000000
1604 #define HC_ACMD_H3              0xf4000000
1605 #define HC_ACMD_H4              0xf6000000
1606 
1607 #define HC_ACMD_H1IO_MASK       0x000001ff
1608 #define HC_ACMD_H2IO1_MASK      0x001ff000
1609 #define HC_ACMD_H2IO2_MASK      0x000001ff
1610 #define HC_ACMD_H2IO1_SHIFT     12
1611 #define HC_ACMD_H2IO2_SHIFT     0
1612 #define HC_ACMD_H3IO_MASK       0x000001ff
1613 #define HC_ACMD_H3COUNT_MASK    0x01fff000
1614 #define HC_ACMD_H3COUNT_SHIFT   12
1615 #define HC_ACMD_H4ID_MASK       0x000001ff
1616 #define HC_ACMD_H4COUNT_MASK    0x01fffe00
1617 #define HC_ACMD_H4COUNT_SHIFT   9
1618 
1619 /*****************************************************************************
1620  * Define Header
1621  ****************************************************************************/
1622 #define HC_HEADER2        0xF210F110
1623 
1624 /*****************************************************************************
1625  * Define Dummy Value
1626  ****************************************************************************/
1627 #define HC_DUMMY        0xCCCCCCCC
1628 /*****************************************************************************
1629  * Define for DMA use
1630  ****************************************************************************/
1631 #define HALCYON_HEADER2     0XF210F110
1632 #define HALCYON_FIRECMD     0XEE100000
1633 #define HALCYON_FIREMASK    0XFFF00000
1634 #define HALCYON_CMDB        0XEC000000
1635 #define HALCYON_CMDBMASK    0XFFFE0000
1636 #define HALCYON_SUB_ADDR0   0X00000000
1637 #define HALCYON_HEADER1MASK 0XFFFFFC00
1638 #define HALCYON_HEADER1     0XF0000000
1639 #define HC_SubA_HAGPBstL        0x0060
1640 #define HC_SubA_HAGPBendL       0x0061
1641 #define HC_SubA_HAGPCMNT        0x0062
1642 #define HC_SubA_HAGPBpL         0x0063
1643 #define HC_SubA_HAGPBpH         0x0064
1644 #define HC_HAGPCMNT_MASK        0x00800000
1645 #define HC_HCmdErrClr_MASK      0x00400000
1646 #define HC_HAGPBendH_MASK       0x0000ff00
1647 #define HC_HAGPBstH_MASK        0x000000ff
1648 #define HC_HAGPBendH_SHIFT      8
1649 #define HC_HAGPBstH_SHIFT       0
1650 #define HC_HAGPBpL_MASK         0x00fffffc
1651 #define HC_HAGPBpID_MASK        0x00000003
1652 #define HC_HAGPBpID_PAUSE       0x00000000
1653 #define HC_HAGPBpID_JUMP        0x00000001
1654 #define HC_HAGPBpID_STOP        0x00000002
1655 #define HC_HAGPBpH_MASK         0x00ffffff
1656 
1657 
1658 #define VIA_VIDEO_HEADER5       0xFE040000
1659 #define VIA_VIDEO_HEADER6       0xFE050000
1660 #define VIA_VIDEO_HEADER7       0xFE060000
1661 #define VIA_VIDEOMASK           0xFFFF0000
1662 
1663 /*****************************************************************************
1664  * Define for H5 DMA use
1665  ****************************************************************************/
1666 #define H5_HC_DUMMY                    0xCC000000
1667 
1668 /* Command Header Type */
1669 #define INV_DUMMY_MASK		0xFF000000
1670 #define INV_AGPHeader0              0xFE000000
1671 #define INV_AGPHeader1              0xFE010000
1672 #define INV_AGPHeader2              0xFE020000
1673 #define INV_AGPHeader3              0xFE030000
1674 #define INV_AGPHeader4              0xFE040000
1675 #define INV_AGPHeader5              0xFE050000
1676 #define INV_AGPHeader6              0xFE060000
1677 #define INV_AGPHeader7              0xFE070000
1678 #define INV_AGPHeader9              0xFE090000
1679 #define INV_AGPHeaderA              0xFE0A0000
1680 #define INV_AGPHeader40             0xFE400000
1681 #define INV_AGPHeader41             0xFE410000
1682 #define INV_AGPHeader43             0xFE430000
1683 #define INV_AGPHeader45             0xFE450000
1684 #define INV_AGPHeader47             0xFE470000
1685 #define INV_AGPHeader4A             0xFE4A0000
1686 #define INV_AGPHeader82             0xFE820000
1687 #define INV_AGPHeader83             0xFE830000
1688 #define INV_AGPHeader_MASK          0xFFFF0000
1689 #define INV_AGPHeader2A             0xFE2A0000
1690 #define INV_AGPHeader25             0xFE250000
1691 #define INV_AGPHeader20             0xFE200000
1692 #define INV_AGPHeader23             0xFE230000
1693 #define INV_AGPHeaderE2             0xFEE20000
1694 #define INV_AGPHeaderE3             0xFEE30000
1695 
1696 /*Transmission IO Space*/
1697 #define INV_REG_CR_TRANS            0x041C
1698 #define INV_REG_CR_BEGIN            0x0420
1699 #define INV_REG_CR_END              0x0438
1700 
1701 #define INV_REG_3D_TRANS            0x043C
1702 #define INV_REG_3D_BEGIN            0x0440
1703 #define INV_REG_3D_END              0x06FC
1704 
1705 #define INV_ParaType_CmdVdata        0x0000
1706 
1707 /* H5 Enable Setting
1708  */
1709 #define INV_HC_SubA_HEnable1        0x00
1710 
1711 #define INV_HC_HenAT4ALLRT_MASK     0x00100000
1712 #define INV_HC_HenATMRT3_MASK       0x00080000
1713 #define INV_HC_HenATMRT2_MASK       0x00040000
1714 #define INV_HC_HenATMRT1_MASK       0x00020000
1715 #define INV_HC_HenATMRT0_MASK        0x00010000
1716 #define INV_HC_HenSCMRT3_MASK        0x00008000
1717 #define INV_HC_HenSCMRT2_MASK        0x00004000
1718 #define INV_HC_HenSCMRT1_MASK        0x00002000
1719 #define INV_HC_HenSCMRT0_MASK        0x00001000
1720 #define INV_HC_HenFOGMRT3_MASK        0x00000800
1721 #define INV_HC_HenFOGMRT2_MASK        0x00000400
1722 #define INV_HC_HenFOGMRT1_MASK        0x00000200
1723 #define INV_HC_HenFOGMRT0_MASK        0x00000100
1724 #define INV_HC_HenABLMRT3_MASK        0x00000080
1725 #define INV_HC_HenABLMRT2_MASK        0x00000040
1726 #define INV_HC_HenABLMRT1_MASK        0x00000020
1727 #define INV_HC_HenABLMRT0_MASK        0x00000010
1728 #define INV_HC_HenDTMRT3_MASK        0x00000008
1729 #define INV_HC_HenDTMRT2_MASK        0x00000004
1730 #define INV_HC_HenDTMRT1_MASK        0x00000002
1731 #define INV_HC_HenDTMRT0_MASK        0x00000001
1732 
1733 #define INV_HC_SubA_HEnable2        0x01
1734 
1735 #define INV_HC_HenLUL2DR_MASK         0x00800000
1736 #define INV_HC_HenLDIAMOND_MASK     0x00400000
1737 #define INV_HC_HenPSPRITE_MASK         0x00200000
1738 #define INV_HC_HenC2S_MASK             0x00100000
1739 #define INV_HC_HenFOGPP_MASK           0x00080000
1740 #define INV_HC_HenSCPP_MASK           0x00040000
1741 #define INV_HC_HenCPP_MASK           0x00020000
1742 #define INV_HC_HenCZ_MASK            0x00002000
1743 #define INV_HC_HenVC_MASK            0x00001000
1744 #define INV_HC_HenCL_MASK            0x00000800
1745 #define INV_HC_HenPS_MASK            0x00000400
1746 #define INV_HC_HenWCZ_MASK            0x00000200
1747 #define INV_HC_HenTXCH_MASK            0x00000100
1748 #define INV_HC_HenBFCULL_MASK        0x00000080
1749 #define INV_HC_HenCW_MASK            0x00000040
1750 #define INV_HC_HenAA_MASK            0x00000020
1751 #define INV_HC_HenST_MASK            0x00000010
1752 #define INV_HC_HenZT_MASK            0x00000008
1753 #define INV_HC_HenZW_MASK            0x00000004
1754 #define INV_HC_HenSP_MASK            0x00000002
1755 #define INV_HC_HenLP_MASK            0x00000001
1756 
1757 /* H5 Miscellaneous Settings
1758  */
1759 #define INV_HC_SubA_HCClipTL           0x0080
1760 #define INV_HC_SubA_HCClipBL           0x0081
1761 #define INV_HC_SubA_HSClipTL           0x0082
1762 #define INV_HC_SubA_HSClipBL           0x0083
1763 #define INV_HC_SubA_HSolidCL        0x0086
1764 #define INV_HC_SubA_HSolidCH        0x0087
1765 #define INV_HC_SubA_HGBClipGL       0x0088
1766 #define INV_HC_SubA_HGBClipGR       0x0089
1767 
1768 
1769 #define INV_HC_ParaType_Vetex        0x00040000
1770 
1771 #endif
1772