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Searched refs:HCLK_RGA (Results 1 – 25 of 30) sorted by relevance

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/linux-6.1.9/Documentation/devicetree/bindings/media/
Drockchip-rga.yaml75 <&cru HCLK_RGA>,
/linux-6.1.9/include/dt-bindings/clock/
Drk3188-cru-common.h126 #define HCLK_RGA 466 macro
Drk3128-cru.h137 #define HCLK_RGA 467 macro
Drk3228-cru.h136 #define HCLK_RGA 467 macro
Drv1108-cru.h154 #define HCLK_RGA 335 macro
Drk3288-cru.h188 #define HCLK_RGA 470 macro
Drk3328-cru.h201 #define HCLK_RGA 340 macro
Drk3368-cru.h175 #define HCLK_RGA 470 macro
Dpx30-cru.h129 #define HCLK_RGA 253 macro
Drockchip,rv1126-cru.h281 #define HCLK_RGA 217 macro
Drk3399-cru.h325 #define HCLK_RGA 485 macro
Drk3568-cru.h307 #define HCLK_RGA 244 macro
/linux-6.1.9/Documentation/devicetree/bindings/power/
Drockchip,power-controller.yaml217 <&cru HCLK_RGA>;
/linux-6.1.9/drivers/clk/rockchip/
Dclk-rk3128.c474 GATE(HCLK_RGA, "hclk_rga", "hclk_vio", 0, RK2928_CLKGATE_CON(6), 10, GFLAGS),
Dclk-rk3228.c543 GATE(HCLK_RGA, "hclk_rga", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(13), 1, GFLAGS),
Dclk-rk3188.c462 GATE(HCLK_RGA, "hclk_rga", "hclk_cpu", 0, RK2928_CLKGATE_CON(6), 10, GFLAGS),
Dclk-rk3328.c718 GATE(HCLK_RGA, "hclk_rga", "hclk_vio_pre", 0, RK3328_CLKGATE_CON(21), 11, GFLAGS),
Dclk-rv1108.c455 GATE(HCLK_RGA, "hclk_rga", "hclk_vio_pre", 0,
Dclk-rk3368.c743 GATE(HCLK_RGA, "hclk_rga", "hclk_vio", 0, RK3368_CLKGATE_CON(16), 1, GFLAGS),
Dclk-rk3288.c784 GATE(HCLK_RGA, "hclk_rga", "hclk_vio", 0, RK3288_CLKGATE_CON(15), 1, GFLAGS),
Dclk-px30.c822 GATE(HCLK_RGA, "hclk_rga", "hclk_vo_pre", 0, PX30_CLKGATE_CON(3), 8, GFLAGS),
/linux-6.1.9/arch/arm/boot/dts/
Drk322x.dtsi207 <&cru HCLK_RGA>,
698 clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;
Drk3188.dtsi724 <&cru HCLK_RGA>;
Drk3066a.dtsi779 <&cru HCLK_RGA>;
Drk3288.dtsi780 <&cru HCLK_RGA>,
1012 clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;

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