Searched refs:HAL_SEQ_WCSS_UMAC_CE0_SRC_REG (Results 1 – 4 of 4) sorted by relevance
1223 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_BASE_LSB; in ath11k_hal_srng_create_config()1224 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_HP; in ath11k_hal_srng_create_config()1226 HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab); in ath11k_hal_srng_create_config()1228 HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab); in ath11k_hal_srng_create_config()
46 #define HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(x) \ macro
61 else if ((offset ^ HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab)) < in ath11k_pci_get_window_start()
154 else if ((offset ^ HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab)) < in ath11k_ahb_get_window_start_wcn6750()