Searched refs:GFX_9_0__SRCID__CP_PRIV_REG_FAULT (Results 1 – 2 of 2) sorted by relevance
36 #define GFX_9_0__SRCID__CP_PRIV_REG_FAULT 184 /* B8 Privileged Register Fault */ macro
2134 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_GRBM_CP, GFX_9_0__SRCID__CP_PRIV_REG_FAULT, in gfx_v9_0_sw_init()