Searched refs:GEN9_CLKGATE_DIS_5 (Results 1 – 2 of 2) sorted by relevance
4380 intel_de_rmw(dev_priv, GEN9_CLKGATE_DIS_5, 0, DPCE_GATING_DIS); in adlp_init_clock_gating()
1843 #define GEN9_CLKGATE_DIS_5 _MMIO(0x46540) macro