Searched refs:GEN11_L3SQCREG5 (Results 1 – 2 of 2) sorted by relevance
991 #define GEN11_L3SQCREG5 _MMIO(0xb158) macro
572 wa_write_clr_set(wal, GEN11_L3SQCREG5, L3_PWM_TIMER_INIT_VAL_MASK, in dg2_ctx_gt_tuning_init()