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Searched refs:GDS_CONFIG__SH3_GPR_PHASE_SEL__SHIFT (Results 1 – 10 of 10) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h4317 #define GDS_CONFIG__SH3_GPR_PHASE_SEL__SHIFT 0x00000007 macro
Dgfx_7_2_sh_mask.h14620 #define GDS_CONFIG__SH3_GPR_PHASE_SEL__SHIFT 0x7 macro
Dgfx_8_0_sh_mask.h16548 #define GDS_CONFIG__SH3_GPR_PHASE_SEL__SHIFT 0x7 macro
Dgfx_8_1_sh_mask.h17136 #define GDS_CONFIG__SH3_GPR_PHASE_SEL__SHIFT 0x7 macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h4725 #define GDS_CONFIG__SH3_GPR_PHASE_SEL__SHIFT … macro
Dgc_9_1_sh_mask.h4197 #define GDS_CONFIG__SH3_GPR_PHASE_SEL__SHIFT … macro
Dgc_9_2_1_sh_mask.h4103 #define GDS_CONFIG__SH3_GPR_PHASE_SEL__SHIFT … macro
Dgc_9_4_2_sh_mask.h6830 #define GDS_CONFIG__SH3_GPR_PHASE_SEL__SHIFT … macro
Dgc_10_1_0_sh_mask.h8995 #define GDS_CONFIG__SH3_GPR_PHASE_SEL__SHIFT … macro
Dgc_10_3_0_sh_mask.h9172 #define GDS_CONFIG__SH3_GPR_PHASE_SEL__SHIFT … macro