Searched refs:GCC_PCIE_1_PHY_BCR (Results 1 – 25 of 28) sorted by relevance
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| /linux-6.1.9/include/dt-bindings/reset/ |
| D | qcom,gcc-apq8084.h | 93 #define GCC_PCIE_1_PHY_BCR 84 macro
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| /linux-6.1.9/include/dt-bindings/clock/ |
| D | qcom,gcc-sc7280.h | 212 #define GCC_PCIE_1_PHY_BCR 3 macro
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| D | qcom,gcc-sm8450.h | 212 #define GCC_PCIE_1_PHY_BCR 12 macro
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| D | qcom,gcc-sdm845.h | 230 #define GCC_PCIE_1_PHY_BCR 25 macro
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| D | qcom,gcc-sm8150.h | 220 #define GCC_PCIE_1_PHY_BCR 7 macro
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| D | qcom,gcc-sm8250.h | 224 #define GCC_PCIE_1_PHY_BCR 12 macro
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| D | qcom,gcc-sm8350.h | 227 #define GCC_PCIE_1_PHY_BCR 12 macro
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| D | qcom,gcc-sc8180x.h | 257 #define GCC_PCIE_1_PHY_BCR 7 macro
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| D | qcom,gcc-msm8996.h | 322 #define GCC_PCIE_1_PHY_BCR 82 macro
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| D | qcom,gcc-sc8280xp.h | 411 #define GCC_PCIE_1_PHY_BCR 9 macro
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| /linux-6.1.9/Documentation/devicetree/bindings/phy/ |
| D | qcom,msm8996-qmp-pcie-phy.yaml | 168 resets = <&gcc GCC_PCIE_1_PHY_BCR>;
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| D | qcom,qmp-pcie-phy.yaml | 275 resets = <&gcc GCC_PCIE_1_PHY_BCR>;
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| /linux-6.1.9/drivers/clk/qcom/ |
| D | gcc-sm8450.c | 3143 [GCC_PCIE_1_PHY_BCR] = { 0x9e01c },
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| D | gcc-apq8084.c | 3565 [GCC_PCIE_1_PHY_BCR] = { 0x1b80 },
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| D | gcc-sc7280.c | 3391 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
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| D | gcc-sm8250.c | 3549 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
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| D | gcc-sm8150.c | 3737 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
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| D | gcc-sm8350.c | 3759 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
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| D | gcc-msm8996.c | 3786 [GCC_PCIE_1_PHY_BCR] = { 0x6d038 },
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| D | gcc-sdm845.c | 3899 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
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| D | gcc-sc8180x.c | 4497 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
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| D | gcc-sc8280xp.c | 7269 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
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| /linux-6.1.9/arch/arm64/boot/dts/qcom/ |
| D | msm8996.dtsi | 648 resets = <&gcc GCC_PCIE_1_PHY_BCR>;
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| D | sm8450.dtsi | 1907 resets = <&gcc GCC_PCIE_1_PHY_BCR>;
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| D | sm8150.dtsi | 1944 resets = <&gcc GCC_PCIE_1_PHY_BCR>;
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