Searched refs:G4X_WM_LEVEL_SR (Results 1 – 2 of 2) sorted by relevance
1059 dev_priv->display.wm.pri_latency[G4X_WM_LEVEL_SR] = 12; in g4x_setup_wm_latency()1097 case G4X_WM_LEVEL_SR: in g4x_fbc_fifo_size()1186 level = max(level, G4X_WM_LEVEL_SR); in g4x_raw_fbc_wm_set()1263 crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].plane[plane_id], in g4x_raw_plane_wm_compute()1269 crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].fbc, in g4x_raw_plane_wm_compute()1308 if (level <= G4X_WM_LEVEL_SR) { in g4x_invalidate_wms()1326 if (level < G4X_WM_LEVEL_SR) in g4x_compute_fbc_en()1329 if (level >= G4X_WM_LEVEL_SR && in g4x_compute_fbc_en()1330 wm_state->sr.fbc > g4x_fbc_fifo_size(G4X_WM_LEVEL_SR)) in g4x_compute_fbc_en()1377 level = G4X_WM_LEVEL_SR; in g4x_compute_pipe_wm()[all …]
874 G4X_WM_LEVEL_SR, enumerator