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Searched refs:EN0_DCFG (Results 1 – 7 of 7) sorted by relevance

/linux-6.1.9/drivers/net/ethernet/8390/
D8390.h189 #define EN0_DCFG EI_SHIFT(0x0e) /* Data configuration reg WR */ macro
Dne2k-pci.c323 {0x49, EN0_DCFG}, in ne2k_pci_init_one()
358 outb(0x49, ioaddr + EN0_DCFG); in ne2k_pci_init_one()
Dne.c372 {0x48, EN0_DCFG}, /* Set byte-wide (0x48) access. */ in ne_probe1()
402 outb_p(DCR_VAL, ioaddr + EN0_DCFG); in ne_probe1()
Dax88796.c669 ei_outb(ax->plat->dcr_val & ~1, ioaddr + EN0_DCFG); in ax_initial_setup()
741 ei_outb(ax->plat->dcr_val, ei_local->mem + EN0_DCFG); in ax_init_dev()
Daxnet_cs.c198 {0x01, EN0_DCFG}, /* Set word-wide access. */ in get_prom()
1641 outb_p(endcfg, e8390_base + EN0_DCFG); /* 0x48 or 0x49 */ in AX88190_init()
Dpcnet_cs.c338 {0x48, EN0_DCFG}, /* Set byte-wide (0x48) access. */ in get_prom()
416 outb_p(0x01, ioaddr + EN0_DCFG); /* Set word-wide access. */ in get_ax88190()
Dlib8390.c1027 ei_outb_p(endcfg, e8390_base + EN0_DCFG); /* 0x48 or 0x49 */ in __NS8390_init()