Searched refs:EN0_DCFG (Results 1 – 7 of 7) sorted by relevance
/linux-6.1.9/drivers/net/ethernet/8390/ |
D | 8390.h | 189 #define EN0_DCFG EI_SHIFT(0x0e) /* Data configuration reg WR */ macro
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D | ne2k-pci.c | 323 {0x49, EN0_DCFG}, in ne2k_pci_init_one() 358 outb(0x49, ioaddr + EN0_DCFG); in ne2k_pci_init_one()
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D | ne.c | 372 {0x48, EN0_DCFG}, /* Set byte-wide (0x48) access. */ in ne_probe1() 402 outb_p(DCR_VAL, ioaddr + EN0_DCFG); in ne_probe1()
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D | ax88796.c | 669 ei_outb(ax->plat->dcr_val & ~1, ioaddr + EN0_DCFG); in ax_initial_setup() 741 ei_outb(ax->plat->dcr_val, ei_local->mem + EN0_DCFG); in ax_init_dev()
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D | axnet_cs.c | 198 {0x01, EN0_DCFG}, /* Set word-wide access. */ in get_prom() 1641 outb_p(endcfg, e8390_base + EN0_DCFG); /* 0x48 or 0x49 */ in AX88190_init()
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D | pcnet_cs.c | 338 {0x48, EN0_DCFG}, /* Set byte-wide (0x48) access. */ in get_prom() 416 outb_p(0x01, ioaddr + EN0_DCFG); /* Set word-wide access. */ in get_ax88190()
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D | lib8390.c | 1027 ei_outb_p(endcfg, e8390_base + EN0_DCFG); /* 0x48 or 0x49 */ in __NS8390_init()
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