1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Host communication command constants for ChromeOS EC
4  *
5  * Copyright (C) 2012 Google, Inc
6  *
7  * NOTE: This file is auto-generated from ChromeOS EC Open Source code from
8  * https://chromium.googlesource.com/chromiumos/platform/ec/+/master/include/ec_commands.h
9  */
10 
11 /* Host communication command constants for Chrome EC */
12 
13 #ifndef __CROS_EC_COMMANDS_H
14 #define __CROS_EC_COMMANDS_H
15 
16 #include <linux/bits.h>
17 #include <linux/types.h>
18 
19 #define BUILD_ASSERT(_cond)
20 
21 /*
22  * Current version of this protocol
23  *
24  * TODO(crosbug.com/p/11223): This is effectively useless; protocol is
25  * determined in other ways.  Remove this once the kernel code no longer
26  * depends on it.
27  */
28 #define EC_PROTO_VERSION          0x00000002
29 
30 /* Command version mask */
31 #define EC_VER_MASK(version) BIT(version)
32 
33 /* I/O addresses for ACPI commands */
34 #define EC_LPC_ADDR_ACPI_DATA  0x62
35 #define EC_LPC_ADDR_ACPI_CMD   0x66
36 
37 /* I/O addresses for host command */
38 #define EC_LPC_ADDR_HOST_DATA  0x200
39 #define EC_LPC_ADDR_HOST_CMD   0x204
40 
41 /* I/O addresses for host command args and params */
42 /* Protocol version 2 */
43 #define EC_LPC_ADDR_HOST_ARGS    0x800  /* And 0x801, 0x802, 0x803 */
44 #define EC_LPC_ADDR_HOST_PARAM   0x804  /* For version 2 params; size is
45 					 * EC_PROTO2_MAX_PARAM_SIZE
46 					 */
47 /* Protocol version 3 */
48 #define EC_LPC_ADDR_HOST_PACKET  0x800  /* Offset of version 3 packet */
49 #define EC_LPC_HOST_PACKET_SIZE  0x100  /* Max size of version 3 packet */
50 
51 /*
52  * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
53  * and they tell the kernel that so we have to think of it as two parts.
54  *
55  * Other BIOSes report only the I/O port region spanned by the Microchip
56  * MEC series EC; an attempt to address a larger region may fail.
57  */
58 #define EC_HOST_CMD_REGION0       0x800
59 #define EC_HOST_CMD_REGION1       0x880
60 #define EC_HOST_CMD_REGION_SIZE    0x80
61 #define EC_HOST_CMD_MEC_REGION_SIZE 0x8
62 
63 /* EC command register bit functions */
64 #define EC_LPC_CMDR_DATA	BIT(0)  /* Data ready for host to read */
65 #define EC_LPC_CMDR_PENDING	BIT(1)  /* Write pending to EC */
66 #define EC_LPC_CMDR_BUSY	BIT(2)  /* EC is busy processing a command */
67 #define EC_LPC_CMDR_CMD		BIT(3)  /* Last host write was a command */
68 #define EC_LPC_CMDR_ACPI_BRST	BIT(4)  /* Burst mode (not used) */
69 #define EC_LPC_CMDR_SCI		BIT(5)  /* SCI event is pending */
70 #define EC_LPC_CMDR_SMI		BIT(6)  /* SMI event is pending */
71 
72 #define EC_LPC_ADDR_MEMMAP       0x900
73 #define EC_MEMMAP_SIZE         255 /* ACPI IO buffer max is 255 bytes */
74 #define EC_MEMMAP_TEXT_MAX     8   /* Size of a string in the memory map */
75 
76 /* The offset address of each type of data in mapped memory. */
77 #define EC_MEMMAP_TEMP_SENSOR      0x00 /* Temp sensors 0x00 - 0x0f */
78 #define EC_MEMMAP_FAN              0x10 /* Fan speeds 0x10 - 0x17 */
79 #define EC_MEMMAP_TEMP_SENSOR_B    0x18 /* More temp sensors 0x18 - 0x1f */
80 #define EC_MEMMAP_ID               0x20 /* 0x20 == 'E', 0x21 == 'C' */
81 #define EC_MEMMAP_ID_VERSION       0x22 /* Version of data in 0x20 - 0x2f */
82 #define EC_MEMMAP_THERMAL_VERSION  0x23 /* Version of data in 0x00 - 0x1f */
83 #define EC_MEMMAP_BATTERY_VERSION  0x24 /* Version of data in 0x40 - 0x7f */
84 #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */
85 #define EC_MEMMAP_EVENTS_VERSION   0x26 /* Version of data in 0x34 - 0x3f */
86 #define EC_MEMMAP_HOST_CMD_FLAGS   0x27 /* Host cmd interface flags (8 bits) */
87 /* Unused 0x28 - 0x2f */
88 #define EC_MEMMAP_SWITCHES         0x30	/* 8 bits */
89 /* Unused 0x31 - 0x33 */
90 #define EC_MEMMAP_HOST_EVENTS      0x34 /* 64 bits */
91 /* Battery values are all 32 bits, unless otherwise noted. */
92 #define EC_MEMMAP_BATT_VOLT        0x40 /* Battery Present Voltage */
93 #define EC_MEMMAP_BATT_RATE        0x44 /* Battery Present Rate */
94 #define EC_MEMMAP_BATT_CAP         0x48 /* Battery Remaining Capacity */
95 #define EC_MEMMAP_BATT_FLAG        0x4c /* Battery State, see below (8-bit) */
96 #define EC_MEMMAP_BATT_COUNT       0x4d /* Battery Count (8-bit) */
97 #define EC_MEMMAP_BATT_INDEX       0x4e /* Current Battery Data Index (8-bit) */
98 /* Unused 0x4f */
99 #define EC_MEMMAP_BATT_DCAP        0x50 /* Battery Design Capacity */
100 #define EC_MEMMAP_BATT_DVLT        0x54 /* Battery Design Voltage */
101 #define EC_MEMMAP_BATT_LFCC        0x58 /* Battery Last Full Charge Capacity */
102 #define EC_MEMMAP_BATT_CCNT        0x5c /* Battery Cycle Count */
103 /* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */
104 #define EC_MEMMAP_BATT_MFGR        0x60 /* Battery Manufacturer String */
105 #define EC_MEMMAP_BATT_MODEL       0x68 /* Battery Model Number String */
106 #define EC_MEMMAP_BATT_SERIAL      0x70 /* Battery Serial Number String */
107 #define EC_MEMMAP_BATT_TYPE        0x78 /* Battery Type String */
108 #define EC_MEMMAP_ALS              0x80 /* ALS readings in lux (2 X 16 bits) */
109 /* Unused 0x84 - 0x8f */
110 #define EC_MEMMAP_ACC_STATUS       0x90 /* Accelerometer status (8 bits )*/
111 /* Unused 0x91 */
112 #define EC_MEMMAP_ACC_DATA         0x92 /* Accelerometers data 0x92 - 0x9f */
113 /* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */
114 /* 0x94 - 0x99: 1st Accelerometer */
115 /* 0x9a - 0x9f: 2nd Accelerometer */
116 #define EC_MEMMAP_GYRO_DATA        0xa0 /* Gyroscope data 0xa0 - 0xa5 */
117 /* Unused 0xa6 - 0xdf */
118 
119 /*
120  * ACPI is unable to access memory mapped data at or above this offset due to
121  * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe
122  * which might be needed by ACPI.
123  */
124 #define EC_MEMMAP_NO_ACPI 0xe0
125 
126 /* Define the format of the accelerometer mapped memory status byte. */
127 #define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK  0x0f
128 #define EC_MEMMAP_ACC_STATUS_BUSY_BIT        BIT(4)
129 #define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT    BIT(7)
130 
131 /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */
132 #define EC_TEMP_SENSOR_ENTRIES     16
133 /*
134  * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B.
135  *
136  * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2.
137  */
138 #define EC_TEMP_SENSOR_B_ENTRIES      8
139 
140 /* Special values for mapped temperature sensors */
141 #define EC_TEMP_SENSOR_NOT_PRESENT    0xff
142 #define EC_TEMP_SENSOR_ERROR          0xfe
143 #define EC_TEMP_SENSOR_NOT_POWERED    0xfd
144 #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc
145 /*
146  * The offset of temperature value stored in mapped memory.  This allows
147  * reporting a temperature range of 200K to 454K = -73C to 181C.
148  */
149 #define EC_TEMP_SENSOR_OFFSET      200
150 
151 /*
152  * Number of ALS readings at EC_MEMMAP_ALS
153  */
154 #define EC_ALS_ENTRIES             2
155 
156 /*
157  * The default value a temperature sensor will return when it is present but
158  * has not been read this boot.  This is a reasonable number to avoid
159  * triggering alarms on the host.
160  */
161 #define EC_TEMP_SENSOR_DEFAULT     (296 - EC_TEMP_SENSOR_OFFSET)
162 
163 #define EC_FAN_SPEED_ENTRIES       4       /* Number of fans at EC_MEMMAP_FAN */
164 #define EC_FAN_SPEED_NOT_PRESENT   0xffff  /* Entry not present */
165 #define EC_FAN_SPEED_STALLED       0xfffe  /* Fan stalled */
166 
167 /* Battery bit flags at EC_MEMMAP_BATT_FLAG. */
168 #define EC_BATT_FLAG_AC_PRESENT   0x01
169 #define EC_BATT_FLAG_BATT_PRESENT 0x02
170 #define EC_BATT_FLAG_DISCHARGING  0x04
171 #define EC_BATT_FLAG_CHARGING     0x08
172 #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10
173 /* Set if some of the static/dynamic data is invalid (or outdated). */
174 #define EC_BATT_FLAG_INVALID_DATA 0x20
175 
176 /* Switch flags at EC_MEMMAP_SWITCHES */
177 #define EC_SWITCH_LID_OPEN               0x01
178 #define EC_SWITCH_POWER_BUTTON_PRESSED   0x02
179 #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04
180 /* Was recovery requested via keyboard; now unused. */
181 #define EC_SWITCH_IGNORE1		 0x08
182 /* Recovery requested via dedicated signal (from servo board) */
183 #define EC_SWITCH_DEDICATED_RECOVERY     0x10
184 /* Was fake developer mode switch; now unused.  Remove in next refactor. */
185 #define EC_SWITCH_IGNORE0                0x20
186 
187 /* Host command interface flags */
188 /* Host command interface supports LPC args (LPC interface only) */
189 #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED  0x01
190 /* Host command interface supports version 3 protocol */
191 #define EC_HOST_CMD_FLAG_VERSION_3   0x02
192 
193 /* Wireless switch flags */
194 #define EC_WIRELESS_SWITCH_ALL       ~0x00  /* All flags */
195 #define EC_WIRELESS_SWITCH_WLAN       0x01  /* WLAN radio */
196 #define EC_WIRELESS_SWITCH_BLUETOOTH  0x02  /* Bluetooth radio */
197 #define EC_WIRELESS_SWITCH_WWAN       0x04  /* WWAN power */
198 #define EC_WIRELESS_SWITCH_WLAN_POWER 0x08  /* WLAN power */
199 
200 /*****************************************************************************/
201 /*
202  * ACPI commands
203  *
204  * These are valid ONLY on the ACPI command/data port.
205  */
206 
207 /*
208  * ACPI Read Embedded Controller
209  *
210  * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
211  *
212  * Use the following sequence:
213  *
214  *    - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD
215  *    - Wait for EC_LPC_CMDR_PENDING bit to clear
216  *    - Write address to EC_LPC_ADDR_ACPI_DATA
217  *    - Wait for EC_LPC_CMDR_DATA bit to set
218  *    - Read value from EC_LPC_ADDR_ACPI_DATA
219  */
220 #define EC_CMD_ACPI_READ 0x0080
221 
222 /*
223  * ACPI Write Embedded Controller
224  *
225  * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
226  *
227  * Use the following sequence:
228  *
229  *    - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD
230  *    - Wait for EC_LPC_CMDR_PENDING bit to clear
231  *    - Write address to EC_LPC_ADDR_ACPI_DATA
232  *    - Wait for EC_LPC_CMDR_PENDING bit to clear
233  *    - Write value to EC_LPC_ADDR_ACPI_DATA
234  */
235 #define EC_CMD_ACPI_WRITE 0x0081
236 
237 /*
238  * ACPI Burst Enable Embedded Controller
239  *
240  * This enables burst mode on the EC to allow the host to issue several
241  * commands back-to-back. While in this mode, writes to mapped multi-byte
242  * data are locked out to ensure data consistency.
243  */
244 #define EC_CMD_ACPI_BURST_ENABLE 0x0082
245 
246 /*
247  * ACPI Burst Disable Embedded Controller
248  *
249  * This disables burst mode on the EC and stops preventing EC writes to mapped
250  * multi-byte data.
251  */
252 #define EC_CMD_ACPI_BURST_DISABLE 0x0083
253 
254 /*
255  * ACPI Query Embedded Controller
256  *
257  * This clears the lowest-order bit in the currently pending host events, and
258  * sets the result code to the 1-based index of the bit (event 0x00000001 = 1,
259  * event 0x80000000 = 32), or 0 if no event was pending.
260  */
261 #define EC_CMD_ACPI_QUERY_EVENT 0x0084
262 
263 /* Valid addresses in ACPI memory space, for read/write commands */
264 
265 /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */
266 #define EC_ACPI_MEM_VERSION            0x00
267 /*
268  * Test location; writing value here updates test compliment byte to (0xff -
269  * value).
270  */
271 #define EC_ACPI_MEM_TEST               0x01
272 /* Test compliment; writes here are ignored. */
273 #define EC_ACPI_MEM_TEST_COMPLIMENT    0x02
274 
275 /* Keyboard backlight brightness percent (0 - 100) */
276 #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03
277 /* DPTF Target Fan Duty (0-100, 0xff for auto/none) */
278 #define EC_ACPI_MEM_FAN_DUTY           0x04
279 
280 /*
281  * DPTF temp thresholds. Any of the EC's temp sensors can have up to two
282  * independent thresholds attached to them. The current value of the ID
283  * register determines which sensor is affected by the THRESHOLD and COMMIT
284  * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme
285  * as the memory-mapped sensors. The COMMIT register applies those settings.
286  *
287  * The spec does not mandate any way to read back the threshold settings
288  * themselves, but when a threshold is crossed the AP needs a way to determine
289  * which sensor(s) are responsible. Each reading of the ID register clears and
290  * returns one sensor ID that has crossed one of its threshold (in either
291  * direction) since the last read. A value of 0xFF means "no new thresholds
292  * have tripped". Setting or enabling the thresholds for a sensor will clear
293  * the unread event count for that sensor.
294  */
295 #define EC_ACPI_MEM_TEMP_ID            0x05
296 #define EC_ACPI_MEM_TEMP_THRESHOLD     0x06
297 #define EC_ACPI_MEM_TEMP_COMMIT        0x07
298 /*
299  * Here are the bits for the COMMIT register:
300  *   bit 0 selects the threshold index for the chosen sensor (0/1)
301  *   bit 1 enables/disables the selected threshold (0 = off, 1 = on)
302  * Each write to the commit register affects one threshold.
303  */
304 #define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0)
305 #define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK BIT(1)
306 /*
307  * Example:
308  *
309  * Set the thresholds for sensor 2 to 50 C and 60 C:
310  *   write 2 to [0x05]      --  select temp sensor 2
311  *   write 0x7b to [0x06]   --  C_TO_K(50) - EC_TEMP_SENSOR_OFFSET
312  *   write 0x2 to [0x07]    --  enable threshold 0 with this value
313  *   write 0x85 to [0x06]   --  C_TO_K(60) - EC_TEMP_SENSOR_OFFSET
314  *   write 0x3 to [0x07]    --  enable threshold 1 with this value
315  *
316  * Disable the 60 C threshold, leaving the 50 C threshold unchanged:
317  *   write 2 to [0x05]      --  select temp sensor 2
318  *   write 0x1 to [0x07]    --  disable threshold 1
319  */
320 
321 /* DPTF battery charging current limit */
322 #define EC_ACPI_MEM_CHARGING_LIMIT     0x08
323 
324 /* Charging limit is specified in 64 mA steps */
325 #define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA   64
326 /* Value to disable DPTF battery charging limit */
327 #define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED  0xff
328 
329 /*
330  * Report device orientation
331  *  Bits       Definition
332  *  3:1        Device DPTF Profile Number (DDPN)
333  *               0   = Reserved for backward compatibility (indicates no valid
334  *                     profile number. Host should fall back to using TBMD).
335  *              1..7 = DPTF Profile number to indicate to host which table needs
336  *                     to be loaded.
337  *   0         Tablet Mode Device Indicator (TBMD)
338  */
339 #define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09
340 #define EC_ACPI_MEM_TBMD_SHIFT         0
341 #define EC_ACPI_MEM_TBMD_MASK          0x1
342 #define EC_ACPI_MEM_DDPN_SHIFT         1
343 #define EC_ACPI_MEM_DDPN_MASK          0x7
344 
345 /*
346  * Report device features. Uses the same format as the host command, except:
347  *
348  * bit 0 (EC_FEATURE_LIMITED) changes meaning from "EC code has a limited set
349  * of features", which is of limited interest when the system is already
350  * interpreting ACPI bytecode, to "EC_FEATURES[0-7] is not supported". Since
351  * these are supported, it defaults to 0.
352  * This allows detecting the presence of this field since older versions of
353  * the EC codebase would simply return 0xff to that unknown address. Check
354  * FEATURES0 != 0xff (or FEATURES0[0] == 0) to make sure that the other bits
355  * are valid.
356  */
357 #define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a
358 #define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b
359 #define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c
360 #define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d
361 #define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e
362 #define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f
363 #define EC_ACPI_MEM_DEVICE_FEATURES6 0x10
364 #define EC_ACPI_MEM_DEVICE_FEATURES7 0x11
365 
366 #define EC_ACPI_MEM_BATTERY_INDEX    0x12
367 
368 /*
369  * USB Port Power. Each bit indicates whether the corresponding USB ports' power
370  * is enabled (1) or disabled (0).
371  *   bit 0 USB port ID 0
372  *   ...
373  *   bit 7 USB port ID 7
374  */
375 #define EC_ACPI_MEM_USB_PORT_POWER 0x13
376 
377 /*
378  * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf.  This data
379  * is read-only from the AP.  Added in EC_ACPI_MEM_VERSION 2.
380  */
381 #define EC_ACPI_MEM_MAPPED_BEGIN   0x20
382 #define EC_ACPI_MEM_MAPPED_SIZE    0xe0
383 
384 /* Current version of ACPI memory address space */
385 #define EC_ACPI_MEM_VERSION_CURRENT 2
386 
387 
388 /*
389  * This header file is used in coreboot both in C and ACPI code.  The ACPI code
390  * is pre-processed to handle constants but the ASL compiler is unable to
391  * handle actual C code so keep it separate.
392  */
393 
394 
395 /*
396  * Attributes for EC request and response packets.  Just defining __packed
397  * results in inefficient assembly code on ARM, if the structure is actually
398  * 32-bit aligned, as it should be for all buffers.
399  *
400  * Be very careful when adding these to existing structures.  They will round
401  * up the structure size to the specified boundary.
402  *
403  * Also be very careful to make that if a structure is included in some other
404  * parent structure that the alignment will still be true given the packing of
405  * the parent structure.  This is particularly important if the sub-structure
406  * will be passed as a pointer to another function, since that function will
407  * not know about the misaligment caused by the parent structure's packing.
408  *
409  * Also be very careful using __packed - particularly when nesting non-packed
410  * structures inside packed ones.  In fact, DO NOT use __packed directly;
411  * always use one of these attributes.
412  *
413  * Once everything is annotated properly, the following search strings should
414  * not return ANY matches in this file other than right here:
415  *
416  * "__packed" - generates inefficient code; all sub-structs must also be packed
417  *
418  * "struct [^_]" - all structs should be annotated, except for structs that are
419  * members of other structs/unions (and their original declarations should be
420  * annotated).
421  */
422 
423 /*
424  * Packed structures make no assumption about alignment, so they do inefficient
425  * byte-wise reads.
426  */
427 #define __ec_align1 __packed
428 #define __ec_align2 __packed
429 #define __ec_align4 __packed
430 #define __ec_align_size1 __packed
431 #define __ec_align_offset1 __packed
432 #define __ec_align_offset2 __packed
433 #define __ec_todo_packed __packed
434 #define __ec_todo_unpacked
435 
436 
437 /* LPC command status byte masks */
438 /* EC has written a byte in the data register and host hasn't read it yet */
439 #define EC_LPC_STATUS_TO_HOST     0x01
440 /* Host has written a command/data byte and the EC hasn't read it yet */
441 #define EC_LPC_STATUS_FROM_HOST   0x02
442 /* EC is processing a command */
443 #define EC_LPC_STATUS_PROCESSING  0x04
444 /* Last write to EC was a command, not data */
445 #define EC_LPC_STATUS_LAST_CMD    0x08
446 /* EC is in burst mode */
447 #define EC_LPC_STATUS_BURST_MODE  0x10
448 /* SCI event is pending (requesting SCI query) */
449 #define EC_LPC_STATUS_SCI_PENDING 0x20
450 /* SMI event is pending (requesting SMI query) */
451 #define EC_LPC_STATUS_SMI_PENDING 0x40
452 /* (reserved) */
453 #define EC_LPC_STATUS_RESERVED    0x80
454 
455 /*
456  * EC is busy.  This covers both the EC processing a command, and the host has
457  * written a new command but the EC hasn't picked it up yet.
458  */
459 #define EC_LPC_STATUS_BUSY_MASK \
460 	(EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING)
461 
462 /*
463  * Host command response codes (16-bit).  Note that response codes should be
464  * stored in a uint16_t rather than directly in a value of this type.
465  */
466 enum ec_status {
467 	EC_RES_SUCCESS = 0,
468 	EC_RES_INVALID_COMMAND = 1,
469 	EC_RES_ERROR = 2,
470 	EC_RES_INVALID_PARAM = 3,
471 	EC_RES_ACCESS_DENIED = 4,
472 	EC_RES_INVALID_RESPONSE = 5,
473 	EC_RES_INVALID_VERSION = 6,
474 	EC_RES_INVALID_CHECKSUM = 7,
475 	EC_RES_IN_PROGRESS = 8,		/* Accepted, command in progress */
476 	EC_RES_UNAVAILABLE = 9,		/* No response available */
477 	EC_RES_TIMEOUT = 10,		/* We got a timeout */
478 	EC_RES_OVERFLOW = 11,		/* Table / data overflow */
479 	EC_RES_INVALID_HEADER = 12,     /* Header contains invalid data */
480 	EC_RES_REQUEST_TRUNCATED = 13,  /* Didn't get the entire request */
481 	EC_RES_RESPONSE_TOO_BIG = 14,   /* Response was too big to handle */
482 	EC_RES_BUS_ERROR = 15,		/* Communications bus error */
483 	EC_RES_BUSY = 16,		/* Up but too busy.  Should retry */
484 	EC_RES_INVALID_HEADER_VERSION = 17,  /* Header version invalid */
485 	EC_RES_INVALID_HEADER_CRC = 18,      /* Header CRC invalid */
486 	EC_RES_INVALID_DATA_CRC = 19,        /* Data CRC invalid */
487 	EC_RES_DUP_UNAVAILABLE = 20,         /* Can't resend response */
488 };
489 
490 /*
491  * Host event codes.  Note these are 1-based, not 0-based, because ACPI query
492  * EC command uses code 0 to mean "no event pending".  We explicitly specify
493  * each value in the enum listing so they won't change if we delete/insert an
494  * item or rearrange the list (it needs to be stable across platforms, not
495  * just within a single compiled instance).
496  */
497 enum host_event_code {
498 	EC_HOST_EVENT_LID_CLOSED = 1,
499 	EC_HOST_EVENT_LID_OPEN = 2,
500 	EC_HOST_EVENT_POWER_BUTTON = 3,
501 	EC_HOST_EVENT_AC_CONNECTED = 4,
502 	EC_HOST_EVENT_AC_DISCONNECTED = 5,
503 	EC_HOST_EVENT_BATTERY_LOW = 6,
504 	EC_HOST_EVENT_BATTERY_CRITICAL = 7,
505 	EC_HOST_EVENT_BATTERY = 8,
506 	EC_HOST_EVENT_THERMAL_THRESHOLD = 9,
507 	/* Event generated by a device attached to the EC */
508 	EC_HOST_EVENT_DEVICE = 10,
509 	EC_HOST_EVENT_THERMAL = 11,
510 	EC_HOST_EVENT_USB_CHARGER = 12,
511 	EC_HOST_EVENT_KEY_PRESSED = 13,
512 	/*
513 	 * EC has finished initializing the host interface.  The host can check
514 	 * for this event following sending a EC_CMD_REBOOT_EC command to
515 	 * determine when the EC is ready to accept subsequent commands.
516 	 */
517 	EC_HOST_EVENT_INTERFACE_READY = 14,
518 	/* Keyboard recovery combo has been pressed */
519 	EC_HOST_EVENT_KEYBOARD_RECOVERY = 15,
520 
521 	/* Shutdown due to thermal overload */
522 	EC_HOST_EVENT_THERMAL_SHUTDOWN = 16,
523 	/* Shutdown due to battery level too low */
524 	EC_HOST_EVENT_BATTERY_SHUTDOWN = 17,
525 
526 	/* Suggest that the AP throttle itself */
527 	EC_HOST_EVENT_THROTTLE_START = 18,
528 	/* Suggest that the AP resume normal speed */
529 	EC_HOST_EVENT_THROTTLE_STOP = 19,
530 
531 	/* Hang detect logic detected a hang and host event timeout expired */
532 	EC_HOST_EVENT_HANG_DETECT = 20,
533 	/* Hang detect logic detected a hang and warm rebooted the AP */
534 	EC_HOST_EVENT_HANG_REBOOT = 21,
535 
536 	/* PD MCU triggering host event */
537 	EC_HOST_EVENT_PD_MCU = 22,
538 
539 	/* Battery Status flags have changed */
540 	EC_HOST_EVENT_BATTERY_STATUS = 23,
541 
542 	/* EC encountered a panic, triggering a reset */
543 	EC_HOST_EVENT_PANIC = 24,
544 
545 	/* Keyboard fastboot combo has been pressed */
546 	EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25,
547 
548 	/* EC RTC event occurred */
549 	EC_HOST_EVENT_RTC = 26,
550 
551 	/* Emulate MKBP event */
552 	EC_HOST_EVENT_MKBP = 27,
553 
554 	/* EC desires to change state of host-controlled USB mux */
555 	EC_HOST_EVENT_USB_MUX = 28,
556 
557 	/* TABLET/LAPTOP mode or detachable base attach/detach event */
558 	EC_HOST_EVENT_MODE_CHANGE = 29,
559 
560 	/* Keyboard recovery combo with hardware reinitialization */
561 	EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30,
562 
563 	/* WoV */
564 	EC_HOST_EVENT_WOV = 31,
565 
566 	/*
567 	 * The high bit of the event mask is not used as a host event code.  If
568 	 * it reads back as set, then the entire event mask should be
569 	 * considered invalid by the host.  This can happen when reading the
570 	 * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is
571 	 * not initialized on the EC, or improperly configured on the host.
572 	 */
573 	EC_HOST_EVENT_INVALID = 32
574 };
575 /* Host event mask */
576 #define EC_HOST_EVENT_MASK(event_code) BIT_ULL((event_code) - 1)
577 
578 /**
579  * struct ec_lpc_host_args - Arguments at EC_LPC_ADDR_HOST_ARGS
580  * @flags: The host argument flags.
581  * @command_version: Command version.
582  * @data_size: The length of data.
583  * @checksum: Checksum; sum of command + flags + command_version + data_size +
584  *            all params/response data bytes.
585  */
586 struct ec_lpc_host_args {
587 	uint8_t flags;
588 	uint8_t command_version;
589 	uint8_t data_size;
590 	uint8_t checksum;
591 } __ec_align4;
592 
593 /* Flags for ec_lpc_host_args.flags */
594 /*
595  * Args are from host.  Data area at EC_LPC_ADDR_HOST_PARAM contains command
596  * params.
597  *
598  * If EC gets a command and this flag is not set, this is an old-style command.
599  * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with
600  * unknown length.  EC must respond with an old-style response (that is,
601  * without setting EC_HOST_ARGS_FLAG_TO_HOST).
602  */
603 #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01
604 /*
605  * Args are from EC.  Data area at EC_LPC_ADDR_HOST_PARAM contains response.
606  *
607  * If EC responds to a command and this flag is not set, this is an old-style
608  * response.  Command version is 0 and response data from EC is at
609  * EC_LPC_ADDR_OLD_PARAM with unknown length.
610  */
611 #define EC_HOST_ARGS_FLAG_TO_HOST   0x02
612 
613 /*****************************************************************************/
614 /*
615  * Byte codes returned by EC over SPI interface.
616  *
617  * These can be used by the AP to debug the EC interface, and to determine
618  * when the EC is not in a state where it will ever get around to responding
619  * to the AP.
620  *
621  * Example of sequence of bytes read from EC for a current good transfer:
622  *   1. -                  - AP asserts chip select (CS#)
623  *   2. EC_SPI_OLD_READY   - AP sends first byte(s) of request
624  *   3. -                  - EC starts handling CS# interrupt
625  *   4. EC_SPI_RECEIVING   - AP sends remaining byte(s) of request
626  *   5. EC_SPI_PROCESSING  - EC starts processing request; AP is clocking in
627  *                           bytes looking for EC_SPI_FRAME_START
628  *   6. -                  - EC finishes processing and sets up response
629  *   7. EC_SPI_FRAME_START - AP reads frame byte
630  *   8. (response packet)  - AP reads response packet
631  *   9. EC_SPI_PAST_END    - Any additional bytes read by AP
632  *   10 -                  - AP deasserts chip select
633  *   11 -                  - EC processes CS# interrupt and sets up DMA for
634  *                           next request
635  *
636  * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than
637  * the following byte values:
638  *   EC_SPI_OLD_READY
639  *   EC_SPI_RX_READY
640  *   EC_SPI_RECEIVING
641  *   EC_SPI_PROCESSING
642  *
643  * Then the EC found an error in the request, or was not ready for the request
644  * and lost data.  The AP should give up waiting for EC_SPI_FRAME_START,
645  * because the EC is unable to tell when the AP is done sending its request.
646  */
647 
648 /*
649  * Framing byte which precedes a response packet from the EC.  After sending a
650  * request, the AP will clock in bytes until it sees the framing byte, then
651  * clock in the response packet.
652  */
653 #define EC_SPI_FRAME_START    0xec
654 
655 /*
656  * Padding bytes which are clocked out after the end of a response packet.
657  */
658 #define EC_SPI_PAST_END       0xed
659 
660 /*
661  * EC is ready to receive, and has ignored the byte sent by the AP.  EC expects
662  * that the AP will send a valid packet header (starting with
663  * EC_COMMAND_PROTOCOL_3) in the next 32 bytes.
664  */
665 #define EC_SPI_RX_READY       0xf8
666 
667 /*
668  * EC has started receiving the request from the AP, but hasn't started
669  * processing it yet.
670  */
671 #define EC_SPI_RECEIVING      0xf9
672 
673 /* EC has received the entire request from the AP and is processing it. */
674 #define EC_SPI_PROCESSING     0xfa
675 
676 /*
677  * EC received bad data from the AP, such as a packet header with an invalid
678  * length.  EC will ignore all data until chip select deasserts.
679  */
680 #define EC_SPI_RX_BAD_DATA    0xfb
681 
682 /*
683  * EC received data from the AP before it was ready.  That is, the AP asserted
684  * chip select and started clocking data before the EC was ready to receive it.
685  * EC will ignore all data until chip select deasserts.
686  */
687 #define EC_SPI_NOT_READY      0xfc
688 
689 /*
690  * EC was ready to receive a request from the AP.  EC has treated the byte sent
691  * by the AP as part of a request packet, or (for old-style ECs) is processing
692  * a fully received packet but is not ready to respond yet.
693  */
694 #define EC_SPI_OLD_READY      0xfd
695 
696 /*****************************************************************************/
697 
698 /*
699  * Protocol version 2 for I2C and SPI send a request this way:
700  *
701  *	0	EC_CMD_VERSION0 + (command version)
702  *	1	Command number
703  *	2	Length of params = N
704  *	3..N+2	Params, if any
705  *	N+3	8-bit checksum of bytes 0..N+2
706  *
707  * The corresponding response is:
708  *
709  *	0	Result code (EC_RES_*)
710  *	1	Length of params = M
711  *	2..M+1	Params, if any
712  *	M+2	8-bit checksum of bytes 0..M+1
713  */
714 #define EC_PROTO2_REQUEST_HEADER_BYTES 3
715 #define EC_PROTO2_REQUEST_TRAILER_BYTES 1
716 #define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES +	\
717 				    EC_PROTO2_REQUEST_TRAILER_BYTES)
718 
719 #define EC_PROTO2_RESPONSE_HEADER_BYTES 2
720 #define EC_PROTO2_RESPONSE_TRAILER_BYTES 1
721 #define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES +	\
722 				     EC_PROTO2_RESPONSE_TRAILER_BYTES)
723 
724 /* Parameter length was limited by the LPC interface */
725 #define EC_PROTO2_MAX_PARAM_SIZE 0xfc
726 
727 /* Maximum request and response packet sizes for protocol version 2 */
728 #define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD +	\
729 				    EC_PROTO2_MAX_PARAM_SIZE)
730 #define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD +	\
731 				     EC_PROTO2_MAX_PARAM_SIZE)
732 
733 /*****************************************************************************/
734 
735 /*
736  * Value written to legacy command port / prefix byte to indicate protocol
737  * 3+ structs are being used.  Usage is bus-dependent.
738  */
739 #define EC_COMMAND_PROTOCOL_3 0xda
740 
741 #define EC_HOST_REQUEST_VERSION 3
742 
743 /**
744  * struct ec_host_request - Version 3 request from host.
745  * @struct_version: Should be 3. The EC will return EC_RES_INVALID_HEADER if it
746  *                  receives a header with a version it doesn't know how to
747  *                  parse.
748  * @checksum: Checksum of request and data; sum of all bytes including checksum
749  *            should total to 0.
750  * @command: Command to send (EC_CMD_...)
751  * @command_version: Command version.
752  * @reserved: Unused byte in current protocol version; set to 0.
753  * @data_len: Length of data which follows this header.
754  */
755 struct ec_host_request {
756 	uint8_t struct_version;
757 	uint8_t checksum;
758 	uint16_t command;
759 	uint8_t command_version;
760 	uint8_t reserved;
761 	uint16_t data_len;
762 } __ec_align4;
763 
764 #define EC_HOST_RESPONSE_VERSION 3
765 
766 /**
767  * struct ec_host_response - Version 3 response from EC.
768  * @struct_version: Struct version (=3).
769  * @checksum: Checksum of response and data; sum of all bytes including
770  *            checksum should total to 0.
771  * @result: EC's response to the command (separate from communication failure)
772  * @data_len: Length of data which follows this header.
773  * @reserved: Unused bytes in current protocol version; set to 0.
774  */
775 struct ec_host_response {
776 	uint8_t struct_version;
777 	uint8_t checksum;
778 	uint16_t result;
779 	uint16_t data_len;
780 	uint16_t reserved;
781 } __ec_align4;
782 
783 /*****************************************************************************/
784 
785 /*
786  * Host command protocol V4.
787  *
788  * Packets always start with a request or response header.  They are followed
789  * by data_len bytes of data.  If the data_crc_present flag is set, the data
790  * bytes are followed by a CRC-8 of that data, using x^8 + x^2 + x + 1
791  * polynomial.
792  *
793  * Host algorithm when sending a request q:
794  *
795  * 101) tries_left=(some value, e.g. 3);
796  * 102) q.seq_num++
797  * 103) q.seq_dup=0
798  * 104) Calculate q.header_crc.
799  * 105) Send request q to EC.
800  * 106) Wait for response r.  Go to 201 if received or 301 if timeout.
801  *
802  * 201) If r.struct_version != 4, go to 301.
803  * 202) If r.header_crc mismatches calculated CRC for r header, go to 301.
804  * 203) If r.data_crc_present and r.data_crc mismatches, go to 301.
805  * 204) If r.seq_num != q.seq_num, go to 301.
806  * 205) If r.seq_dup == q.seq_dup, return success.
807  * 207) If r.seq_dup == 1, go to 301.
808  * 208) Return error.
809  *
810  * 301) If --tries_left <= 0, return error.
811  * 302) If q.seq_dup == 1, go to 105.
812  * 303) q.seq_dup = 1
813  * 304) Go to 104.
814  *
815  * EC algorithm when receiving a request q.
816  * EC has response buffer r, error buffer e.
817  *
818  * 101) If q.struct_version != 4, set e.result = EC_RES_INVALID_HEADER_VERSION
819  *      and go to 301
820  * 102) If q.header_crc mismatches calculated CRC, set e.result =
821  *      EC_RES_INVALID_HEADER_CRC and go to 301
822  * 103) If q.data_crc_present, calculate data CRC.  If that mismatches the CRC
823  *      byte at the end of the packet, set e.result = EC_RES_INVALID_DATA_CRC
824  *      and go to 301.
825  * 104) If q.seq_dup == 0, go to 201.
826  * 105) If q.seq_num != r.seq_num, go to 201.
827  * 106) If q.seq_dup == r.seq_dup, go to 205, else go to 203.
828  *
829  * 201) Process request q into response r.
830  * 202) r.seq_num = q.seq_num
831  * 203) r.seq_dup = q.seq_dup
832  * 204) Calculate r.header_crc
833  * 205) If r.data_len > 0 and data is no longer available, set e.result =
834  *      EC_RES_DUP_UNAVAILABLE and go to 301.
835  * 206) Send response r.
836  *
837  * 301) e.seq_num = q.seq_num
838  * 302) e.seq_dup = q.seq_dup
839  * 303) Calculate e.header_crc.
840  * 304) Send error response e.
841  */
842 
843 /* Version 4 request from host */
844 struct ec_host_request4 {
845 	/*
846 	 * bits 0-3: struct_version: Structure version (=4)
847 	 * bit    4: is_response: Is response (=0)
848 	 * bits 5-6: seq_num: Sequence number
849 	 * bit    7: seq_dup: Sequence duplicate flag
850 	 */
851 	uint8_t fields0;
852 
853 	/*
854 	 * bits 0-4: command_version: Command version
855 	 * bits 5-6: Reserved (set 0, ignore on read)
856 	 * bit    7: data_crc_present: Is data CRC present after data
857 	 */
858 	uint8_t fields1;
859 
860 	/* Command code (EC_CMD_*) */
861 	uint16_t command;
862 
863 	/* Length of data which follows this header (not including data CRC) */
864 	uint16_t data_len;
865 
866 	/* Reserved (set 0, ignore on read) */
867 	uint8_t reserved;
868 
869 	/* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */
870 	uint8_t header_crc;
871 } __ec_align4;
872 
873 /* Version 4 response from EC */
874 struct ec_host_response4 {
875 	/*
876 	 * bits 0-3: struct_version: Structure version (=4)
877 	 * bit    4: is_response: Is response (=1)
878 	 * bits 5-6: seq_num: Sequence number
879 	 * bit    7: seq_dup: Sequence duplicate flag
880 	 */
881 	uint8_t fields0;
882 
883 	/*
884 	 * bits 0-6: Reserved (set 0, ignore on read)
885 	 * bit    7: data_crc_present: Is data CRC present after data
886 	 */
887 	uint8_t fields1;
888 
889 	/* Result code (EC_RES_*) */
890 	uint16_t result;
891 
892 	/* Length of data which follows this header (not including data CRC) */
893 	uint16_t data_len;
894 
895 	/* Reserved (set 0, ignore on read) */
896 	uint8_t reserved;
897 
898 	/* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */
899 	uint8_t header_crc;
900 } __ec_align4;
901 
902 /* Fields in fields0 byte */
903 #define EC_PACKET4_0_STRUCT_VERSION_MASK	0x0f
904 #define EC_PACKET4_0_IS_RESPONSE_MASK		0x10
905 #define EC_PACKET4_0_SEQ_NUM_SHIFT		5
906 #define EC_PACKET4_0_SEQ_NUM_MASK		0x60
907 #define EC_PACKET4_0_SEQ_DUP_MASK		0x80
908 
909 /* Fields in fields1 byte */
910 #define EC_PACKET4_1_COMMAND_VERSION_MASK	0x1f  /* (request only) */
911 #define EC_PACKET4_1_DATA_CRC_PRESENT_MASK	0x80
912 
913 /*****************************************************************************/
914 /*
915  * Notes on commands:
916  *
917  * Each command is an 16-bit command value.  Commands which take params or
918  * return response data specify structures for that data.  If no structure is
919  * specified, the command does not input or output data, respectively.
920  * Parameter/response length is implicit in the structs.  Some underlying
921  * communication protocols (I2C, SPI) may add length or checksum headers, but
922  * those are implementation-dependent and not defined here.
923  *
924  * All commands MUST be #defined to be 4-digit UPPER CASE hex values
925  * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work.
926  */
927 
928 /*****************************************************************************/
929 /* General / test commands */
930 
931 /*
932  * Get protocol version, used to deal with non-backward compatible protocol
933  * changes.
934  */
935 #define EC_CMD_PROTO_VERSION 0x0000
936 
937 /**
938  * struct ec_response_proto_version - Response to the proto version command.
939  * @version: The protocol version.
940  */
941 struct ec_response_proto_version {
942 	uint32_t version;
943 } __ec_align4;
944 
945 /*
946  * Hello.  This is a simple command to test the EC is responsive to
947  * commands.
948  */
949 #define EC_CMD_HELLO 0x0001
950 
951 /**
952  * struct ec_params_hello - Parameters to the hello command.
953  * @in_data: Pass anything here.
954  */
955 struct ec_params_hello {
956 	uint32_t in_data;
957 } __ec_align4;
958 
959 /**
960  * struct ec_response_hello - Response to the hello command.
961  * @out_data: Output will be in_data + 0x01020304.
962  */
963 struct ec_response_hello {
964 	uint32_t out_data;
965 } __ec_align4;
966 
967 /* Get version number */
968 #define EC_CMD_GET_VERSION 0x0002
969 
970 enum ec_current_image {
971 	EC_IMAGE_UNKNOWN = 0,
972 	EC_IMAGE_RO,
973 	EC_IMAGE_RW
974 };
975 
976 /**
977  * struct ec_response_get_version - Response to the get version command.
978  * @version_string_ro: Null-terminated RO firmware version string.
979  * @version_string_rw: Null-terminated RW firmware version string.
980  * @reserved: Unused bytes; was previously RW-B firmware version string.
981  * @current_image: One of ec_current_image.
982  */
983 struct ec_response_get_version {
984 	char version_string_ro[32];
985 	char version_string_rw[32];
986 	char reserved[32];
987 	uint32_t current_image;
988 } __ec_align4;
989 
990 /* Read test */
991 #define EC_CMD_READ_TEST 0x0003
992 
993 /**
994  * struct ec_params_read_test - Parameters for the read test command.
995  * @offset: Starting value for read buffer.
996  * @size: Size to read in bytes.
997  */
998 struct ec_params_read_test {
999 	uint32_t offset;
1000 	uint32_t size;
1001 } __ec_align4;
1002 
1003 /**
1004  * struct ec_response_read_test - Response to the read test command.
1005  * @data: Data returned by the read test command.
1006  */
1007 struct ec_response_read_test {
1008 	uint32_t data[32];
1009 } __ec_align4;
1010 
1011 /*
1012  * Get build information
1013  *
1014  * Response is null-terminated string.
1015  */
1016 #define EC_CMD_GET_BUILD_INFO 0x0004
1017 
1018 /* Get chip info */
1019 #define EC_CMD_GET_CHIP_INFO 0x0005
1020 
1021 /**
1022  * struct ec_response_get_chip_info - Response to the get chip info command.
1023  * @vendor: Null-terminated string for chip vendor.
1024  * @name: Null-terminated string for chip name.
1025  * @revision: Null-terminated string for chip mask version.
1026  */
1027 struct ec_response_get_chip_info {
1028 	char vendor[32];
1029 	char name[32];
1030 	char revision[32];
1031 } __ec_align4;
1032 
1033 /* Get board HW version */
1034 #define EC_CMD_GET_BOARD_VERSION 0x0006
1035 
1036 /**
1037  * struct ec_response_board_version - Response to the board version command.
1038  * @board_version: A monotonously incrementing number.
1039  */
1040 struct ec_response_board_version {
1041 	uint16_t board_version;
1042 } __ec_align2;
1043 
1044 /*
1045  * Read memory-mapped data.
1046  *
1047  * This is an alternate interface to memory-mapped data for bus protocols
1048  * which don't support direct-mapped memory - I2C, SPI, etc.
1049  *
1050  * Response is params.size bytes of data.
1051  */
1052 #define EC_CMD_READ_MEMMAP 0x0007
1053 
1054 /**
1055  * struct ec_params_read_memmap - Parameters for the read memory map command.
1056  * @offset: Offset in memmap (EC_MEMMAP_*).
1057  * @size: Size to read in bytes.
1058  */
1059 struct ec_params_read_memmap {
1060 	uint8_t offset;
1061 	uint8_t size;
1062 } __ec_align1;
1063 
1064 /* Read versions supported for a command */
1065 #define EC_CMD_GET_CMD_VERSIONS 0x0008
1066 
1067 /**
1068  * struct ec_params_get_cmd_versions - Parameters for the get command versions.
1069  * @cmd: Command to check.
1070  */
1071 struct ec_params_get_cmd_versions {
1072 	uint8_t cmd;
1073 } __ec_align1;
1074 
1075 /**
1076  * struct ec_params_get_cmd_versions_v1 - Parameters for the get command
1077  *         versions (v1)
1078  * @cmd: Command to check.
1079  */
1080 struct ec_params_get_cmd_versions_v1 {
1081 	uint16_t cmd;
1082 } __ec_align2;
1083 
1084 /**
1085  * struct ec_response_get_cmd_version - Response to the get command versions.
1086  * @version_mask: Mask of supported versions; use EC_VER_MASK() to compare with
1087  *                a desired version.
1088  */
1089 struct ec_response_get_cmd_versions {
1090 	uint32_t version_mask;
1091 } __ec_align4;
1092 
1093 /*
1094  * Check EC communications status (busy). This is needed on i2c/spi but not
1095  * on lpc since it has its own out-of-band busy indicator.
1096  *
1097  * lpc must read the status from the command register. Attempting this on
1098  * lpc will overwrite the args/parameter space and corrupt its data.
1099  */
1100 #define EC_CMD_GET_COMMS_STATUS		0x0009
1101 
1102 /* Avoid using ec_status which is for return values */
1103 enum ec_comms_status {
1104 	EC_COMMS_STATUS_PROCESSING	= BIT(0),	/* Processing cmd */
1105 };
1106 
1107 /**
1108  * struct ec_response_get_comms_status - Response to the get comms status
1109  *         command.
1110  * @flags: Mask of enum ec_comms_status.
1111  */
1112 struct ec_response_get_comms_status {
1113 	uint32_t flags;		/* Mask of enum ec_comms_status */
1114 } __ec_align4;
1115 
1116 /* Fake a variety of responses, purely for testing purposes. */
1117 #define EC_CMD_TEST_PROTOCOL		0x000A
1118 
1119 /* Tell the EC what to send back to us. */
1120 struct ec_params_test_protocol {
1121 	uint32_t ec_result;
1122 	uint32_t ret_len;
1123 	uint8_t buf[32];
1124 } __ec_align4;
1125 
1126 /* Here it comes... */
1127 struct ec_response_test_protocol {
1128 	uint8_t buf[32];
1129 } __ec_align4;
1130 
1131 /* Get protocol information */
1132 #define EC_CMD_GET_PROTOCOL_INFO	0x000B
1133 
1134 /* Flags for ec_response_get_protocol_info.flags */
1135 /* EC_RES_IN_PROGRESS may be returned if a command is slow */
1136 #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED BIT(0)
1137 
1138 /**
1139  * struct ec_response_get_protocol_info - Response to the get protocol info.
1140  * @protocol_versions: Bitmask of protocol versions supported (1 << n means
1141  *                     version n).
1142  * @max_request_packet_size: Maximum request packet size in bytes.
1143  * @max_response_packet_size: Maximum response packet size in bytes.
1144  * @flags: see EC_PROTOCOL_INFO_*
1145  */
1146 struct ec_response_get_protocol_info {
1147 	/* Fields which exist if at least protocol version 3 supported */
1148 	uint32_t protocol_versions;
1149 	uint16_t max_request_packet_size;
1150 	uint16_t max_response_packet_size;
1151 	uint32_t flags;
1152 } __ec_align4;
1153 
1154 
1155 /*****************************************************************************/
1156 /* Get/Set miscellaneous values */
1157 
1158 /* The upper byte of .flags tells what to do (nothing means "get") */
1159 #define EC_GSV_SET        0x80000000
1160 
1161 /*
1162  * The lower three bytes of .flags identifies the parameter, if that has
1163  * meaning for an individual command.
1164  */
1165 #define EC_GSV_PARAM_MASK 0x00ffffff
1166 
1167 struct ec_params_get_set_value {
1168 	uint32_t flags;
1169 	uint32_t value;
1170 } __ec_align4;
1171 
1172 struct ec_response_get_set_value {
1173 	uint32_t flags;
1174 	uint32_t value;
1175 } __ec_align4;
1176 
1177 /* More than one command can use these structs to get/set parameters. */
1178 #define EC_CMD_GSV_PAUSE_IN_S5	0x000C
1179 
1180 /*****************************************************************************/
1181 /* List the features supported by the firmware */
1182 #define EC_CMD_GET_FEATURES  0x000D
1183 
1184 /* Supported features */
1185 enum ec_feature_code {
1186 	/*
1187 	 * This image contains a limited set of features. Another image
1188 	 * in RW partition may support more features.
1189 	 */
1190 	EC_FEATURE_LIMITED = 0,
1191 	/*
1192 	 * Commands for probing/reading/writing/erasing the flash in the
1193 	 * EC are present.
1194 	 */
1195 	EC_FEATURE_FLASH = 1,
1196 	/*
1197 	 * Can control the fan speed directly.
1198 	 */
1199 	EC_FEATURE_PWM_FAN = 2,
1200 	/*
1201 	 * Can control the intensity of the keyboard backlight.
1202 	 */
1203 	EC_FEATURE_PWM_KEYB = 3,
1204 	/*
1205 	 * Support Google lightbar, introduced on Pixel.
1206 	 */
1207 	EC_FEATURE_LIGHTBAR = 4,
1208 	/* Control of LEDs  */
1209 	EC_FEATURE_LED = 5,
1210 	/* Exposes an interface to control gyro and sensors.
1211 	 * The host goes through the EC to access these sensors.
1212 	 * In addition, the EC may provide composite sensors, like lid angle.
1213 	 */
1214 	EC_FEATURE_MOTION_SENSE = 6,
1215 	/* The keyboard is controlled by the EC */
1216 	EC_FEATURE_KEYB = 7,
1217 	/* The AP can use part of the EC flash as persistent storage. */
1218 	EC_FEATURE_PSTORE = 8,
1219 	/* The EC monitors BIOS port 80h, and can return POST codes. */
1220 	EC_FEATURE_PORT80 = 9,
1221 	/*
1222 	 * Thermal management: include TMP specific commands.
1223 	 * Higher level than direct fan control.
1224 	 */
1225 	EC_FEATURE_THERMAL = 10,
1226 	/* Can switch the screen backlight on/off */
1227 	EC_FEATURE_BKLIGHT_SWITCH = 11,
1228 	/* Can switch the wifi module on/off */
1229 	EC_FEATURE_WIFI_SWITCH = 12,
1230 	/* Monitor host events, through for example SMI or SCI */
1231 	EC_FEATURE_HOST_EVENTS = 13,
1232 	/* The EC exposes GPIO commands to control/monitor connected devices. */
1233 	EC_FEATURE_GPIO = 14,
1234 	/* The EC can send i2c messages to downstream devices. */
1235 	EC_FEATURE_I2C = 15,
1236 	/* Command to control charger are included */
1237 	EC_FEATURE_CHARGER = 16,
1238 	/* Simple battery support. */
1239 	EC_FEATURE_BATTERY = 17,
1240 	/*
1241 	 * Support Smart battery protocol
1242 	 * (Common Smart Battery System Interface Specification)
1243 	 */
1244 	EC_FEATURE_SMART_BATTERY = 18,
1245 	/* EC can detect when the host hangs. */
1246 	EC_FEATURE_HANG_DETECT = 19,
1247 	/* Report power information, for pit only */
1248 	EC_FEATURE_PMU = 20,
1249 	/* Another Cros EC device is present downstream of this one */
1250 	EC_FEATURE_SUB_MCU = 21,
1251 	/* Support USB Power delivery (PD) commands */
1252 	EC_FEATURE_USB_PD = 22,
1253 	/* Control USB multiplexer, for audio through USB port for instance. */
1254 	EC_FEATURE_USB_MUX = 23,
1255 	/* Motion Sensor code has an internal software FIFO */
1256 	EC_FEATURE_MOTION_SENSE_FIFO = 24,
1257 	/* Support temporary secure vstore */
1258 	EC_FEATURE_VSTORE = 25,
1259 	/* EC decides on USB-C SS mux state, muxes configured by host */
1260 	EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26,
1261 	/* EC has RTC feature that can be controlled by host commands */
1262 	EC_FEATURE_RTC = 27,
1263 	/* The MCU exposes a Fingerprint sensor */
1264 	EC_FEATURE_FINGERPRINT = 28,
1265 	/* The MCU exposes a Touchpad */
1266 	EC_FEATURE_TOUCHPAD = 29,
1267 	/* The MCU has RWSIG task enabled */
1268 	EC_FEATURE_RWSIG = 30,
1269 	/* EC has device events support */
1270 	EC_FEATURE_DEVICE_EVENT = 31,
1271 	/* EC supports the unified wake masks for LPC/eSPI systems */
1272 	EC_FEATURE_UNIFIED_WAKE_MASKS = 32,
1273 	/* EC supports 64-bit host events */
1274 	EC_FEATURE_HOST_EVENT64 = 33,
1275 	/* EC runs code in RAM (not in place, a.k.a. XIP) */
1276 	EC_FEATURE_EXEC_IN_RAM = 34,
1277 	/* EC supports CEC commands */
1278 	EC_FEATURE_CEC = 35,
1279 	/* EC supports tight sensor timestamping. */
1280 	EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS = 36,
1281 	/*
1282 	 * EC supports tablet mode detection aligned to Chrome and allows
1283 	 * setting of threshold by host command using
1284 	 * MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE.
1285 	 */
1286 	EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37,
1287 	/* The MCU is a System Companion Processor (SCP). */
1288 	EC_FEATURE_SCP = 39,
1289 	/* The MCU is an Integrated Sensor Hub */
1290 	EC_FEATURE_ISH = 40,
1291 	/* New TCPMv2 TYPEC_ prefaced commands supported */
1292 	EC_FEATURE_TYPEC_CMD = 41,
1293 	/*
1294 	 * The EC will wait for direction from the AP to enter Type-C alternate
1295 	 * modes or USB4.
1296 	 */
1297 	EC_FEATURE_TYPEC_REQUIRE_AP_MODE_ENTRY = 42,
1298 	/*
1299 	 * The EC will wait for an acknowledge from the AP after setting the
1300 	 * mux.
1301 	 */
1302 	EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43,
1303 	/* The MCU is a System Companion Processor (SCP) 2nd Core. */
1304 	EC_FEATURE_SCP_C1 = 45,
1305 };
1306 
1307 #define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32)
1308 #define EC_FEATURE_MASK_1(event_code) BIT(event_code - 32)
1309 
1310 struct ec_response_get_features {
1311 	uint32_t flags[2];
1312 } __ec_align4;
1313 
1314 /*****************************************************************************/
1315 /* Get the board's SKU ID from EC */
1316 #define EC_CMD_GET_SKU_ID 0x000E
1317 
1318 /* Set SKU ID from AP */
1319 #define EC_CMD_SET_SKU_ID 0x000F
1320 
1321 struct ec_sku_id_info {
1322 	uint32_t sku_id;
1323 } __ec_align4;
1324 
1325 /*****************************************************************************/
1326 /* Flash commands */
1327 
1328 /* Get flash info */
1329 #define EC_CMD_FLASH_INFO 0x0010
1330 #define EC_VER_FLASH_INFO 2
1331 
1332 /**
1333  * struct ec_response_flash_info - Response to the flash info command.
1334  * @flash_size: Usable flash size in bytes.
1335  * @write_block_size: Write block size. Write offset and size must be a
1336  *                    multiple of this.
1337  * @erase_block_size: Erase block size. Erase offset and size must be a
1338  *                    multiple of this.
1339  * @protect_block_size: Protection block size. Protection offset and size
1340  *                      must be a multiple of this.
1341  *
1342  * Version 0 returns these fields.
1343  */
1344 struct ec_response_flash_info {
1345 	uint32_t flash_size;
1346 	uint32_t write_block_size;
1347 	uint32_t erase_block_size;
1348 	uint32_t protect_block_size;
1349 } __ec_align4;
1350 
1351 /*
1352  * Flags for version 1+ flash info command
1353  * EC flash erases bits to 0 instead of 1.
1354  */
1355 #define EC_FLASH_INFO_ERASE_TO_0 BIT(0)
1356 
1357 /*
1358  * Flash must be selected for read/write/erase operations to succeed.  This may
1359  * be necessary on a chip where write/erase can be corrupted by other board
1360  * activity, or where the chip needs to enable some sort of programming voltage,
1361  * or where the read/write/erase operations require cleanly suspending other
1362  * chip functionality.
1363  */
1364 #define EC_FLASH_INFO_SELECT_REQUIRED BIT(1)
1365 
1366 /**
1367  * struct ec_response_flash_info_1 - Response to the flash info v1 command.
1368  * @flash_size: Usable flash size in bytes.
1369  * @write_block_size: Write block size. Write offset and size must be a
1370  *                    multiple of this.
1371  * @erase_block_size: Erase block size. Erase offset and size must be a
1372  *                    multiple of this.
1373  * @protect_block_size: Protection block size. Protection offset and size
1374  *                      must be a multiple of this.
1375  * @write_ideal_size: Ideal write size in bytes.  Writes will be fastest if
1376  *                    size is exactly this and offset is a multiple of this.
1377  *                    For example, an EC may have a write buffer which can do
1378  *                    half-page operations if data is aligned, and a slower
1379  *                    word-at-a-time write mode.
1380  * @flags: Flags; see EC_FLASH_INFO_*
1381  *
1382  * Version 1 returns the same initial fields as version 0, with additional
1383  * fields following.
1384  *
1385  * gcc anonymous structs don't seem to get along with the __packed directive;
1386  * if they did we'd define the version 0 structure as a sub-structure of this
1387  * one.
1388  *
1389  * Version 2 supports flash banks of different sizes:
1390  * The caller specified the number of banks it has preallocated
1391  * (num_banks_desc)
1392  * The EC returns the number of banks describing the flash memory.
1393  * It adds banks descriptions up to num_banks_desc.
1394  */
1395 struct ec_response_flash_info_1 {
1396 	/* Version 0 fields; see above for description */
1397 	uint32_t flash_size;
1398 	uint32_t write_block_size;
1399 	uint32_t erase_block_size;
1400 	uint32_t protect_block_size;
1401 
1402 	/* Version 1 adds these fields: */
1403 	uint32_t write_ideal_size;
1404 	uint32_t flags;
1405 } __ec_align4;
1406 
1407 struct ec_params_flash_info_2 {
1408 	/* Number of banks to describe */
1409 	uint16_t num_banks_desc;
1410 	/* Reserved; set 0; ignore on read */
1411 	uint8_t reserved[2];
1412 } __ec_align4;
1413 
1414 struct ec_flash_bank {
1415 	/* Number of sector is in this bank. */
1416 	uint16_t count;
1417 	/* Size in power of 2 of each sector (8 --> 256 bytes) */
1418 	uint8_t size_exp;
1419 	/* Minimal write size for the sectors in this bank */
1420 	uint8_t write_size_exp;
1421 	/* Erase size for the sectors in this bank */
1422 	uint8_t erase_size_exp;
1423 	/* Size for write protection, usually identical to erase size. */
1424 	uint8_t protect_size_exp;
1425 	/* Reserved; set 0; ignore on read */
1426 	uint8_t reserved[2];
1427 };
1428 
1429 struct ec_response_flash_info_2 {
1430 	/* Total flash in the EC. */
1431 	uint32_t flash_size;
1432 	/* Flags; see EC_FLASH_INFO_* */
1433 	uint32_t flags;
1434 	/* Maximum size to use to send data to write to the EC. */
1435 	uint32_t write_ideal_size;
1436 	/* Number of banks present in the EC. */
1437 	uint16_t num_banks_total;
1438 	/* Number of banks described in banks array. */
1439 	uint16_t num_banks_desc;
1440 	struct ec_flash_bank banks[];
1441 } __ec_align4;
1442 
1443 /*
1444  * Read flash
1445  *
1446  * Response is params.size bytes of data.
1447  */
1448 #define EC_CMD_FLASH_READ 0x0011
1449 
1450 /**
1451  * struct ec_params_flash_read - Parameters for the flash read command.
1452  * @offset: Byte offset to read.
1453  * @size: Size to read in bytes.
1454  */
1455 struct ec_params_flash_read {
1456 	uint32_t offset;
1457 	uint32_t size;
1458 } __ec_align4;
1459 
1460 /* Write flash */
1461 #define EC_CMD_FLASH_WRITE 0x0012
1462 #define EC_VER_FLASH_WRITE 1
1463 
1464 /* Version 0 of the flash command supported only 64 bytes of data */
1465 #define EC_FLASH_WRITE_VER0_SIZE 64
1466 
1467 /**
1468  * struct ec_params_flash_write - Parameters for the flash write command.
1469  * @offset: Byte offset to write.
1470  * @size: Size to write in bytes.
1471  */
1472 struct ec_params_flash_write {
1473 	uint32_t offset;
1474 	uint32_t size;
1475 	/* Followed by data to write */
1476 } __ec_align4;
1477 
1478 /* Erase flash */
1479 #define EC_CMD_FLASH_ERASE 0x0013
1480 
1481 /**
1482  * struct ec_params_flash_erase - Parameters for the flash erase command, v0.
1483  * @offset: Byte offset to erase.
1484  * @size: Size to erase in bytes.
1485  */
1486 struct ec_params_flash_erase {
1487 	uint32_t offset;
1488 	uint32_t size;
1489 } __ec_align4;
1490 
1491 /*
1492  * v1 add async erase:
1493  * subcommands can returns:
1494  * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below).
1495  * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary.
1496  * EC_RES_ERROR : other errors.
1497  * EC_RES_BUSY : an existing erase operation is in progress.
1498  * EC_RES_ACCESS_DENIED: Trying to erase running image.
1499  *
1500  * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just
1501  * properly queued. The user must call ERASE_GET_RESULT subcommand to get
1502  * the proper result.
1503  * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send
1504  * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC.
1505  * ERASE_GET_RESULT command may timeout on EC where flash access is not
1506  * permitted while erasing. (For instance, STM32F4).
1507  */
1508 enum ec_flash_erase_cmd {
1509 	FLASH_ERASE_SECTOR,     /* Erase and wait for result */
1510 	FLASH_ERASE_SECTOR_ASYNC,  /* Erase and return immediately. */
1511 	FLASH_ERASE_GET_RESULT,  /* Ask for last erase result */
1512 };
1513 
1514 /**
1515  * struct ec_params_flash_erase_v1 - Parameters for the flash erase command, v1.
1516  * @cmd: One of ec_flash_erase_cmd.
1517  * @reserved: Pad byte; currently always contains 0.
1518  * @flag: No flags defined yet; set to 0.
1519  * @params: Same as v0 parameters.
1520  */
1521 struct ec_params_flash_erase_v1 {
1522 	uint8_t  cmd;
1523 	uint8_t  reserved;
1524 	uint16_t flag;
1525 	struct ec_params_flash_erase params;
1526 } __ec_align4;
1527 
1528 /*
1529  * Get/set flash protection.
1530  *
1531  * If mask!=0, sets/clear the requested bits of flags.  Depending on the
1532  * firmware write protect GPIO, not all flags will take effect immediately;
1533  * some flags require a subsequent hard reset to take effect.  Check the
1534  * returned flags bits to see what actually happened.
1535  *
1536  * If mask=0, simply returns the current flags state.
1537  */
1538 #define EC_CMD_FLASH_PROTECT 0x0015
1539 #define EC_VER_FLASH_PROTECT 1  /* Command version 1 */
1540 
1541 /* Flags for flash protection */
1542 /* RO flash code protected when the EC boots */
1543 #define EC_FLASH_PROTECT_RO_AT_BOOT         BIT(0)
1544 /*
1545  * RO flash code protected now.  If this bit is set, at-boot status cannot
1546  * be changed.
1547  */
1548 #define EC_FLASH_PROTECT_RO_NOW             BIT(1)
1549 /* Entire flash code protected now, until reboot. */
1550 #define EC_FLASH_PROTECT_ALL_NOW            BIT(2)
1551 /* Flash write protect GPIO is asserted now */
1552 #define EC_FLASH_PROTECT_GPIO_ASSERTED      BIT(3)
1553 /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */
1554 #define EC_FLASH_PROTECT_ERROR_STUCK        BIT(4)
1555 /*
1556  * Error - flash protection is in inconsistent state.  At least one bank of
1557  * flash which should be protected is not protected.  Usually fixed by
1558  * re-requesting the desired flags, or by a hard reset if that fails.
1559  */
1560 #define EC_FLASH_PROTECT_ERROR_INCONSISTENT BIT(5)
1561 /* Entire flash code protected when the EC boots */
1562 #define EC_FLASH_PROTECT_ALL_AT_BOOT        BIT(6)
1563 /* RW flash code protected when the EC boots */
1564 #define EC_FLASH_PROTECT_RW_AT_BOOT         BIT(7)
1565 /* RW flash code protected now. */
1566 #define EC_FLASH_PROTECT_RW_NOW             BIT(8)
1567 /* Rollback information flash region protected when the EC boots */
1568 #define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT   BIT(9)
1569 /* Rollback information flash region protected now */
1570 #define EC_FLASH_PROTECT_ROLLBACK_NOW       BIT(10)
1571 
1572 
1573 /**
1574  * struct ec_params_flash_protect - Parameters for the flash protect command.
1575  * @mask: Bits in flags to apply.
1576  * @flags: New flags to apply.
1577  */
1578 struct ec_params_flash_protect {
1579 	uint32_t mask;
1580 	uint32_t flags;
1581 } __ec_align4;
1582 
1583 /**
1584  * struct ec_response_flash_protect - Response to the flash protect command.
1585  * @flags: Current value of flash protect flags.
1586  * @valid_flags: Flags which are valid on this platform. This allows the
1587  *               caller to distinguish between flags which aren't set vs. flags
1588  *               which can't be set on this platform.
1589  * @writable_flags: Flags which can be changed given the current protection
1590  *                  state.
1591  */
1592 struct ec_response_flash_protect {
1593 	uint32_t flags;
1594 	uint32_t valid_flags;
1595 	uint32_t writable_flags;
1596 } __ec_align4;
1597 
1598 /*
1599  * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash
1600  * write protect.  These commands may be reused with version > 0.
1601  */
1602 
1603 /* Get the region offset/size */
1604 #define EC_CMD_FLASH_REGION_INFO 0x0016
1605 #define EC_VER_FLASH_REGION_INFO 1
1606 
1607 enum ec_flash_region {
1608 	/* Region which holds read-only EC image */
1609 	EC_FLASH_REGION_RO = 0,
1610 	/*
1611 	 * Region which holds active RW image. 'Active' is different from
1612 	 * 'running'. Active means 'scheduled-to-run'. Since RO image always
1613 	 * scheduled to run, active/non-active applies only to RW images (for
1614 	 * the same reason 'update' applies only to RW images. It's a state of
1615 	 * an image on a flash. Running image can be RO, RW_A, RW_B but active
1616 	 * image can only be RW_A or RW_B. In recovery mode, an active RW image
1617 	 * doesn't enter 'running' state but it's still active on a flash.
1618 	 */
1619 	EC_FLASH_REGION_ACTIVE,
1620 	/*
1621 	 * Region which should be write-protected in the factory (a superset of
1622 	 * EC_FLASH_REGION_RO)
1623 	 */
1624 	EC_FLASH_REGION_WP_RO,
1625 	/* Region which holds updatable (non-active) RW image */
1626 	EC_FLASH_REGION_UPDATE,
1627 	/* Number of regions */
1628 	EC_FLASH_REGION_COUNT,
1629 };
1630 /*
1631  * 'RW' is vague if there are multiple RW images; we mean the active one,
1632  * so the old constant is deprecated.
1633  */
1634 #define EC_FLASH_REGION_RW EC_FLASH_REGION_ACTIVE
1635 
1636 /**
1637  * struct ec_params_flash_region_info - Parameters for the flash region info
1638  *         command.
1639  * @region: Flash region; see EC_FLASH_REGION_*
1640  */
1641 struct ec_params_flash_region_info {
1642 	uint32_t region;
1643 } __ec_align4;
1644 
1645 struct ec_response_flash_region_info {
1646 	uint32_t offset;
1647 	uint32_t size;
1648 } __ec_align4;
1649 
1650 /* Read/write VbNvContext */
1651 #define EC_CMD_VBNV_CONTEXT 0x0017
1652 #define EC_VER_VBNV_CONTEXT 1
1653 #define EC_VBNV_BLOCK_SIZE 16
1654 
1655 enum ec_vbnvcontext_op {
1656 	EC_VBNV_CONTEXT_OP_READ,
1657 	EC_VBNV_CONTEXT_OP_WRITE,
1658 };
1659 
1660 struct ec_params_vbnvcontext {
1661 	uint32_t op;
1662 	uint8_t block[EC_VBNV_BLOCK_SIZE];
1663 } __ec_align4;
1664 
1665 struct ec_response_vbnvcontext {
1666 	uint8_t block[EC_VBNV_BLOCK_SIZE];
1667 } __ec_align4;
1668 
1669 
1670 /* Get SPI flash information */
1671 #define EC_CMD_FLASH_SPI_INFO 0x0018
1672 
1673 struct ec_response_flash_spi_info {
1674 	/* JEDEC info from command 0x9F (manufacturer, memory type, size) */
1675 	uint8_t jedec[3];
1676 
1677 	/* Pad byte; currently always contains 0 */
1678 	uint8_t reserved0;
1679 
1680 	/* Manufacturer / device ID from command 0x90 */
1681 	uint8_t mfr_dev_id[2];
1682 
1683 	/* Status registers from command 0x05 and 0x35 */
1684 	uint8_t sr1, sr2;
1685 } __ec_align1;
1686 
1687 
1688 /* Select flash during flash operations */
1689 #define EC_CMD_FLASH_SELECT 0x0019
1690 
1691 /**
1692  * struct ec_params_flash_select - Parameters for the flash select command.
1693  * @select: 1 to select flash, 0 to deselect flash
1694  */
1695 struct ec_params_flash_select {
1696 	uint8_t select;
1697 } __ec_align4;
1698 
1699 
1700 /*****************************************************************************/
1701 /* PWM commands */
1702 
1703 /* Get fan target RPM */
1704 #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020
1705 
1706 struct ec_response_pwm_get_fan_rpm {
1707 	uint32_t rpm;
1708 } __ec_align4;
1709 
1710 /* Set target fan RPM */
1711 #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021
1712 
1713 /* Version 0 of input params */
1714 struct ec_params_pwm_set_fan_target_rpm_v0 {
1715 	uint32_t rpm;
1716 } __ec_align4;
1717 
1718 /* Version 1 of input params */
1719 struct ec_params_pwm_set_fan_target_rpm_v1 {
1720 	uint32_t rpm;
1721 	uint8_t fan_idx;
1722 } __ec_align_size1;
1723 
1724 /* Get keyboard backlight */
1725 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */
1726 #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022
1727 
1728 struct ec_response_pwm_get_keyboard_backlight {
1729 	uint8_t percent;
1730 	uint8_t enabled;
1731 } __ec_align1;
1732 
1733 /* Set keyboard backlight */
1734 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */
1735 #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023
1736 
1737 struct ec_params_pwm_set_keyboard_backlight {
1738 	uint8_t percent;
1739 } __ec_align1;
1740 
1741 /* Set target fan PWM duty cycle */
1742 #define EC_CMD_PWM_SET_FAN_DUTY 0x0024
1743 
1744 /* Version 0 of input params */
1745 struct ec_params_pwm_set_fan_duty_v0 {
1746 	uint32_t percent;
1747 } __ec_align4;
1748 
1749 /* Version 1 of input params */
1750 struct ec_params_pwm_set_fan_duty_v1 {
1751 	uint32_t percent;
1752 	uint8_t fan_idx;
1753 } __ec_align_size1;
1754 
1755 #define EC_CMD_PWM_SET_DUTY 0x0025
1756 /* 16 bit duty cycle, 0xffff = 100% */
1757 #define EC_PWM_MAX_DUTY 0xffff
1758 
1759 enum ec_pwm_type {
1760 	/* All types, indexed by board-specific enum pwm_channel */
1761 	EC_PWM_TYPE_GENERIC = 0,
1762 	/* Keyboard backlight */
1763 	EC_PWM_TYPE_KB_LIGHT,
1764 	/* Display backlight */
1765 	EC_PWM_TYPE_DISPLAY_LIGHT,
1766 	EC_PWM_TYPE_COUNT,
1767 };
1768 
1769 struct ec_params_pwm_set_duty {
1770 	uint16_t duty;     /* Duty cycle, EC_PWM_MAX_DUTY = 100% */
1771 	uint8_t pwm_type;  /* ec_pwm_type */
1772 	uint8_t index;     /* Type-specific index, or 0 if unique */
1773 } __ec_align4;
1774 
1775 #define EC_CMD_PWM_GET_DUTY 0x0026
1776 
1777 struct ec_params_pwm_get_duty {
1778 	uint8_t pwm_type;  /* ec_pwm_type */
1779 	uint8_t index;     /* Type-specific index, or 0 if unique */
1780 } __ec_align1;
1781 
1782 struct ec_response_pwm_get_duty {
1783 	uint16_t duty;     /* Duty cycle, EC_PWM_MAX_DUTY = 100% */
1784 } __ec_align2;
1785 
1786 /*****************************************************************************/
1787 /*
1788  * Lightbar commands. This looks worse than it is. Since we only use one HOST
1789  * command to say "talk to the lightbar", we put the "and tell it to do X" part
1790  * into a subcommand. We'll make separate structs for subcommands with
1791  * different input args, so that we know how much to expect.
1792  */
1793 #define EC_CMD_LIGHTBAR_CMD 0x0028
1794 
1795 struct rgb_s {
1796 	uint8_t r, g, b;
1797 } __ec_todo_unpacked;
1798 
1799 #define LB_BATTERY_LEVELS 4
1800 
1801 /*
1802  * List of tweakable parameters. NOTE: It's __packed so it can be sent in a
1803  * host command, but the alignment is the same regardless. Keep it that way.
1804  */
1805 struct lightbar_params_v0 {
1806 	/* Timing */
1807 	int32_t google_ramp_up;
1808 	int32_t google_ramp_down;
1809 	int32_t s3s0_ramp_up;
1810 	int32_t s0_tick_delay[2];		/* AC=0/1 */
1811 	int32_t s0a_tick_delay[2];		/* AC=0/1 */
1812 	int32_t s0s3_ramp_down;
1813 	int32_t s3_sleep_for;
1814 	int32_t s3_ramp_up;
1815 	int32_t s3_ramp_down;
1816 
1817 	/* Oscillation */
1818 	uint8_t new_s0;
1819 	uint8_t osc_min[2];			/* AC=0/1 */
1820 	uint8_t osc_max[2];			/* AC=0/1 */
1821 	uint8_t w_ofs[2];			/* AC=0/1 */
1822 
1823 	/* Brightness limits based on the backlight and AC. */
1824 	uint8_t bright_bl_off_fixed[2];		/* AC=0/1 */
1825 	uint8_t bright_bl_on_min[2];		/* AC=0/1 */
1826 	uint8_t bright_bl_on_max[2];		/* AC=0/1 */
1827 
1828 	/* Battery level thresholds */
1829 	uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1830 
1831 	/* Map [AC][battery_level] to color index */
1832 	uint8_t s0_idx[2][LB_BATTERY_LEVELS];	/* AP is running */
1833 	uint8_t s3_idx[2][LB_BATTERY_LEVELS];	/* AP is sleeping */
1834 
1835 	/* Color palette */
1836 	struct rgb_s color[8];			/* 0-3 are Google colors */
1837 } __ec_todo_packed;
1838 
1839 struct lightbar_params_v1 {
1840 	/* Timing */
1841 	int32_t google_ramp_up;
1842 	int32_t google_ramp_down;
1843 	int32_t s3s0_ramp_up;
1844 	int32_t s0_tick_delay[2];		/* AC=0/1 */
1845 	int32_t s0a_tick_delay[2];		/* AC=0/1 */
1846 	int32_t s0s3_ramp_down;
1847 	int32_t s3_sleep_for;
1848 	int32_t s3_ramp_up;
1849 	int32_t s3_ramp_down;
1850 	int32_t s5_ramp_up;
1851 	int32_t s5_ramp_down;
1852 	int32_t tap_tick_delay;
1853 	int32_t tap_gate_delay;
1854 	int32_t tap_display_time;
1855 
1856 	/* Tap-for-battery params */
1857 	uint8_t tap_pct_red;
1858 	uint8_t tap_pct_green;
1859 	uint8_t tap_seg_min_on;
1860 	uint8_t tap_seg_max_on;
1861 	uint8_t tap_seg_osc;
1862 	uint8_t tap_idx[3];
1863 
1864 	/* Oscillation */
1865 	uint8_t osc_min[2];			/* AC=0/1 */
1866 	uint8_t osc_max[2];			/* AC=0/1 */
1867 	uint8_t w_ofs[2];			/* AC=0/1 */
1868 
1869 	/* Brightness limits based on the backlight and AC. */
1870 	uint8_t bright_bl_off_fixed[2];		/* AC=0/1 */
1871 	uint8_t bright_bl_on_min[2];		/* AC=0/1 */
1872 	uint8_t bright_bl_on_max[2];		/* AC=0/1 */
1873 
1874 	/* Battery level thresholds */
1875 	uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1876 
1877 	/* Map [AC][battery_level] to color index */
1878 	uint8_t s0_idx[2][LB_BATTERY_LEVELS];	/* AP is running */
1879 	uint8_t s3_idx[2][LB_BATTERY_LEVELS];	/* AP is sleeping */
1880 
1881 	/* s5: single color pulse on inhibited power-up */
1882 	uint8_t s5_idx;
1883 
1884 	/* Color palette */
1885 	struct rgb_s color[8];			/* 0-3 are Google colors */
1886 } __ec_todo_packed;
1887 
1888 /* Lightbar command params v2
1889  * crbug.com/467716
1890  *
1891  * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by
1892  * logical groups to make it more manageable ( < 120 bytes).
1893  *
1894  * NOTE: Each of these groups must be less than 120 bytes.
1895  */
1896 
1897 struct lightbar_params_v2_timing {
1898 	/* Timing */
1899 	int32_t google_ramp_up;
1900 	int32_t google_ramp_down;
1901 	int32_t s3s0_ramp_up;
1902 	int32_t s0_tick_delay[2];		/* AC=0/1 */
1903 	int32_t s0a_tick_delay[2];		/* AC=0/1 */
1904 	int32_t s0s3_ramp_down;
1905 	int32_t s3_sleep_for;
1906 	int32_t s3_ramp_up;
1907 	int32_t s3_ramp_down;
1908 	int32_t s5_ramp_up;
1909 	int32_t s5_ramp_down;
1910 	int32_t tap_tick_delay;
1911 	int32_t tap_gate_delay;
1912 	int32_t tap_display_time;
1913 } __ec_todo_packed;
1914 
1915 struct lightbar_params_v2_tap {
1916 	/* Tap-for-battery params */
1917 	uint8_t tap_pct_red;
1918 	uint8_t tap_pct_green;
1919 	uint8_t tap_seg_min_on;
1920 	uint8_t tap_seg_max_on;
1921 	uint8_t tap_seg_osc;
1922 	uint8_t tap_idx[3];
1923 } __ec_todo_packed;
1924 
1925 struct lightbar_params_v2_oscillation {
1926 	/* Oscillation */
1927 	uint8_t osc_min[2];			/* AC=0/1 */
1928 	uint8_t osc_max[2];			/* AC=0/1 */
1929 	uint8_t w_ofs[2];			/* AC=0/1 */
1930 } __ec_todo_packed;
1931 
1932 struct lightbar_params_v2_brightness {
1933 	/* Brightness limits based on the backlight and AC. */
1934 	uint8_t bright_bl_off_fixed[2];		/* AC=0/1 */
1935 	uint8_t bright_bl_on_min[2];		/* AC=0/1 */
1936 	uint8_t bright_bl_on_max[2];		/* AC=0/1 */
1937 } __ec_todo_packed;
1938 
1939 struct lightbar_params_v2_thresholds {
1940 	/* Battery level thresholds */
1941 	uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1942 } __ec_todo_packed;
1943 
1944 struct lightbar_params_v2_colors {
1945 	/* Map [AC][battery_level] to color index */
1946 	uint8_t s0_idx[2][LB_BATTERY_LEVELS];	/* AP is running */
1947 	uint8_t s3_idx[2][LB_BATTERY_LEVELS];	/* AP is sleeping */
1948 
1949 	/* s5: single color pulse on inhibited power-up */
1950 	uint8_t s5_idx;
1951 
1952 	/* Color palette */
1953 	struct rgb_s color[8];			/* 0-3 are Google colors */
1954 } __ec_todo_packed;
1955 
1956 /* Lightbar program. */
1957 #define EC_LB_PROG_LEN 192
1958 struct lightbar_program {
1959 	uint8_t size;
1960 	uint8_t data[EC_LB_PROG_LEN];
1961 } __ec_todo_unpacked;
1962 
1963 struct ec_params_lightbar {
1964 	uint8_t cmd;		      /* Command (see enum lightbar_command) */
1965 	union {
1966 		/*
1967 		 * The following commands have no args:
1968 		 *
1969 		 * dump, off, on, init, get_seq, get_params_v0, get_params_v1,
1970 		 * version, get_brightness, get_demo, suspend, resume,
1971 		 * get_params_v2_timing, get_params_v2_tap, get_params_v2_osc,
1972 		 * get_params_v2_bright, get_params_v2_thlds,
1973 		 * get_params_v2_colors
1974 		 *
1975 		 * Don't use an empty struct, because C++ hates that.
1976 		 */
1977 
1978 		struct __ec_todo_unpacked {
1979 			uint8_t num;
1980 		} set_brightness, seq, demo;
1981 
1982 		struct __ec_todo_unpacked {
1983 			uint8_t ctrl, reg, value;
1984 		} reg;
1985 
1986 		struct __ec_todo_unpacked {
1987 			uint8_t led, red, green, blue;
1988 		} set_rgb;
1989 
1990 		struct __ec_todo_unpacked {
1991 			uint8_t led;
1992 		} get_rgb;
1993 
1994 		struct __ec_todo_unpacked {
1995 			uint8_t enable;
1996 		} manual_suspend_ctrl;
1997 
1998 		struct lightbar_params_v0 set_params_v0;
1999 		struct lightbar_params_v1 set_params_v1;
2000 
2001 		struct lightbar_params_v2_timing set_v2par_timing;
2002 		struct lightbar_params_v2_tap set_v2par_tap;
2003 		struct lightbar_params_v2_oscillation set_v2par_osc;
2004 		struct lightbar_params_v2_brightness set_v2par_bright;
2005 		struct lightbar_params_v2_thresholds set_v2par_thlds;
2006 		struct lightbar_params_v2_colors set_v2par_colors;
2007 
2008 		struct lightbar_program set_program;
2009 	};
2010 } __ec_todo_packed;
2011 
2012 struct ec_response_lightbar {
2013 	union {
2014 		struct __ec_todo_unpacked {
2015 			struct __ec_todo_unpacked {
2016 				uint8_t reg;
2017 				uint8_t ic0;
2018 				uint8_t ic1;
2019 			} vals[23];
2020 		} dump;
2021 
2022 		struct __ec_todo_unpacked {
2023 			uint8_t num;
2024 		} get_seq, get_brightness, get_demo;
2025 
2026 		struct lightbar_params_v0 get_params_v0;
2027 		struct lightbar_params_v1 get_params_v1;
2028 
2029 
2030 		struct lightbar_params_v2_timing get_params_v2_timing;
2031 		struct lightbar_params_v2_tap get_params_v2_tap;
2032 		struct lightbar_params_v2_oscillation get_params_v2_osc;
2033 		struct lightbar_params_v2_brightness get_params_v2_bright;
2034 		struct lightbar_params_v2_thresholds get_params_v2_thlds;
2035 		struct lightbar_params_v2_colors get_params_v2_colors;
2036 
2037 		struct __ec_todo_unpacked {
2038 			uint32_t num;
2039 			uint32_t flags;
2040 		} version;
2041 
2042 		struct __ec_todo_unpacked {
2043 			uint8_t red, green, blue;
2044 		} get_rgb;
2045 
2046 		/*
2047 		 * The following commands have no response:
2048 		 *
2049 		 * off, on, init, set_brightness, seq, reg, set_rgb, demo,
2050 		 * set_params_v0, set_params_v1, set_program,
2051 		 * manual_suspend_ctrl, suspend, resume, set_v2par_timing,
2052 		 * set_v2par_tap, set_v2par_osc, set_v2par_bright,
2053 		 * set_v2par_thlds, set_v2par_colors
2054 		 */
2055 	};
2056 } __ec_todo_packed;
2057 
2058 /* Lightbar commands */
2059 enum lightbar_command {
2060 	LIGHTBAR_CMD_DUMP = 0,
2061 	LIGHTBAR_CMD_OFF = 1,
2062 	LIGHTBAR_CMD_ON = 2,
2063 	LIGHTBAR_CMD_INIT = 3,
2064 	LIGHTBAR_CMD_SET_BRIGHTNESS = 4,
2065 	LIGHTBAR_CMD_SEQ = 5,
2066 	LIGHTBAR_CMD_REG = 6,
2067 	LIGHTBAR_CMD_SET_RGB = 7,
2068 	LIGHTBAR_CMD_GET_SEQ = 8,
2069 	LIGHTBAR_CMD_DEMO = 9,
2070 	LIGHTBAR_CMD_GET_PARAMS_V0 = 10,
2071 	LIGHTBAR_CMD_SET_PARAMS_V0 = 11,
2072 	LIGHTBAR_CMD_VERSION = 12,
2073 	LIGHTBAR_CMD_GET_BRIGHTNESS = 13,
2074 	LIGHTBAR_CMD_GET_RGB = 14,
2075 	LIGHTBAR_CMD_GET_DEMO = 15,
2076 	LIGHTBAR_CMD_GET_PARAMS_V1 = 16,
2077 	LIGHTBAR_CMD_SET_PARAMS_V1 = 17,
2078 	LIGHTBAR_CMD_SET_PROGRAM = 18,
2079 	LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19,
2080 	LIGHTBAR_CMD_SUSPEND = 20,
2081 	LIGHTBAR_CMD_RESUME = 21,
2082 	LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22,
2083 	LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23,
2084 	LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24,
2085 	LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25,
2086 	LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26,
2087 	LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27,
2088 	LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28,
2089 	LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29,
2090 	LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30,
2091 	LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31,
2092 	LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32,
2093 	LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33,
2094 	LIGHTBAR_NUM_CMDS
2095 };
2096 
2097 /*****************************************************************************/
2098 /* LED control commands */
2099 
2100 #define EC_CMD_LED_CONTROL 0x0029
2101 
2102 enum ec_led_id {
2103 	/* LED to indicate battery state of charge */
2104 	EC_LED_ID_BATTERY_LED = 0,
2105 	/*
2106 	 * LED to indicate system power state (on or in suspend).
2107 	 * May be on power button or on C-panel.
2108 	 */
2109 	EC_LED_ID_POWER_LED,
2110 	/* LED on power adapter or its plug */
2111 	EC_LED_ID_ADAPTER_LED,
2112 	/* LED to indicate left side */
2113 	EC_LED_ID_LEFT_LED,
2114 	/* LED to indicate right side */
2115 	EC_LED_ID_RIGHT_LED,
2116 	/* LED to indicate recovery mode with HW_REINIT */
2117 	EC_LED_ID_RECOVERY_HW_REINIT_LED,
2118 	/* LED to indicate sysrq debug mode. */
2119 	EC_LED_ID_SYSRQ_DEBUG_LED,
2120 
2121 	EC_LED_ID_COUNT
2122 };
2123 
2124 /* LED control flags */
2125 #define EC_LED_FLAGS_QUERY BIT(0) /* Query LED capability only */
2126 #define EC_LED_FLAGS_AUTO  BIT(1) /* Switch LED back to automatic control */
2127 
2128 enum ec_led_colors {
2129 	EC_LED_COLOR_RED = 0,
2130 	EC_LED_COLOR_GREEN,
2131 	EC_LED_COLOR_BLUE,
2132 	EC_LED_COLOR_YELLOW,
2133 	EC_LED_COLOR_WHITE,
2134 	EC_LED_COLOR_AMBER,
2135 
2136 	EC_LED_COLOR_COUNT
2137 };
2138 
2139 struct ec_params_led_control {
2140 	uint8_t led_id;     /* Which LED to control */
2141 	uint8_t flags;      /* Control flags */
2142 
2143 	uint8_t brightness[EC_LED_COLOR_COUNT];
2144 } __ec_align1;
2145 
2146 struct ec_response_led_control {
2147 	/*
2148 	 * Available brightness value range.
2149 	 *
2150 	 * Range 0 means color channel not present.
2151 	 * Range 1 means on/off control.
2152 	 * Other values means the LED is control by PWM.
2153 	 */
2154 	uint8_t brightness_range[EC_LED_COLOR_COUNT];
2155 } __ec_align1;
2156 
2157 /*****************************************************************************/
2158 /* Verified boot commands */
2159 
2160 /*
2161  * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be
2162  * reused for other purposes with version > 0.
2163  */
2164 
2165 /* Verified boot hash command */
2166 #define EC_CMD_VBOOT_HASH 0x002A
2167 
2168 struct ec_params_vboot_hash {
2169 	uint8_t cmd;             /* enum ec_vboot_hash_cmd */
2170 	uint8_t hash_type;       /* enum ec_vboot_hash_type */
2171 	uint8_t nonce_size;      /* Nonce size; may be 0 */
2172 	uint8_t reserved0;       /* Reserved; set 0 */
2173 	uint32_t offset;         /* Offset in flash to hash */
2174 	uint32_t size;           /* Number of bytes to hash */
2175 	uint8_t nonce_data[64];  /* Nonce data; ignored if nonce_size=0 */
2176 } __ec_align4;
2177 
2178 struct ec_response_vboot_hash {
2179 	uint8_t status;          /* enum ec_vboot_hash_status */
2180 	uint8_t hash_type;       /* enum ec_vboot_hash_type */
2181 	uint8_t digest_size;     /* Size of hash digest in bytes */
2182 	uint8_t reserved0;       /* Ignore; will be 0 */
2183 	uint32_t offset;         /* Offset in flash which was hashed */
2184 	uint32_t size;           /* Number of bytes hashed */
2185 	uint8_t hash_digest[64]; /* Hash digest data */
2186 } __ec_align4;
2187 
2188 enum ec_vboot_hash_cmd {
2189 	EC_VBOOT_HASH_GET = 0,       /* Get current hash status */
2190 	EC_VBOOT_HASH_ABORT = 1,     /* Abort calculating current hash */
2191 	EC_VBOOT_HASH_START = 2,     /* Start computing a new hash */
2192 	EC_VBOOT_HASH_RECALC = 3,    /* Synchronously compute a new hash */
2193 };
2194 
2195 enum ec_vboot_hash_type {
2196 	EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */
2197 };
2198 
2199 enum ec_vboot_hash_status {
2200 	EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */
2201 	EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */
2202 	EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */
2203 };
2204 
2205 /*
2206  * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC.
2207  * If one of these is specified, the EC will automatically update offset and
2208  * size to the correct values for the specified image (RO or RW).
2209  */
2210 #define EC_VBOOT_HASH_OFFSET_RO		0xfffffffe
2211 #define EC_VBOOT_HASH_OFFSET_ACTIVE	0xfffffffd
2212 #define EC_VBOOT_HASH_OFFSET_UPDATE	0xfffffffc
2213 
2214 /*
2215  * 'RW' is vague if there are multiple RW images; we mean the active one,
2216  * so the old constant is deprecated.
2217  */
2218 #define EC_VBOOT_HASH_OFFSET_RW EC_VBOOT_HASH_OFFSET_ACTIVE
2219 
2220 /*****************************************************************************/
2221 /*
2222  * Motion sense commands. We'll make separate structs for sub-commands with
2223  * different input args, so that we know how much to expect.
2224  */
2225 #define EC_CMD_MOTION_SENSE_CMD 0x002B
2226 
2227 /* Motion sense commands */
2228 enum motionsense_command {
2229 	/*
2230 	 * Dump command returns all motion sensor data including motion sense
2231 	 * module flags and individual sensor flags.
2232 	 */
2233 	MOTIONSENSE_CMD_DUMP = 0,
2234 
2235 	/*
2236 	 * Info command returns data describing the details of a given sensor,
2237 	 * including enum motionsensor_type, enum motionsensor_location, and
2238 	 * enum motionsensor_chip.
2239 	 */
2240 	MOTIONSENSE_CMD_INFO = 1,
2241 
2242 	/*
2243 	 * EC Rate command is a setter/getter command for the EC sampling rate
2244 	 * in milliseconds.
2245 	 * It is per sensor, the EC run sample task  at the minimum of all
2246 	 * sensors EC_RATE.
2247 	 * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR
2248 	 * to collect all the sensor samples.
2249 	 * For sensor with hardware FIFO, EC_RATE is used as the maximal delay
2250 	 * to process of all motion sensors in milliseconds.
2251 	 */
2252 	MOTIONSENSE_CMD_EC_RATE = 2,
2253 
2254 	/*
2255 	 * Sensor ODR command is a setter/getter command for the output data
2256 	 * rate of a specific motion sensor in millihertz.
2257 	 */
2258 	MOTIONSENSE_CMD_SENSOR_ODR = 3,
2259 
2260 	/*
2261 	 * Sensor range command is a setter/getter command for the range of
2262 	 * a specified motion sensor in +/-G's or +/- deg/s.
2263 	 */
2264 	MOTIONSENSE_CMD_SENSOR_RANGE = 4,
2265 
2266 	/*
2267 	 * Setter/getter command for the keyboard wake angle. When the lid
2268 	 * angle is greater than this value, keyboard wake is disabled in S3,
2269 	 * and when the lid angle goes less than this value, keyboard wake is
2270 	 * enabled. Note, the lid angle measurement is an approximate,
2271 	 * un-calibrated value, hence the wake angle isn't exact.
2272 	 */
2273 	MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5,
2274 
2275 	/*
2276 	 * Returns a single sensor data.
2277 	 */
2278 	MOTIONSENSE_CMD_DATA = 6,
2279 
2280 	/*
2281 	 * Return sensor fifo info.
2282 	 */
2283 	MOTIONSENSE_CMD_FIFO_INFO = 7,
2284 
2285 	/*
2286 	 * Insert a flush element in the fifo and return sensor fifo info.
2287 	 * The host can use that element to synchronize its operation.
2288 	 */
2289 	MOTIONSENSE_CMD_FIFO_FLUSH = 8,
2290 
2291 	/*
2292 	 * Return a portion of the fifo.
2293 	 */
2294 	MOTIONSENSE_CMD_FIFO_READ = 9,
2295 
2296 	/*
2297 	 * Perform low level calibration.
2298 	 * On sensors that support it, ask to do offset calibration.
2299 	 */
2300 	MOTIONSENSE_CMD_PERFORM_CALIB = 10,
2301 
2302 	/*
2303 	 * Sensor Offset command is a setter/getter command for the offset
2304 	 * used for calibration.
2305 	 * The offsets can be calculated by the host, or via
2306 	 * PERFORM_CALIB command.
2307 	 */
2308 	MOTIONSENSE_CMD_SENSOR_OFFSET = 11,
2309 
2310 	/*
2311 	 * List available activities for a MOTION sensor.
2312 	 * Indicates if they are enabled or disabled.
2313 	 */
2314 	MOTIONSENSE_CMD_LIST_ACTIVITIES = 12,
2315 
2316 	/*
2317 	 * Activity management
2318 	 * Enable/Disable activity recognition.
2319 	 */
2320 	MOTIONSENSE_CMD_SET_ACTIVITY = 13,
2321 
2322 	/*
2323 	 * Lid Angle
2324 	 */
2325 	MOTIONSENSE_CMD_LID_ANGLE = 14,
2326 
2327 	/*
2328 	 * Allow the FIFO to trigger interrupt via MKBP events.
2329 	 * By default the FIFO does not send interrupt to process the FIFO
2330 	 * until the AP is ready or it is coming from a wakeup sensor.
2331 	 */
2332 	MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15,
2333 
2334 	/*
2335 	 * Spoof the readings of the sensors.  The spoofed readings can be set
2336 	 * to arbitrary values, or will lock to the last read actual values.
2337 	 */
2338 	MOTIONSENSE_CMD_SPOOF = 16,
2339 
2340 	/* Set lid angle for tablet mode detection. */
2341 	MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE = 17,
2342 
2343 	/*
2344 	 * Sensor Scale command is a setter/getter command for the calibration
2345 	 * scale.
2346 	 */
2347 	MOTIONSENSE_CMD_SENSOR_SCALE = 18,
2348 
2349 	/* Number of motionsense sub-commands. */
2350 	MOTIONSENSE_NUM_CMDS
2351 };
2352 
2353 /* List of motion sensor types. */
2354 enum motionsensor_type {
2355 	MOTIONSENSE_TYPE_ACCEL = 0,
2356 	MOTIONSENSE_TYPE_GYRO = 1,
2357 	MOTIONSENSE_TYPE_MAG = 2,
2358 	MOTIONSENSE_TYPE_PROX = 3,
2359 	MOTIONSENSE_TYPE_LIGHT = 4,
2360 	MOTIONSENSE_TYPE_ACTIVITY = 5,
2361 	MOTIONSENSE_TYPE_BARO = 6,
2362 	MOTIONSENSE_TYPE_SYNC = 7,
2363 	MOTIONSENSE_TYPE_MAX,
2364 };
2365 
2366 /* List of motion sensor locations. */
2367 enum motionsensor_location {
2368 	MOTIONSENSE_LOC_BASE = 0,
2369 	MOTIONSENSE_LOC_LID = 1,
2370 	MOTIONSENSE_LOC_CAMERA = 2,
2371 	MOTIONSENSE_LOC_MAX,
2372 };
2373 
2374 /* List of motion sensor chips. */
2375 enum motionsensor_chip {
2376 	MOTIONSENSE_CHIP_KXCJ9 = 0,
2377 	MOTIONSENSE_CHIP_LSM6DS0 = 1,
2378 	MOTIONSENSE_CHIP_BMI160 = 2,
2379 	MOTIONSENSE_CHIP_SI1141 = 3,
2380 	MOTIONSENSE_CHIP_SI1142 = 4,
2381 	MOTIONSENSE_CHIP_SI1143 = 5,
2382 	MOTIONSENSE_CHIP_KX022 = 6,
2383 	MOTIONSENSE_CHIP_L3GD20H = 7,
2384 	MOTIONSENSE_CHIP_BMA255 = 8,
2385 	MOTIONSENSE_CHIP_BMP280 = 9,
2386 	MOTIONSENSE_CHIP_OPT3001 = 10,
2387 	MOTIONSENSE_CHIP_BH1730 = 11,
2388 	MOTIONSENSE_CHIP_GPIO = 12,
2389 	MOTIONSENSE_CHIP_LIS2DH = 13,
2390 	MOTIONSENSE_CHIP_LSM6DSM = 14,
2391 	MOTIONSENSE_CHIP_LIS2DE = 15,
2392 	MOTIONSENSE_CHIP_LIS2MDL = 16,
2393 	MOTIONSENSE_CHIP_LSM6DS3 = 17,
2394 	MOTIONSENSE_CHIP_LSM6DSO = 18,
2395 	MOTIONSENSE_CHIP_LNG2DM = 19,
2396 	MOTIONSENSE_CHIP_MAX,
2397 };
2398 
2399 /* List of orientation positions */
2400 enum motionsensor_orientation {
2401 	MOTIONSENSE_ORIENTATION_LANDSCAPE = 0,
2402 	MOTIONSENSE_ORIENTATION_PORTRAIT = 1,
2403 	MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_PORTRAIT = 2,
2404 	MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_LANDSCAPE = 3,
2405 	MOTIONSENSE_ORIENTATION_UNKNOWN = 4,
2406 };
2407 
2408 struct ec_response_motion_sensor_data {
2409 	/* Flags for each sensor. */
2410 	uint8_t flags;
2411 	/* Sensor number the data comes from. */
2412 	uint8_t sensor_num;
2413 	/* Each sensor is up to 3-axis. */
2414 	union {
2415 		int16_t             data[3];
2416 		struct __ec_todo_packed {
2417 			uint16_t    reserved;
2418 			uint32_t    timestamp;
2419 		};
2420 		struct __ec_todo_unpacked {
2421 			uint8_t     activity; /* motionsensor_activity */
2422 			uint8_t     state;
2423 			int16_t     add_info[2];
2424 		};
2425 	};
2426 } __ec_todo_packed;
2427 
2428 /* Note: used in ec_response_get_next_data */
2429 struct ec_response_motion_sense_fifo_info {
2430 	/* Size of the fifo */
2431 	uint16_t size;
2432 	/* Amount of space used in the fifo */
2433 	uint16_t count;
2434 	/* Timestamp recorded in us.
2435 	 * aka accurate timestamp when host event was triggered.
2436 	 */
2437 	uint32_t timestamp;
2438 	/* Total amount of vector lost */
2439 	uint16_t total_lost;
2440 	/* Lost events since the last fifo_info, per sensors */
2441 	uint16_t lost[];
2442 } __ec_todo_packed;
2443 
2444 struct ec_response_motion_sense_fifo_data {
2445 	uint32_t number_data;
2446 	struct ec_response_motion_sensor_data data[];
2447 } __ec_todo_packed;
2448 
2449 /* List supported activity recognition */
2450 enum motionsensor_activity {
2451 	MOTIONSENSE_ACTIVITY_RESERVED = 0,
2452 	MOTIONSENSE_ACTIVITY_SIG_MOTION = 1,
2453 	MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2,
2454 	MOTIONSENSE_ACTIVITY_ORIENTATION = 3,
2455 };
2456 
2457 struct ec_motion_sense_activity {
2458 	uint8_t sensor_num;
2459 	uint8_t activity; /* one of enum motionsensor_activity */
2460 	uint8_t enable;   /* 1: enable, 0: disable */
2461 	uint8_t reserved;
2462 	uint16_t parameters[3]; /* activity dependent parameters */
2463 } __ec_todo_unpacked;
2464 
2465 /* Module flag masks used for the dump sub-command. */
2466 #define MOTIONSENSE_MODULE_FLAG_ACTIVE BIT(0)
2467 
2468 /* Sensor flag masks used for the dump sub-command. */
2469 #define MOTIONSENSE_SENSOR_FLAG_PRESENT BIT(0)
2470 
2471 /*
2472  * Flush entry for synchronization.
2473  * data contains time stamp
2474  */
2475 #define MOTIONSENSE_SENSOR_FLAG_FLUSH BIT(0)
2476 #define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP BIT(1)
2477 #define MOTIONSENSE_SENSOR_FLAG_WAKEUP BIT(2)
2478 #define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE BIT(3)
2479 #define MOTIONSENSE_SENSOR_FLAG_ODR BIT(4)
2480 
2481 /*
2482  * Send this value for the data element to only perform a read. If you
2483  * send any other value, the EC will interpret it as data to set and will
2484  * return the actual value set.
2485  */
2486 #define EC_MOTION_SENSE_NO_VALUE -1
2487 
2488 #define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000
2489 
2490 /* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */
2491 /* Set Calibration information */
2492 #define MOTION_SENSE_SET_OFFSET BIT(0)
2493 
2494 /* Default Scale value, factor 1. */
2495 #define MOTION_SENSE_DEFAULT_SCALE BIT(15)
2496 
2497 #define LID_ANGLE_UNRELIABLE 500
2498 
2499 enum motionsense_spoof_mode {
2500 	/* Disable spoof mode. */
2501 	MOTIONSENSE_SPOOF_MODE_DISABLE = 0,
2502 
2503 	/* Enable spoof mode, but use provided component values. */
2504 	MOTIONSENSE_SPOOF_MODE_CUSTOM,
2505 
2506 	/* Enable spoof mode, but use the current sensor values. */
2507 	MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT,
2508 
2509 	/* Query the current spoof mode status for the sensor. */
2510 	MOTIONSENSE_SPOOF_MODE_QUERY,
2511 };
2512 
2513 struct ec_params_motion_sense {
2514 	uint8_t cmd;
2515 	union {
2516 		/* Used for MOTIONSENSE_CMD_DUMP. */
2517 		struct __ec_todo_unpacked {
2518 			/*
2519 			 * Maximal number of sensor the host is expecting.
2520 			 * 0 means the host is only interested in the number
2521 			 * of sensors controlled by the EC.
2522 			 */
2523 			uint8_t max_sensor_count;
2524 		} dump;
2525 
2526 		/*
2527 		 * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE.
2528 		 */
2529 		struct __ec_todo_unpacked {
2530 			/* Data to set or EC_MOTION_SENSE_NO_VALUE to read.
2531 			 * kb_wake_angle: angle to wakup AP.
2532 			 */
2533 			int16_t data;
2534 		} kb_wake_angle;
2535 
2536 		/*
2537 		 * Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA
2538 		 * and MOTIONSENSE_CMD_PERFORM_CALIB.
2539 		 */
2540 		struct __ec_todo_unpacked {
2541 			uint8_t sensor_num;
2542 		} info, info_3, data, fifo_flush, perform_calib,
2543 				list_activities;
2544 
2545 		/*
2546 		 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR
2547 		 * and MOTIONSENSE_CMD_SENSOR_RANGE.
2548 		 */
2549 		struct __ec_todo_unpacked {
2550 			uint8_t sensor_num;
2551 
2552 			/* Rounding flag, true for round-up, false for down. */
2553 			uint8_t roundup;
2554 
2555 			uint16_t reserved;
2556 
2557 			/* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */
2558 			int32_t data;
2559 		} ec_rate, sensor_odr, sensor_range;
2560 
2561 		/* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */
2562 		struct __ec_todo_packed {
2563 			uint8_t sensor_num;
2564 
2565 			/*
2566 			 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set
2567 			 * the calibration information in the EC.
2568 			 * If unset, just retrieve calibration information.
2569 			 */
2570 			uint16_t flags;
2571 
2572 			/*
2573 			 * Temperature at calibration, in units of 0.01 C
2574 			 * 0x8000: invalid / unknown.
2575 			 * 0x0: 0C
2576 			 * 0x7fff: +327.67C
2577 			 */
2578 			int16_t temp;
2579 
2580 			/*
2581 			 * Offset for calibration.
2582 			 * Unit:
2583 			 * Accelerometer: 1/1024 g
2584 			 * Gyro:          1/1024 deg/s
2585 			 * Compass:       1/16 uT
2586 			 */
2587 			int16_t offset[3];
2588 		} sensor_offset;
2589 
2590 		/* Used for MOTIONSENSE_CMD_SENSOR_SCALE */
2591 		struct __ec_todo_packed {
2592 			uint8_t sensor_num;
2593 
2594 			/*
2595 			 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set
2596 			 * the calibration information in the EC.
2597 			 * If unset, just retrieve calibration information.
2598 			 */
2599 			uint16_t flags;
2600 
2601 			/*
2602 			 * Temperature at calibration, in units of 0.01 C
2603 			 * 0x8000: invalid / unknown.
2604 			 * 0x0: 0C
2605 			 * 0x7fff: +327.67C
2606 			 */
2607 			int16_t temp;
2608 
2609 			/*
2610 			 * Scale for calibration:
2611 			 * By default scale is 1, it is encoded on 16bits:
2612 			 * 1 = BIT(15)
2613 			 * ~2 = 0xFFFF
2614 			 * ~0 = 0.
2615 			 */
2616 			uint16_t scale[3];
2617 		} sensor_scale;
2618 
2619 
2620 		/* Used for MOTIONSENSE_CMD_FIFO_INFO */
2621 		/* (no params) */
2622 
2623 		/* Used for MOTIONSENSE_CMD_FIFO_READ */
2624 		struct __ec_todo_unpacked {
2625 			/*
2626 			 * Number of expected vector to return.
2627 			 * EC may return less or 0 if none available.
2628 			 */
2629 			uint32_t max_data_vector;
2630 		} fifo_read;
2631 
2632 		struct ec_motion_sense_activity set_activity;
2633 
2634 		/* Used for MOTIONSENSE_CMD_LID_ANGLE */
2635 		/* (no params) */
2636 
2637 		/* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */
2638 		struct __ec_todo_unpacked {
2639 			/*
2640 			 * 1: enable, 0 disable fifo,
2641 			 * EC_MOTION_SENSE_NO_VALUE return value.
2642 			 */
2643 			int8_t enable;
2644 		} fifo_int_enable;
2645 
2646 		/* Used for MOTIONSENSE_CMD_SPOOF */
2647 		struct __ec_todo_packed {
2648 			uint8_t sensor_id;
2649 
2650 			/* See enum motionsense_spoof_mode. */
2651 			uint8_t spoof_enable;
2652 
2653 			/* Ignored, used for alignment. */
2654 			uint8_t reserved;
2655 
2656 			/* Individual component values to spoof. */
2657 			int16_t components[3];
2658 		} spoof;
2659 
2660 		/* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */
2661 		struct __ec_todo_unpacked {
2662 			/*
2663 			 * Lid angle threshold for switching between tablet and
2664 			 * clamshell mode.
2665 			 */
2666 			int16_t lid_angle;
2667 
2668 			/*
2669 			 * Hysteresis degree to prevent fluctuations between
2670 			 * clamshell and tablet mode if lid angle keeps
2671 			 * changing around the threshold. Lid motion driver will
2672 			 * use lid_angle + hys_degree to trigger tablet mode and
2673 			 * lid_angle - hys_degree to trigger clamshell mode.
2674 			 */
2675 			int16_t hys_degree;
2676 		} tablet_mode_threshold;
2677 	};
2678 } __ec_todo_packed;
2679 
2680 struct ec_response_motion_sense {
2681 	union {
2682 		/* Used for MOTIONSENSE_CMD_DUMP */
2683 		struct __ec_todo_unpacked {
2684 			/* Flags representing the motion sensor module. */
2685 			uint8_t module_flags;
2686 
2687 			/* Number of sensors managed directly by the EC. */
2688 			uint8_t sensor_count;
2689 
2690 			/*
2691 			 * Sensor data is truncated if response_max is too small
2692 			 * for holding all the data.
2693 			 */
2694 			struct ec_response_motion_sensor_data sensor[0];
2695 		} dump;
2696 
2697 		/* Used for MOTIONSENSE_CMD_INFO. */
2698 		struct __ec_todo_unpacked {
2699 			/* Should be element of enum motionsensor_type. */
2700 			uint8_t type;
2701 
2702 			/* Should be element of enum motionsensor_location. */
2703 			uint8_t location;
2704 
2705 			/* Should be element of enum motionsensor_chip. */
2706 			uint8_t chip;
2707 		} info;
2708 
2709 		/* Used for MOTIONSENSE_CMD_INFO version 3 */
2710 		struct __ec_todo_unpacked {
2711 			/* Should be element of enum motionsensor_type. */
2712 			uint8_t type;
2713 
2714 			/* Should be element of enum motionsensor_location. */
2715 			uint8_t location;
2716 
2717 			/* Should be element of enum motionsensor_chip. */
2718 			uint8_t chip;
2719 
2720 			/* Minimum sensor sampling frequency */
2721 			uint32_t min_frequency;
2722 
2723 			/* Maximum sensor sampling frequency */
2724 			uint32_t max_frequency;
2725 
2726 			/* Max number of sensor events that could be in fifo */
2727 			uint32_t fifo_max_event_count;
2728 		} info_3;
2729 
2730 		/* Used for MOTIONSENSE_CMD_DATA */
2731 		struct ec_response_motion_sensor_data data;
2732 
2733 		/*
2734 		 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR,
2735 		 * MOTIONSENSE_CMD_SENSOR_RANGE,
2736 		 * MOTIONSENSE_CMD_KB_WAKE_ANGLE,
2737 		 * MOTIONSENSE_CMD_FIFO_INT_ENABLE and
2738 		 * MOTIONSENSE_CMD_SPOOF.
2739 		 */
2740 		struct __ec_todo_unpacked {
2741 			/* Current value of the parameter queried. */
2742 			int32_t ret;
2743 		} ec_rate, sensor_odr, sensor_range, kb_wake_angle,
2744 		  fifo_int_enable, spoof;
2745 
2746 		/*
2747 		 * Used for MOTIONSENSE_CMD_SENSOR_OFFSET,
2748 		 * PERFORM_CALIB.
2749 		 */
2750 		struct __ec_todo_unpacked  {
2751 			int16_t temp;
2752 			int16_t offset[3];
2753 		} sensor_offset, perform_calib;
2754 
2755 		/* Used for MOTIONSENSE_CMD_SENSOR_SCALE */
2756 		struct __ec_todo_unpacked  {
2757 			int16_t temp;
2758 			uint16_t scale[3];
2759 		} sensor_scale;
2760 
2761 		struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush;
2762 
2763 		struct ec_response_motion_sense_fifo_data fifo_read;
2764 
2765 		struct __ec_todo_packed {
2766 			uint16_t reserved;
2767 			uint32_t enabled;
2768 			uint32_t disabled;
2769 		} list_activities;
2770 
2771 		/* No params for set activity */
2772 
2773 		/* Used for MOTIONSENSE_CMD_LID_ANGLE */
2774 		struct __ec_todo_unpacked {
2775 			/*
2776 			 * Angle between 0 and 360 degree if available,
2777 			 * LID_ANGLE_UNRELIABLE otherwise.
2778 			 */
2779 			uint16_t value;
2780 		} lid_angle;
2781 
2782 		/* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */
2783 		struct __ec_todo_unpacked {
2784 			/*
2785 			 * Lid angle threshold for switching between tablet and
2786 			 * clamshell mode.
2787 			 */
2788 			uint16_t lid_angle;
2789 
2790 			/* Hysteresis degree. */
2791 			uint16_t hys_degree;
2792 		} tablet_mode_threshold;
2793 
2794 	};
2795 } __ec_todo_packed;
2796 
2797 /*****************************************************************************/
2798 /* Force lid open command */
2799 
2800 /* Make lid event always open */
2801 #define EC_CMD_FORCE_LID_OPEN 0x002C
2802 
2803 struct ec_params_force_lid_open {
2804 	uint8_t enabled;
2805 } __ec_align1;
2806 
2807 /*****************************************************************************/
2808 /* Configure the behavior of the power button */
2809 #define EC_CMD_CONFIG_POWER_BUTTON 0x002D
2810 
2811 enum ec_config_power_button_flags {
2812 	/* Enable/Disable power button pulses for x86 devices */
2813 	EC_POWER_BUTTON_ENABLE_PULSE = BIT(0),
2814 };
2815 
2816 struct ec_params_config_power_button {
2817 	/* See enum ec_config_power_button_flags */
2818 	uint8_t flags;
2819 } __ec_align1;
2820 
2821 /*****************************************************************************/
2822 /* USB charging control commands */
2823 
2824 /* Set USB port charging mode */
2825 #define EC_CMD_USB_CHARGE_SET_MODE 0x0030
2826 
2827 struct ec_params_usb_charge_set_mode {
2828 	uint8_t usb_port_id;
2829 	uint8_t mode:7;
2830 	uint8_t inhibit_charge:1;
2831 } __ec_align1;
2832 
2833 /*****************************************************************************/
2834 /* Persistent storage for host */
2835 
2836 /* Maximum bytes that can be read/written in a single command */
2837 #define EC_PSTORE_SIZE_MAX 64
2838 
2839 /* Get persistent storage info */
2840 #define EC_CMD_PSTORE_INFO 0x0040
2841 
2842 struct ec_response_pstore_info {
2843 	/* Persistent storage size, in bytes */
2844 	uint32_t pstore_size;
2845 	/* Access size; read/write offset and size must be a multiple of this */
2846 	uint32_t access_size;
2847 } __ec_align4;
2848 
2849 /*
2850  * Read persistent storage
2851  *
2852  * Response is params.size bytes of data.
2853  */
2854 #define EC_CMD_PSTORE_READ 0x0041
2855 
2856 struct ec_params_pstore_read {
2857 	uint32_t offset;   /* Byte offset to read */
2858 	uint32_t size;     /* Size to read in bytes */
2859 } __ec_align4;
2860 
2861 /* Write persistent storage */
2862 #define EC_CMD_PSTORE_WRITE 0x0042
2863 
2864 struct ec_params_pstore_write {
2865 	uint32_t offset;   /* Byte offset to write */
2866 	uint32_t size;     /* Size to write in bytes */
2867 	uint8_t data[EC_PSTORE_SIZE_MAX];
2868 } __ec_align4;
2869 
2870 /*****************************************************************************/
2871 /* Real-time clock */
2872 
2873 /* RTC params and response structures */
2874 struct ec_params_rtc {
2875 	uint32_t time;
2876 } __ec_align4;
2877 
2878 struct ec_response_rtc {
2879 	uint32_t time;
2880 } __ec_align4;
2881 
2882 /* These use ec_response_rtc */
2883 #define EC_CMD_RTC_GET_VALUE 0x0044
2884 #define EC_CMD_RTC_GET_ALARM 0x0045
2885 
2886 /* These all use ec_params_rtc */
2887 #define EC_CMD_RTC_SET_VALUE 0x0046
2888 #define EC_CMD_RTC_SET_ALARM 0x0047
2889 
2890 /* Pass as time param to SET_ALARM to clear the current alarm */
2891 #define EC_RTC_ALARM_CLEAR 0
2892 
2893 /*****************************************************************************/
2894 /* Port80 log access */
2895 
2896 /* Maximum entries that can be read/written in a single command */
2897 #define EC_PORT80_SIZE_MAX 32
2898 
2899 /* Get last port80 code from previous boot */
2900 #define EC_CMD_PORT80_LAST_BOOT 0x0048
2901 #define EC_CMD_PORT80_READ 0x0048
2902 
2903 enum ec_port80_subcmd {
2904 	EC_PORT80_GET_INFO = 0,
2905 	EC_PORT80_READ_BUFFER,
2906 };
2907 
2908 struct ec_params_port80_read {
2909 	uint16_t subcmd;
2910 	union {
2911 		struct __ec_todo_unpacked {
2912 			uint32_t offset;
2913 			uint32_t num_entries;
2914 		} read_buffer;
2915 	};
2916 } __ec_todo_packed;
2917 
2918 struct ec_response_port80_read {
2919 	union {
2920 		struct __ec_todo_unpacked {
2921 			uint32_t writes;
2922 			uint32_t history_size;
2923 			uint32_t last_boot;
2924 		} get_info;
2925 		struct __ec_todo_unpacked {
2926 			uint16_t codes[EC_PORT80_SIZE_MAX];
2927 		} data;
2928 	};
2929 } __ec_todo_packed;
2930 
2931 struct ec_response_port80_last_boot {
2932 	uint16_t code;
2933 } __ec_align2;
2934 
2935 /*****************************************************************************/
2936 /* Temporary secure storage for host verified boot use */
2937 
2938 /* Number of bytes in a vstore slot */
2939 #define EC_VSTORE_SLOT_SIZE 64
2940 
2941 /* Maximum number of vstore slots */
2942 #define EC_VSTORE_SLOT_MAX 32
2943 
2944 /* Get persistent storage info */
2945 #define EC_CMD_VSTORE_INFO 0x0049
2946 struct ec_response_vstore_info {
2947 	/* Indicates which slots are locked */
2948 	uint32_t slot_locked;
2949 	/* Total number of slots available */
2950 	uint8_t slot_count;
2951 } __ec_align_size1;
2952 
2953 /*
2954  * Read temporary secure storage
2955  *
2956  * Response is EC_VSTORE_SLOT_SIZE bytes of data.
2957  */
2958 #define EC_CMD_VSTORE_READ 0x004A
2959 
2960 struct ec_params_vstore_read {
2961 	uint8_t slot; /* Slot to read from */
2962 } __ec_align1;
2963 
2964 struct ec_response_vstore_read {
2965 	uint8_t data[EC_VSTORE_SLOT_SIZE];
2966 } __ec_align1;
2967 
2968 /*
2969  * Write temporary secure storage and lock it.
2970  */
2971 #define EC_CMD_VSTORE_WRITE 0x004B
2972 
2973 struct ec_params_vstore_write {
2974 	uint8_t slot; /* Slot to write to */
2975 	uint8_t data[EC_VSTORE_SLOT_SIZE];
2976 } __ec_align1;
2977 
2978 /*****************************************************************************/
2979 /* Thermal engine commands. Note that there are two implementations. We'll
2980  * reuse the command number, but the data and behavior is incompatible.
2981  * Version 0 is what originally shipped on Link.
2982  * Version 1 separates the CPU thermal limits from the fan control.
2983  */
2984 
2985 #define EC_CMD_THERMAL_SET_THRESHOLD 0x0050
2986 #define EC_CMD_THERMAL_GET_THRESHOLD 0x0051
2987 
2988 /* The version 0 structs are opaque. You have to know what they are for
2989  * the get/set commands to make any sense.
2990  */
2991 
2992 /* Version 0 - set */
2993 struct ec_params_thermal_set_threshold {
2994 	uint8_t sensor_type;
2995 	uint8_t threshold_id;
2996 	uint16_t value;
2997 } __ec_align2;
2998 
2999 /* Version 0 - get */
3000 struct ec_params_thermal_get_threshold {
3001 	uint8_t sensor_type;
3002 	uint8_t threshold_id;
3003 } __ec_align1;
3004 
3005 struct ec_response_thermal_get_threshold {
3006 	uint16_t value;
3007 } __ec_align2;
3008 
3009 
3010 /* The version 1 structs are visible. */
3011 enum ec_temp_thresholds {
3012 	EC_TEMP_THRESH_WARN = 0,
3013 	EC_TEMP_THRESH_HIGH,
3014 	EC_TEMP_THRESH_HALT,
3015 
3016 	EC_TEMP_THRESH_COUNT
3017 };
3018 
3019 /*
3020  * Thermal configuration for one temperature sensor. Temps are in degrees K.
3021  * Zero values will be silently ignored by the thermal task.
3022  *
3023  * Set 'temp_host' value allows thermal task to trigger some event with 1 degree
3024  * hysteresis.
3025  * For example,
3026  *	temp_host[EC_TEMP_THRESH_HIGH] = 300 K
3027  *	temp_host_release[EC_TEMP_THRESH_HIGH] = 0 K
3028  * EC will throttle ap when temperature >= 301 K, and release throttling when
3029  * temperature <= 299 K.
3030  *
3031  * Set 'temp_host_release' value allows thermal task has a custom hysteresis.
3032  * For example,
3033  *	temp_host[EC_TEMP_THRESH_HIGH] = 300 K
3034  *	temp_host_release[EC_TEMP_THRESH_HIGH] = 295 K
3035  * EC will throttle ap when temperature >= 301 K, and release throttling when
3036  * temperature <= 294 K.
3037  *
3038  * Note that this structure is a sub-structure of
3039  * ec_params_thermal_set_threshold_v1, but maintains its alignment there.
3040  */
3041 struct ec_thermal_config {
3042 	uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */
3043 	uint32_t temp_host_release[EC_TEMP_THRESH_COUNT]; /* release levels */
3044 	uint32_t temp_fan_off;		/* no active cooling needed */
3045 	uint32_t temp_fan_max;		/* max active cooling needed */
3046 } __ec_align4;
3047 
3048 /* Version 1 - get config for one sensor. */
3049 struct ec_params_thermal_get_threshold_v1 {
3050 	uint32_t sensor_num;
3051 } __ec_align4;
3052 /* This returns a struct ec_thermal_config */
3053 
3054 /*
3055  * Version 1 - set config for one sensor.
3056  * Use read-modify-write for best results!
3057  */
3058 struct ec_params_thermal_set_threshold_v1 {
3059 	uint32_t sensor_num;
3060 	struct ec_thermal_config cfg;
3061 } __ec_align4;
3062 /* This returns no data */
3063 
3064 /****************************************************************************/
3065 
3066 /* Toggle automatic fan control */
3067 #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052
3068 
3069 /* Version 1 of input params */
3070 struct ec_params_auto_fan_ctrl_v1 {
3071 	uint8_t fan_idx;
3072 } __ec_align1;
3073 
3074 /* Get/Set TMP006 calibration data */
3075 #define EC_CMD_TMP006_GET_CALIBRATION 0x0053
3076 #define EC_CMD_TMP006_SET_CALIBRATION 0x0054
3077 
3078 /*
3079  * The original TMP006 calibration only needed four params, but now we need
3080  * more. Since the algorithm is nothing but magic numbers anyway, we'll leave
3081  * the params opaque. The v1 "get" response will include the algorithm number
3082  * and how many params it requires. That way we can change the EC code without
3083  * needing to update this file. We can also use a different algorithm on each
3084  * sensor.
3085  */
3086 
3087 /* This is the same struct for both v0 and v1. */
3088 struct ec_params_tmp006_get_calibration {
3089 	uint8_t index;
3090 } __ec_align1;
3091 
3092 /* Version 0 */
3093 struct ec_response_tmp006_get_calibration_v0 {
3094 	float s0;
3095 	float b0;
3096 	float b1;
3097 	float b2;
3098 } __ec_align4;
3099 
3100 struct ec_params_tmp006_set_calibration_v0 {
3101 	uint8_t index;
3102 	uint8_t reserved[3];
3103 	float s0;
3104 	float b0;
3105 	float b1;
3106 	float b2;
3107 } __ec_align4;
3108 
3109 /* Version 1 */
3110 struct ec_response_tmp006_get_calibration_v1 {
3111 	uint8_t algorithm;
3112 	uint8_t num_params;
3113 	uint8_t reserved[2];
3114 	float val[];
3115 } __ec_align4;
3116 
3117 struct ec_params_tmp006_set_calibration_v1 {
3118 	uint8_t index;
3119 	uint8_t algorithm;
3120 	uint8_t num_params;
3121 	uint8_t reserved;
3122 	float val[];
3123 } __ec_align4;
3124 
3125 
3126 /* Read raw TMP006 data */
3127 #define EC_CMD_TMP006_GET_RAW 0x0055
3128 
3129 struct ec_params_tmp006_get_raw {
3130 	uint8_t index;
3131 } __ec_align1;
3132 
3133 struct ec_response_tmp006_get_raw {
3134 	int32_t t;  /* In 1/100 K */
3135 	int32_t v;  /* In nV */
3136 } __ec_align4;
3137 
3138 /*****************************************************************************/
3139 /* MKBP - Matrix KeyBoard Protocol */
3140 
3141 /*
3142  * Read key state
3143  *
3144  * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for
3145  * expected response size.
3146  *
3147  * NOTE: This has been superseded by EC_CMD_MKBP_GET_NEXT_EVENT.  If you wish
3148  * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type
3149  * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX.
3150  */
3151 #define EC_CMD_MKBP_STATE 0x0060
3152 
3153 /*
3154  * Provide information about various MKBP things.  See enum ec_mkbp_info_type.
3155  */
3156 #define EC_CMD_MKBP_INFO 0x0061
3157 
3158 struct ec_response_mkbp_info {
3159 	uint32_t rows;
3160 	uint32_t cols;
3161 	/* Formerly "switches", which was 0. */
3162 	uint8_t reserved;
3163 } __ec_align_size1;
3164 
3165 struct ec_params_mkbp_info {
3166 	uint8_t info_type;
3167 	uint8_t event_type;
3168 } __ec_align1;
3169 
3170 enum ec_mkbp_info_type {
3171 	/*
3172 	 * Info about the keyboard matrix: number of rows and columns.
3173 	 *
3174 	 * Returns struct ec_response_mkbp_info.
3175 	 */
3176 	EC_MKBP_INFO_KBD = 0,
3177 
3178 	/*
3179 	 * For buttons and switches, info about which specifically are
3180 	 * supported.  event_type must be set to one of the values in enum
3181 	 * ec_mkbp_event.
3182 	 *
3183 	 * For EC_MKBP_EVENT_BUTTON and EC_MKBP_EVENT_SWITCH, returns a 4 byte
3184 	 * bitmask indicating which buttons or switches are present.  See the
3185 	 * bit inidices below.
3186 	 */
3187 	EC_MKBP_INFO_SUPPORTED = 1,
3188 
3189 	/*
3190 	 * Instantaneous state of buttons and switches.
3191 	 *
3192 	 * event_type must be set to one of the values in enum ec_mkbp_event.
3193 	 *
3194 	 * For EC_MKBP_EVENT_KEY_MATRIX, returns uint8_t key_matrix[13]
3195 	 * indicating the current state of the keyboard matrix.
3196 	 *
3197 	 * For EC_MKBP_EVENT_HOST_EVENT, return uint32_t host_event, the raw
3198 	 * event state.
3199 	 *
3200 	 * For EC_MKBP_EVENT_BUTTON, returns uint32_t buttons, indicating the
3201 	 * state of supported buttons.
3202 	 *
3203 	 * For EC_MKBP_EVENT_SWITCH, returns uint32_t switches, indicating the
3204 	 * state of supported switches.
3205 	 */
3206 	EC_MKBP_INFO_CURRENT = 2,
3207 };
3208 
3209 /* Simulate key press */
3210 #define EC_CMD_MKBP_SIMULATE_KEY 0x0062
3211 
3212 struct ec_params_mkbp_simulate_key {
3213 	uint8_t col;
3214 	uint8_t row;
3215 	uint8_t pressed;
3216 } __ec_align1;
3217 
3218 #define EC_CMD_GET_KEYBOARD_ID 0x0063
3219 
3220 struct ec_response_keyboard_id {
3221 	uint32_t keyboard_id;
3222 } __ec_align4;
3223 
3224 enum keyboard_id {
3225 	KEYBOARD_ID_UNSUPPORTED = 0,
3226 	KEYBOARD_ID_UNREADABLE = 0xffffffff,
3227 };
3228 
3229 /* Configure keyboard scanning */
3230 #define EC_CMD_MKBP_SET_CONFIG 0x0064
3231 #define EC_CMD_MKBP_GET_CONFIG 0x0065
3232 
3233 /* flags */
3234 enum mkbp_config_flags {
3235 	EC_MKBP_FLAGS_ENABLE = 1,	/* Enable keyboard scanning */
3236 };
3237 
3238 enum mkbp_config_valid {
3239 	EC_MKBP_VALID_SCAN_PERIOD		= BIT(0),
3240 	EC_MKBP_VALID_POLL_TIMEOUT		= BIT(1),
3241 	EC_MKBP_VALID_MIN_POST_SCAN_DELAY	= BIT(3),
3242 	EC_MKBP_VALID_OUTPUT_SETTLE		= BIT(4),
3243 	EC_MKBP_VALID_DEBOUNCE_DOWN		= BIT(5),
3244 	EC_MKBP_VALID_DEBOUNCE_UP		= BIT(6),
3245 	EC_MKBP_VALID_FIFO_MAX_DEPTH		= BIT(7),
3246 };
3247 
3248 /*
3249  * Configuration for our key scanning algorithm.
3250  *
3251  * Note that this is used as a sub-structure of
3252  * ec_{params/response}_mkbp_get_config.
3253  */
3254 struct ec_mkbp_config {
3255 	uint32_t valid_mask;		/* valid fields */
3256 	uint8_t flags;		/* some flags (enum mkbp_config_flags) */
3257 	uint8_t valid_flags;		/* which flags are valid */
3258 	uint16_t scan_period_us;	/* period between start of scans */
3259 	/* revert to interrupt mode after no activity for this long */
3260 	uint32_t poll_timeout_us;
3261 	/*
3262 	 * minimum post-scan relax time. Once we finish a scan we check
3263 	 * the time until we are due to start the next one. If this time is
3264 	 * shorter this field, we use this instead.
3265 	 */
3266 	uint16_t min_post_scan_delay_us;
3267 	/* delay between setting up output and waiting for it to settle */
3268 	uint16_t output_settle_us;
3269 	uint16_t debounce_down_us;	/* time for debounce on key down */
3270 	uint16_t debounce_up_us;	/* time for debounce on key up */
3271 	/* maximum depth to allow for fifo (0 = no keyscan output) */
3272 	uint8_t fifo_max_depth;
3273 } __ec_align_size1;
3274 
3275 struct ec_params_mkbp_set_config {
3276 	struct ec_mkbp_config config;
3277 } __ec_align_size1;
3278 
3279 struct ec_response_mkbp_get_config {
3280 	struct ec_mkbp_config config;
3281 } __ec_align_size1;
3282 
3283 /* Run the key scan emulation */
3284 #define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066
3285 
3286 enum ec_keyscan_seq_cmd {
3287 	EC_KEYSCAN_SEQ_STATUS = 0,	/* Get status information */
3288 	EC_KEYSCAN_SEQ_CLEAR = 1,	/* Clear sequence */
3289 	EC_KEYSCAN_SEQ_ADD = 2,		/* Add item to sequence */
3290 	EC_KEYSCAN_SEQ_START = 3,	/* Start running sequence */
3291 	EC_KEYSCAN_SEQ_COLLECT = 4,	/* Collect sequence summary data */
3292 };
3293 
3294 enum ec_collect_flags {
3295 	/*
3296 	 * Indicates this scan was processed by the EC. Due to timing, some
3297 	 * scans may be skipped.
3298 	 */
3299 	EC_KEYSCAN_SEQ_FLAG_DONE	= BIT(0),
3300 };
3301 
3302 struct ec_collect_item {
3303 	uint8_t flags;		/* some flags (enum ec_collect_flags) */
3304 } __ec_align1;
3305 
3306 struct ec_params_keyscan_seq_ctrl {
3307 	uint8_t cmd;	/* Command to send (enum ec_keyscan_seq_cmd) */
3308 	union {
3309 		struct __ec_align1 {
3310 			uint8_t active;		/* still active */
3311 			uint8_t num_items;	/* number of items */
3312 			/* Current item being presented */
3313 			uint8_t cur_item;
3314 		} status;
3315 		struct __ec_todo_unpacked {
3316 			/*
3317 			 * Absolute time for this scan, measured from the
3318 			 * start of the sequence.
3319 			 */
3320 			uint32_t time_us;
3321 			uint8_t scan[0];	/* keyscan data */
3322 		} add;
3323 		struct __ec_align1 {
3324 			uint8_t start_item;	/* First item to return */
3325 			uint8_t num_items;	/* Number of items to return */
3326 		} collect;
3327 	};
3328 } __ec_todo_packed;
3329 
3330 struct ec_result_keyscan_seq_ctrl {
3331 	union {
3332 		struct __ec_todo_unpacked {
3333 			uint8_t num_items;	/* Number of items */
3334 			/* Data for each item */
3335 			struct ec_collect_item item[0];
3336 		} collect;
3337 	};
3338 } __ec_todo_packed;
3339 
3340 /*
3341  * Get the next pending MKBP event.
3342  *
3343  * Returns EC_RES_UNAVAILABLE if there is no event pending.
3344  */
3345 #define EC_CMD_GET_NEXT_EVENT 0x0067
3346 
3347 #define EC_MKBP_HAS_MORE_EVENTS_SHIFT 7
3348 
3349 /*
3350  * We use the most significant bit of the event type to indicate to the host
3351  * that the EC has more MKBP events available to provide.
3352  */
3353 #define EC_MKBP_HAS_MORE_EVENTS BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT)
3354 
3355 /* The mask to apply to get the raw event type */
3356 #define EC_MKBP_EVENT_TYPE_MASK (BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) - 1)
3357 
3358 enum ec_mkbp_event {
3359 	/* Keyboard matrix changed. The event data is the new matrix state. */
3360 	EC_MKBP_EVENT_KEY_MATRIX = 0,
3361 
3362 	/* New host event. The event data is 4 bytes of host event flags. */
3363 	EC_MKBP_EVENT_HOST_EVENT = 1,
3364 
3365 	/* New Sensor FIFO data. The event data is fifo_info structure. */
3366 	EC_MKBP_EVENT_SENSOR_FIFO = 2,
3367 
3368 	/* The state of the non-matrixed buttons have changed. */
3369 	EC_MKBP_EVENT_BUTTON = 3,
3370 
3371 	/* The state of the switches have changed. */
3372 	EC_MKBP_EVENT_SWITCH = 4,
3373 
3374 	/* New Fingerprint sensor event, the event data is fp_events bitmap. */
3375 	EC_MKBP_EVENT_FINGERPRINT = 5,
3376 
3377 	/*
3378 	 * Sysrq event: send emulated sysrq. The event data is sysrq,
3379 	 * corresponding to the key to be pressed.
3380 	 */
3381 	EC_MKBP_EVENT_SYSRQ = 6,
3382 
3383 	/*
3384 	 * New 64-bit host event.
3385 	 * The event data is 8 bytes of host event flags.
3386 	 */
3387 	EC_MKBP_EVENT_HOST_EVENT64 = 7,
3388 
3389 	/* Notify the AP that something happened on CEC */
3390 	EC_MKBP_EVENT_CEC_EVENT = 8,
3391 
3392 	/* Send an incoming CEC message to the AP */
3393 	EC_MKBP_EVENT_CEC_MESSAGE = 9,
3394 
3395 	/* Peripheral device charger event */
3396 	EC_MKBP_EVENT_PCHG = 12,
3397 
3398 	/* Number of MKBP events */
3399 	EC_MKBP_EVENT_COUNT,
3400 };
3401 BUILD_ASSERT(EC_MKBP_EVENT_COUNT <= EC_MKBP_EVENT_TYPE_MASK);
3402 
3403 union __ec_align_offset1 ec_response_get_next_data {
3404 	uint8_t key_matrix[13];
3405 
3406 	/* Unaligned */
3407 	uint32_t host_event;
3408 	uint64_t host_event64;
3409 
3410 	struct __ec_todo_unpacked {
3411 		/* For aligning the fifo_info */
3412 		uint8_t reserved[3];
3413 		struct ec_response_motion_sense_fifo_info info;
3414 	} sensor_fifo;
3415 
3416 	uint32_t buttons;
3417 
3418 	uint32_t switches;
3419 
3420 	uint32_t fp_events;
3421 
3422 	uint32_t sysrq;
3423 
3424 	/* CEC events from enum mkbp_cec_event */
3425 	uint32_t cec_events;
3426 };
3427 
3428 union __ec_align_offset1 ec_response_get_next_data_v1 {
3429 	uint8_t key_matrix[16];
3430 
3431 	/* Unaligned */
3432 	uint32_t host_event;
3433 	uint64_t host_event64;
3434 
3435 	struct __ec_todo_unpacked {
3436 		/* For aligning the fifo_info */
3437 		uint8_t reserved[3];
3438 		struct ec_response_motion_sense_fifo_info info;
3439 	} sensor_fifo;
3440 
3441 	uint32_t buttons;
3442 
3443 	uint32_t switches;
3444 
3445 	uint32_t fp_events;
3446 
3447 	uint32_t sysrq;
3448 
3449 	/* CEC events from enum mkbp_cec_event */
3450 	uint32_t cec_events;
3451 
3452 	uint8_t cec_message[16];
3453 };
3454 BUILD_ASSERT(sizeof(union ec_response_get_next_data_v1) == 16);
3455 
3456 struct ec_response_get_next_event {
3457 	uint8_t event_type;
3458 	/* Followed by event data if any */
3459 	union ec_response_get_next_data data;
3460 } __ec_align1;
3461 
3462 struct ec_response_get_next_event_v1 {
3463 	uint8_t event_type;
3464 	/* Followed by event data if any */
3465 	union ec_response_get_next_data_v1 data;
3466 } __ec_align1;
3467 
3468 /* Bit indices for buttons and switches.*/
3469 /* Buttons */
3470 #define EC_MKBP_POWER_BUTTON	0
3471 #define EC_MKBP_VOL_UP		1
3472 #define EC_MKBP_VOL_DOWN	2
3473 #define EC_MKBP_RECOVERY	3
3474 
3475 /* Switches */
3476 #define EC_MKBP_LID_OPEN	0
3477 #define EC_MKBP_TABLET_MODE	1
3478 #define EC_MKBP_BASE_ATTACHED	2
3479 #define EC_MKBP_FRONT_PROXIMITY	3
3480 
3481 /* Run keyboard factory test scanning */
3482 #define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068
3483 
3484 struct ec_response_keyboard_factory_test {
3485 	uint16_t shorted;	/* Keyboard pins are shorted */
3486 } __ec_align2;
3487 
3488 /* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */
3489 #define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF)
3490 #define EC_MKBP_FP_ERRCODE(fp_events)   ((fp_events) & 0x0000000F)
3491 #define EC_MKBP_FP_ENROLL_PROGRESS_OFFSET 4
3492 #define EC_MKBP_FP_ENROLL_PROGRESS(fpe) (((fpe) & 0x00000FF0) \
3493 					 >> EC_MKBP_FP_ENROLL_PROGRESS_OFFSET)
3494 #define EC_MKBP_FP_MATCH_IDX_OFFSET 12
3495 #define EC_MKBP_FP_MATCH_IDX_MASK 0x0000F000
3496 #define EC_MKBP_FP_MATCH_IDX(fpe) (((fpe) & EC_MKBP_FP_MATCH_IDX_MASK) \
3497 					 >> EC_MKBP_FP_MATCH_IDX_OFFSET)
3498 #define EC_MKBP_FP_ENROLL               BIT(27)
3499 #define EC_MKBP_FP_MATCH                BIT(28)
3500 #define EC_MKBP_FP_FINGER_DOWN          BIT(29)
3501 #define EC_MKBP_FP_FINGER_UP            BIT(30)
3502 #define EC_MKBP_FP_IMAGE_READY          BIT(31)
3503 /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_ENROLL is set */
3504 #define EC_MKBP_FP_ERR_ENROLL_OK               0
3505 #define EC_MKBP_FP_ERR_ENROLL_LOW_QUALITY      1
3506 #define EC_MKBP_FP_ERR_ENROLL_IMMOBILE         2
3507 #define EC_MKBP_FP_ERR_ENROLL_LOW_COVERAGE     3
3508 #define EC_MKBP_FP_ERR_ENROLL_INTERNAL         5
3509 /* Can be used to detect if image was usable for enrollment or not. */
3510 #define EC_MKBP_FP_ERR_ENROLL_PROBLEM_MASK     1
3511 /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_MATCH is set */
3512 #define EC_MKBP_FP_ERR_MATCH_NO                0
3513 #define EC_MKBP_FP_ERR_MATCH_NO_INTERNAL       6
3514 #define EC_MKBP_FP_ERR_MATCH_NO_TEMPLATES      7
3515 #define EC_MKBP_FP_ERR_MATCH_NO_LOW_QUALITY    2
3516 #define EC_MKBP_FP_ERR_MATCH_NO_LOW_COVERAGE   4
3517 #define EC_MKBP_FP_ERR_MATCH_YES               1
3518 #define EC_MKBP_FP_ERR_MATCH_YES_UPDATED       3
3519 #define EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED 5
3520 
3521 
3522 /*****************************************************************************/
3523 /* Temperature sensor commands */
3524 
3525 /* Read temperature sensor info */
3526 #define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070
3527 
3528 struct ec_params_temp_sensor_get_info {
3529 	uint8_t id;
3530 } __ec_align1;
3531 
3532 struct ec_response_temp_sensor_get_info {
3533 	char sensor_name[32];
3534 	uint8_t sensor_type;
3535 } __ec_align1;
3536 
3537 /*****************************************************************************/
3538 
3539 /*
3540  * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI
3541  * commands accidentally sent to the wrong interface.  See the ACPI section
3542  * below.
3543  */
3544 
3545 /*****************************************************************************/
3546 /* Host event commands */
3547 
3548 
3549 /* Obsolete. New implementation should use EC_CMD_HOST_EVENT instead */
3550 /*
3551  * Host event mask params and response structures, shared by all of the host
3552  * event commands below.
3553  */
3554 struct ec_params_host_event_mask {
3555 	uint32_t mask;
3556 } __ec_align4;
3557 
3558 struct ec_response_host_event_mask {
3559 	uint32_t mask;
3560 } __ec_align4;
3561 
3562 /* These all use ec_response_host_event_mask */
3563 #define EC_CMD_HOST_EVENT_GET_B         0x0087
3564 #define EC_CMD_HOST_EVENT_GET_SMI_MASK  0x0088
3565 #define EC_CMD_HOST_EVENT_GET_SCI_MASK  0x0089
3566 #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D
3567 
3568 /* These all use ec_params_host_event_mask */
3569 #define EC_CMD_HOST_EVENT_SET_SMI_MASK  0x008A
3570 #define EC_CMD_HOST_EVENT_SET_SCI_MASK  0x008B
3571 #define EC_CMD_HOST_EVENT_CLEAR         0x008C
3572 #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E
3573 #define EC_CMD_HOST_EVENT_CLEAR_B       0x008F
3574 
3575 /*
3576  * Unified host event programming interface - Should be used by newer versions
3577  * of BIOS/OS to program host events and masks
3578  */
3579 
3580 struct ec_params_host_event {
3581 
3582 	/* Action requested by host - one of enum ec_host_event_action. */
3583 	uint8_t action;
3584 
3585 	/*
3586 	 * Mask type that the host requested the action on - one of
3587 	 * enum ec_host_event_mask_type.
3588 	 */
3589 	uint8_t mask_type;
3590 
3591 	/* Set to 0, ignore on read */
3592 	uint16_t reserved;
3593 
3594 	/* Value to be used in case of set operations. */
3595 	uint64_t value;
3596 } __ec_align4;
3597 
3598 /*
3599  * Response structure returned by EC_CMD_HOST_EVENT.
3600  * Update the value on a GET request. Set to 0 on GET/CLEAR
3601  */
3602 
3603 struct ec_response_host_event {
3604 
3605 	/* Mask value in case of get operation */
3606 	uint64_t value;
3607 } __ec_align4;
3608 
3609 enum ec_host_event_action {
3610 	/*
3611 	 * params.value is ignored. Value of mask_type populated
3612 	 * in response.value
3613 	 */
3614 	EC_HOST_EVENT_GET,
3615 
3616 	/* Bits in params.value are set */
3617 	EC_HOST_EVENT_SET,
3618 
3619 	/* Bits in params.value are cleared */
3620 	EC_HOST_EVENT_CLEAR,
3621 };
3622 
3623 enum ec_host_event_mask_type {
3624 
3625 	/* Main host event copy */
3626 	EC_HOST_EVENT_MAIN,
3627 
3628 	/* Copy B of host events */
3629 	EC_HOST_EVENT_B,
3630 
3631 	/* SCI Mask */
3632 	EC_HOST_EVENT_SCI_MASK,
3633 
3634 	/* SMI Mask */
3635 	EC_HOST_EVENT_SMI_MASK,
3636 
3637 	/* Mask of events that should be always reported in hostevents */
3638 	EC_HOST_EVENT_ALWAYS_REPORT_MASK,
3639 
3640 	/* Active wake mask */
3641 	EC_HOST_EVENT_ACTIVE_WAKE_MASK,
3642 
3643 	/* Lazy wake mask for S0ix */
3644 	EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX,
3645 
3646 	/* Lazy wake mask for S3 */
3647 	EC_HOST_EVENT_LAZY_WAKE_MASK_S3,
3648 
3649 	/* Lazy wake mask for S5 */
3650 	EC_HOST_EVENT_LAZY_WAKE_MASK_S5,
3651 };
3652 
3653 #define EC_CMD_HOST_EVENT       0x00A4
3654 
3655 /*****************************************************************************/
3656 /* Switch commands */
3657 
3658 /* Enable/disable LCD backlight */
3659 #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090
3660 
3661 struct ec_params_switch_enable_backlight {
3662 	uint8_t enabled;
3663 } __ec_align1;
3664 
3665 /* Enable/disable WLAN/Bluetooth */
3666 #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091
3667 #define EC_VER_SWITCH_ENABLE_WIRELESS 1
3668 
3669 /* Version 0 params; no response */
3670 struct ec_params_switch_enable_wireless_v0 {
3671 	uint8_t enabled;
3672 } __ec_align1;
3673 
3674 /* Version 1 params */
3675 struct ec_params_switch_enable_wireless_v1 {
3676 	/* Flags to enable now */
3677 	uint8_t now_flags;
3678 
3679 	/* Which flags to copy from now_flags */
3680 	uint8_t now_mask;
3681 
3682 	/*
3683 	 * Flags to leave enabled in S3, if they're on at the S0->S3
3684 	 * transition.  (Other flags will be disabled by the S0->S3
3685 	 * transition.)
3686 	 */
3687 	uint8_t suspend_flags;
3688 
3689 	/* Which flags to copy from suspend_flags */
3690 	uint8_t suspend_mask;
3691 } __ec_align1;
3692 
3693 /* Version 1 response */
3694 struct ec_response_switch_enable_wireless_v1 {
3695 	/* Flags to enable now */
3696 	uint8_t now_flags;
3697 
3698 	/* Flags to leave enabled in S3 */
3699 	uint8_t suspend_flags;
3700 } __ec_align1;
3701 
3702 /*****************************************************************************/
3703 /* GPIO commands. Only available on EC if write protect has been disabled. */
3704 
3705 /* Set GPIO output value */
3706 #define EC_CMD_GPIO_SET 0x0092
3707 
3708 struct ec_params_gpio_set {
3709 	char name[32];
3710 	uint8_t val;
3711 } __ec_align1;
3712 
3713 /* Get GPIO value */
3714 #define EC_CMD_GPIO_GET 0x0093
3715 
3716 /* Version 0 of input params and response */
3717 struct ec_params_gpio_get {
3718 	char name[32];
3719 } __ec_align1;
3720 
3721 struct ec_response_gpio_get {
3722 	uint8_t val;
3723 } __ec_align1;
3724 
3725 /* Version 1 of input params and response */
3726 struct ec_params_gpio_get_v1 {
3727 	uint8_t subcmd;
3728 	union {
3729 		struct __ec_align1 {
3730 			char name[32];
3731 		} get_value_by_name;
3732 		struct __ec_align1 {
3733 			uint8_t index;
3734 		} get_info;
3735 	};
3736 } __ec_align1;
3737 
3738 struct ec_response_gpio_get_v1 {
3739 	union {
3740 		struct __ec_align1 {
3741 			uint8_t val;
3742 		} get_value_by_name, get_count;
3743 		struct __ec_todo_unpacked {
3744 			uint8_t val;
3745 			char name[32];
3746 			uint32_t flags;
3747 		} get_info;
3748 	};
3749 } __ec_todo_packed;
3750 
3751 enum gpio_get_subcmd {
3752 	EC_GPIO_GET_BY_NAME = 0,
3753 	EC_GPIO_GET_COUNT = 1,
3754 	EC_GPIO_GET_INFO = 2,
3755 };
3756 
3757 /*****************************************************************************/
3758 /* I2C commands. Only available when flash write protect is unlocked. */
3759 
3760 /*
3761  * CAUTION: These commands are deprecated, and are not supported anymore in EC
3762  * builds >= 8398.0.0 (see crosbug.com/p/23570).
3763  *
3764  * Use EC_CMD_I2C_PASSTHRU instead.
3765  */
3766 
3767 /* Read I2C bus */
3768 #define EC_CMD_I2C_READ 0x0094
3769 
3770 struct ec_params_i2c_read {
3771 	uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
3772 	uint8_t read_size; /* Either 8 or 16. */
3773 	uint8_t port;
3774 	uint8_t offset;
3775 } __ec_align_size1;
3776 
3777 struct ec_response_i2c_read {
3778 	uint16_t data;
3779 } __ec_align2;
3780 
3781 /* Write I2C bus */
3782 #define EC_CMD_I2C_WRITE 0x0095
3783 
3784 struct ec_params_i2c_write {
3785 	uint16_t data;
3786 	uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
3787 	uint8_t write_size; /* Either 8 or 16. */
3788 	uint8_t port;
3789 	uint8_t offset;
3790 } __ec_align_size1;
3791 
3792 /*****************************************************************************/
3793 /* Charge state commands. Only available when flash write protect unlocked. */
3794 
3795 /* Force charge state machine to stop charging the battery or force it to
3796  * discharge the battery.
3797  */
3798 #define EC_CMD_CHARGE_CONTROL 0x0096
3799 #define EC_VER_CHARGE_CONTROL 1
3800 
3801 enum ec_charge_control_mode {
3802 	CHARGE_CONTROL_NORMAL = 0,
3803 	CHARGE_CONTROL_IDLE,
3804 	CHARGE_CONTROL_DISCHARGE,
3805 };
3806 
3807 struct ec_params_charge_control {
3808 	uint32_t mode;  /* enum charge_control_mode */
3809 } __ec_align4;
3810 
3811 /*****************************************************************************/
3812 
3813 /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */
3814 #define EC_CMD_CONSOLE_SNAPSHOT 0x0097
3815 
3816 /*
3817  * Read data from the saved snapshot. If the subcmd parameter is
3818  * CONSOLE_READ_NEXT, this will return data starting from the beginning of
3819  * the latest snapshot. If it is CONSOLE_READ_RECENT, it will start from the
3820  * end of the previous snapshot.
3821  *
3822  * The params are only looked at in version >= 1 of this command. Prior
3823  * versions will just default to CONSOLE_READ_NEXT behavior.
3824  *
3825  * Response is null-terminated string.  Empty string, if there is no more
3826  * remaining output.
3827  */
3828 #define EC_CMD_CONSOLE_READ 0x0098
3829 
3830 enum ec_console_read_subcmd {
3831 	CONSOLE_READ_NEXT = 0,
3832 	CONSOLE_READ_RECENT
3833 };
3834 
3835 struct ec_params_console_read_v1 {
3836 	uint8_t subcmd; /* enum ec_console_read_subcmd */
3837 } __ec_align1;
3838 
3839 /*****************************************************************************/
3840 
3841 /*
3842  * Cut off battery power immediately or after the host has shut down.
3843  *
3844  * return EC_RES_INVALID_COMMAND if unsupported by a board/battery.
3845  *	  EC_RES_SUCCESS if the command was successful.
3846  *	  EC_RES_ERROR if the cut off command failed.
3847  */
3848 #define EC_CMD_BATTERY_CUT_OFF 0x0099
3849 
3850 #define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN	BIT(0)
3851 
3852 struct ec_params_battery_cutoff {
3853 	uint8_t flags;
3854 } __ec_align1;
3855 
3856 /*****************************************************************************/
3857 /* USB port mux control. */
3858 
3859 /*
3860  * Switch USB mux or return to automatic switching.
3861  */
3862 #define EC_CMD_USB_MUX 0x009A
3863 
3864 struct ec_params_usb_mux {
3865 	uint8_t mux;
3866 } __ec_align1;
3867 
3868 /*****************************************************************************/
3869 /* LDOs / FETs control. */
3870 
3871 enum ec_ldo_state {
3872 	EC_LDO_STATE_OFF = 0,	/* the LDO / FET is shut down */
3873 	EC_LDO_STATE_ON = 1,	/* the LDO / FET is ON / providing power */
3874 };
3875 
3876 /*
3877  * Switch on/off a LDO.
3878  */
3879 #define EC_CMD_LDO_SET 0x009B
3880 
3881 struct ec_params_ldo_set {
3882 	uint8_t index;
3883 	uint8_t state;
3884 } __ec_align1;
3885 
3886 /*
3887  * Get LDO state.
3888  */
3889 #define EC_CMD_LDO_GET 0x009C
3890 
3891 struct ec_params_ldo_get {
3892 	uint8_t index;
3893 } __ec_align1;
3894 
3895 struct ec_response_ldo_get {
3896 	uint8_t state;
3897 } __ec_align1;
3898 
3899 /*****************************************************************************/
3900 /* Power info. */
3901 
3902 /*
3903  * Get power info.
3904  */
3905 #define EC_CMD_POWER_INFO 0x009D
3906 
3907 struct ec_response_power_info {
3908 	uint32_t usb_dev_type;
3909 	uint16_t voltage_ac;
3910 	uint16_t voltage_system;
3911 	uint16_t current_system;
3912 	uint16_t usb_current_limit;
3913 } __ec_align4;
3914 
3915 /*****************************************************************************/
3916 /* I2C passthru command */
3917 
3918 #define EC_CMD_I2C_PASSTHRU 0x009E
3919 
3920 /* Read data; if not present, message is a write */
3921 #define EC_I2C_FLAG_READ	BIT(15)
3922 
3923 /* Mask for address */
3924 #define EC_I2C_ADDR_MASK	0x3ff
3925 
3926 #define EC_I2C_STATUS_NAK	BIT(0) /* Transfer was not acknowledged */
3927 #define EC_I2C_STATUS_TIMEOUT	BIT(1) /* Timeout during transfer */
3928 
3929 /* Any error */
3930 #define EC_I2C_STATUS_ERROR	(EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT)
3931 
3932 struct ec_params_i2c_passthru_msg {
3933 	uint16_t addr_flags;	/* I2C slave address (7 or 10 bits) and flags */
3934 	uint16_t len;		/* Number of bytes to read or write */
3935 } __ec_align2;
3936 
3937 struct ec_params_i2c_passthru {
3938 	uint8_t port;		/* I2C port number */
3939 	uint8_t num_msgs;	/* Number of messages */
3940 	struct ec_params_i2c_passthru_msg msg[];
3941 	/* Data to write for all messages is concatenated here */
3942 } __ec_align2;
3943 
3944 struct ec_response_i2c_passthru {
3945 	uint8_t i2c_status;	/* Status flags (EC_I2C_STATUS_...) */
3946 	uint8_t num_msgs;	/* Number of messages processed */
3947 	uint8_t data[];		/* Data read by messages concatenated here */
3948 } __ec_align1;
3949 
3950 /*****************************************************************************/
3951 /* Power button hang detect */
3952 
3953 #define EC_CMD_HANG_DETECT 0x009F
3954 
3955 /* Reasons to start hang detection timer */
3956 /* Power button pressed */
3957 #define EC_HANG_START_ON_POWER_PRESS  BIT(0)
3958 
3959 /* Lid closed */
3960 #define EC_HANG_START_ON_LID_CLOSE    BIT(1)
3961 
3962  /* Lid opened */
3963 #define EC_HANG_START_ON_LID_OPEN     BIT(2)
3964 
3965 /* Start of AP S3->S0 transition (booting or resuming from suspend) */
3966 #define EC_HANG_START_ON_RESUME       BIT(3)
3967 
3968 /* Reasons to cancel hang detection */
3969 
3970 /* Power button released */
3971 #define EC_HANG_STOP_ON_POWER_RELEASE BIT(8)
3972 
3973 /* Any host command from AP received */
3974 #define EC_HANG_STOP_ON_HOST_COMMAND  BIT(9)
3975 
3976 /* Stop on end of AP S0->S3 transition (suspending or shutting down) */
3977 #define EC_HANG_STOP_ON_SUSPEND       BIT(10)
3978 
3979 /*
3980  * If this flag is set, all the other fields are ignored, and the hang detect
3981  * timer is started.  This provides the AP a way to start the hang timer
3982  * without reconfiguring any of the other hang detect settings.  Note that
3983  * you must previously have configured the timeouts.
3984  */
3985 #define EC_HANG_START_NOW             BIT(30)
3986 
3987 /*
3988  * If this flag is set, all the other fields are ignored (including
3989  * EC_HANG_START_NOW).  This provides the AP a way to stop the hang timer
3990  * without reconfiguring any of the other hang detect settings.
3991  */
3992 #define EC_HANG_STOP_NOW              BIT(31)
3993 
3994 struct ec_params_hang_detect {
3995 	/* Flags; see EC_HANG_* */
3996 	uint32_t flags;
3997 
3998 	/* Timeout in msec before generating host event, if enabled */
3999 	uint16_t host_event_timeout_msec;
4000 
4001 	/* Timeout in msec before generating warm reboot, if enabled */
4002 	uint16_t warm_reboot_timeout_msec;
4003 } __ec_align4;
4004 
4005 /*****************************************************************************/
4006 /* Commands for battery charging */
4007 
4008 /*
4009  * This is the single catch-all host command to exchange data regarding the
4010  * charge state machine (v2 and up).
4011  */
4012 #define EC_CMD_CHARGE_STATE 0x00A0
4013 
4014 /* Subcommands for this host command */
4015 enum charge_state_command {
4016 	CHARGE_STATE_CMD_GET_STATE,
4017 	CHARGE_STATE_CMD_GET_PARAM,
4018 	CHARGE_STATE_CMD_SET_PARAM,
4019 	CHARGE_STATE_NUM_CMDS
4020 };
4021 
4022 /*
4023  * Known param numbers are defined here. Ranges are reserved for board-specific
4024  * params, which are handled by the particular implementations.
4025  */
4026 enum charge_state_params {
4027 	CS_PARAM_CHG_VOLTAGE,	      /* charger voltage limit */
4028 	CS_PARAM_CHG_CURRENT,	      /* charger current limit */
4029 	CS_PARAM_CHG_INPUT_CURRENT,   /* charger input current limit */
4030 	CS_PARAM_CHG_STATUS,	      /* charger-specific status */
4031 	CS_PARAM_CHG_OPTION,	      /* charger-specific options */
4032 	CS_PARAM_LIMIT_POWER,	      /*
4033 				       * Check if power is limited due to
4034 				       * low battery and / or a weak external
4035 				       * charger. READ ONLY.
4036 				       */
4037 	/* How many so far? */
4038 	CS_NUM_BASE_PARAMS,
4039 
4040 	/* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */
4041 	CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000,
4042 	CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff,
4043 
4044 	/* Range for CONFIG_CHARGE_STATE_DEBUG params */
4045 	CS_PARAM_DEBUG_MIN = 0x20000,
4046 	CS_PARAM_DEBUG_CTL_MODE = 0x20000,
4047 	CS_PARAM_DEBUG_MANUAL_MODE,
4048 	CS_PARAM_DEBUG_SEEMS_DEAD,
4049 	CS_PARAM_DEBUG_SEEMS_DISCONNECTED,
4050 	CS_PARAM_DEBUG_BATT_REMOVED,
4051 	CS_PARAM_DEBUG_MANUAL_CURRENT,
4052 	CS_PARAM_DEBUG_MANUAL_VOLTAGE,
4053 	CS_PARAM_DEBUG_MAX = 0x2ffff,
4054 
4055 	/* Other custom param ranges go here... */
4056 };
4057 
4058 struct ec_params_charge_state {
4059 	uint8_t cmd;				/* enum charge_state_command */
4060 	union {
4061 		/* get_state has no args */
4062 
4063 		struct __ec_todo_unpacked {
4064 			uint32_t param;		/* enum charge_state_param */
4065 		} get_param;
4066 
4067 		struct __ec_todo_unpacked {
4068 			uint32_t param;		/* param to set */
4069 			uint32_t value;		/* value to set */
4070 		} set_param;
4071 	};
4072 } __ec_todo_packed;
4073 
4074 struct ec_response_charge_state {
4075 	union {
4076 		struct __ec_align4 {
4077 			int ac;
4078 			int chg_voltage;
4079 			int chg_current;
4080 			int chg_input_current;
4081 			int batt_state_of_charge;
4082 		} get_state;
4083 
4084 		struct __ec_align4 {
4085 			uint32_t value;
4086 		} get_param;
4087 
4088 		/* set_param returns no args */
4089 	};
4090 } __ec_align4;
4091 
4092 
4093 /*
4094  * Set maximum battery charging current.
4095  */
4096 #define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1
4097 
4098 struct ec_params_current_limit {
4099 	uint32_t limit; /* in mA */
4100 } __ec_align4;
4101 
4102 /*
4103  * Set maximum external voltage / current.
4104  */
4105 #define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2
4106 
4107 /* Command v0 is used only on Spring and is obsolete + unsupported */
4108 struct ec_params_external_power_limit_v1 {
4109 	uint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */
4110 	uint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */
4111 } __ec_align2;
4112 
4113 #define EC_POWER_LIMIT_NONE 0xffff
4114 
4115 /*
4116  * Set maximum voltage & current of a dedicated charge port
4117  */
4118 #define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3
4119 
4120 struct ec_params_dedicated_charger_limit {
4121 	uint16_t current_lim; /* in mA */
4122 	uint16_t voltage_lim; /* in mV */
4123 } __ec_align2;
4124 
4125 /*****************************************************************************/
4126 /* Hibernate/Deep Sleep Commands */
4127 
4128 /* Set the delay before going into hibernation. */
4129 #define EC_CMD_HIBERNATION_DELAY 0x00A8
4130 
4131 struct ec_params_hibernation_delay {
4132 	/*
4133 	 * Seconds to wait in G3 before hibernate.  Pass in 0 to read the
4134 	 * current settings without changing them.
4135 	 */
4136 	uint32_t seconds;
4137 } __ec_align4;
4138 
4139 struct ec_response_hibernation_delay {
4140 	/*
4141 	 * The current time in seconds in which the system has been in the G3
4142 	 * state.  This value is reset if the EC transitions out of G3.
4143 	 */
4144 	uint32_t time_g3;
4145 
4146 	/*
4147 	 * The current time remaining in seconds until the EC should hibernate.
4148 	 * This value is also reset if the EC transitions out of G3.
4149 	 */
4150 	uint32_t time_remaining;
4151 
4152 	/*
4153 	 * The current time in seconds that the EC should wait in G3 before
4154 	 * hibernating.
4155 	 */
4156 	uint32_t hibernate_delay;
4157 } __ec_align4;
4158 
4159 /* Inform the EC when entering a sleep state */
4160 #define EC_CMD_HOST_SLEEP_EVENT 0x00A9
4161 
4162 enum host_sleep_event {
4163 	HOST_SLEEP_EVENT_S3_SUSPEND   = 1,
4164 	HOST_SLEEP_EVENT_S3_RESUME    = 2,
4165 	HOST_SLEEP_EVENT_S0IX_SUSPEND = 3,
4166 	HOST_SLEEP_EVENT_S0IX_RESUME  = 4,
4167 	/* S3 suspend with additional enabled wake sources */
4168 	HOST_SLEEP_EVENT_S3_WAKEABLE_SUSPEND = 5,
4169 };
4170 
4171 struct ec_params_host_sleep_event {
4172 	uint8_t sleep_event;
4173 } __ec_align1;
4174 
4175 /*
4176  * Use a default timeout value (CONFIG_SLEEP_TIMEOUT_MS) for detecting sleep
4177  * transition failures
4178  */
4179 #define EC_HOST_SLEEP_TIMEOUT_DEFAULT 0
4180 
4181 /* Disable timeout detection for this sleep transition */
4182 #define EC_HOST_SLEEP_TIMEOUT_INFINITE 0xFFFF
4183 
4184 struct ec_params_host_sleep_event_v1 {
4185 	/* The type of sleep being entered or exited. */
4186 	uint8_t sleep_event;
4187 
4188 	/* Padding */
4189 	uint8_t reserved;
4190 	union {
4191 		/* Parameters that apply for suspend messages. */
4192 		struct {
4193 			/*
4194 			 * The timeout in milliseconds between when this message
4195 			 * is received and when the EC will declare sleep
4196 			 * transition failure if the sleep signal is not
4197 			 * asserted.
4198 			 */
4199 			uint16_t sleep_timeout_ms;
4200 		} suspend_params;
4201 
4202 		/* No parameters for non-suspend messages. */
4203 	};
4204 } __ec_align2;
4205 
4206 /* A timeout occurred when this bit is set */
4207 #define EC_HOST_RESUME_SLEEP_TIMEOUT 0x80000000
4208 
4209 /*
4210  * The mask defining which bits correspond to the number of sleep transitions,
4211  * as well as the maximum number of suspend line transitions that will be
4212  * reported back to the host.
4213  */
4214 #define EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK 0x7FFFFFFF
4215 
4216 struct ec_response_host_sleep_event_v1 {
4217 	union {
4218 		/* Response fields that apply for resume messages. */
4219 		struct {
4220 			/*
4221 			 * The number of sleep power signal transitions that
4222 			 * occurred since the suspend message. The high bit
4223 			 * indicates a timeout occurred.
4224 			 */
4225 			uint32_t sleep_transitions;
4226 		} resume_response;
4227 
4228 		/* No response fields for non-resume messages. */
4229 	};
4230 } __ec_align4;
4231 
4232 /*****************************************************************************/
4233 /* Device events */
4234 #define EC_CMD_DEVICE_EVENT 0x00AA
4235 
4236 enum ec_device_event {
4237 	EC_DEVICE_EVENT_TRACKPAD,
4238 	EC_DEVICE_EVENT_DSP,
4239 	EC_DEVICE_EVENT_WIFI,
4240 	EC_DEVICE_EVENT_WLC,
4241 };
4242 
4243 enum ec_device_event_param {
4244 	/* Get and clear pending device events */
4245 	EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS,
4246 	/* Get device event mask */
4247 	EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS,
4248 	/* Set device event mask */
4249 	EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS,
4250 };
4251 
4252 #define EC_DEVICE_EVENT_MASK(event_code) BIT(event_code % 32)
4253 
4254 struct ec_params_device_event {
4255 	uint32_t event_mask;
4256 	uint8_t param;
4257 } __ec_align_size1;
4258 
4259 struct ec_response_device_event {
4260 	uint32_t event_mask;
4261 } __ec_align4;
4262 
4263 /*****************************************************************************/
4264 /* Smart battery pass-through */
4265 
4266 /* Get / Set 16-bit smart battery registers */
4267 #define EC_CMD_SB_READ_WORD   0x00B0
4268 #define EC_CMD_SB_WRITE_WORD  0x00B1
4269 
4270 /* Get / Set string smart battery parameters
4271  * formatted as SMBUS "block".
4272  */
4273 #define EC_CMD_SB_READ_BLOCK  0x00B2
4274 #define EC_CMD_SB_WRITE_BLOCK 0x00B3
4275 
4276 struct ec_params_sb_rd {
4277 	uint8_t reg;
4278 } __ec_align1;
4279 
4280 struct ec_response_sb_rd_word {
4281 	uint16_t value;
4282 } __ec_align2;
4283 
4284 struct ec_params_sb_wr_word {
4285 	uint8_t reg;
4286 	uint16_t value;
4287 } __ec_align1;
4288 
4289 struct ec_response_sb_rd_block {
4290 	uint8_t data[32];
4291 } __ec_align1;
4292 
4293 struct ec_params_sb_wr_block {
4294 	uint8_t reg;
4295 	uint16_t data[32];
4296 } __ec_align1;
4297 
4298 /*****************************************************************************/
4299 /* Battery vendor parameters
4300  *
4301  * Get or set vendor-specific parameters in the battery. Implementations may
4302  * differ between boards or batteries. On a set operation, the response
4303  * contains the actual value set, which may be rounded or clipped from the
4304  * requested value.
4305  */
4306 
4307 #define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4
4308 
4309 enum ec_battery_vendor_param_mode {
4310 	BATTERY_VENDOR_PARAM_MODE_GET = 0,
4311 	BATTERY_VENDOR_PARAM_MODE_SET,
4312 };
4313 
4314 struct ec_params_battery_vendor_param {
4315 	uint32_t param;
4316 	uint32_t value;
4317 	uint8_t mode;
4318 } __ec_align_size1;
4319 
4320 struct ec_response_battery_vendor_param {
4321 	uint32_t value;
4322 } __ec_align4;
4323 
4324 /*****************************************************************************/
4325 /*
4326  * Smart Battery Firmware Update Commands
4327  */
4328 #define EC_CMD_SB_FW_UPDATE 0x00B5
4329 
4330 enum ec_sb_fw_update_subcmd {
4331 	EC_SB_FW_UPDATE_PREPARE  = 0x0,
4332 	EC_SB_FW_UPDATE_INFO     = 0x1, /*query sb info */
4333 	EC_SB_FW_UPDATE_BEGIN    = 0x2, /*check if protected */
4334 	EC_SB_FW_UPDATE_WRITE    = 0x3, /*check if protected */
4335 	EC_SB_FW_UPDATE_END      = 0x4,
4336 	EC_SB_FW_UPDATE_STATUS   = 0x5,
4337 	EC_SB_FW_UPDATE_PROTECT  = 0x6,
4338 	EC_SB_FW_UPDATE_MAX      = 0x7,
4339 };
4340 
4341 #define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32
4342 #define SB_FW_UPDATE_CMD_STATUS_SIZE 2
4343 #define SB_FW_UPDATE_CMD_INFO_SIZE 8
4344 
4345 struct ec_sb_fw_update_header {
4346 	uint16_t subcmd;  /* enum ec_sb_fw_update_subcmd */
4347 	uint16_t fw_id;   /* firmware id */
4348 } __ec_align4;
4349 
4350 struct ec_params_sb_fw_update {
4351 	struct ec_sb_fw_update_header hdr;
4352 	union {
4353 		/* EC_SB_FW_UPDATE_PREPARE  = 0x0 */
4354 		/* EC_SB_FW_UPDATE_INFO     = 0x1 */
4355 		/* EC_SB_FW_UPDATE_BEGIN    = 0x2 */
4356 		/* EC_SB_FW_UPDATE_END      = 0x4 */
4357 		/* EC_SB_FW_UPDATE_STATUS   = 0x5 */
4358 		/* EC_SB_FW_UPDATE_PROTECT  = 0x6 */
4359 		/* Those have no args */
4360 
4361 		/* EC_SB_FW_UPDATE_WRITE    = 0x3 */
4362 		struct __ec_align4 {
4363 			uint8_t  data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE];
4364 		} write;
4365 	};
4366 } __ec_align4;
4367 
4368 struct ec_response_sb_fw_update {
4369 	union {
4370 		/* EC_SB_FW_UPDATE_INFO     = 0x1 */
4371 		struct __ec_align1 {
4372 			uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE];
4373 		} info;
4374 
4375 		/* EC_SB_FW_UPDATE_STATUS   = 0x5 */
4376 		struct __ec_align1 {
4377 			uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE];
4378 		} status;
4379 	};
4380 } __ec_align1;
4381 
4382 /*
4383  * Entering Verified Boot Mode Command
4384  * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command.
4385  * Valid Modes are: normal, developer, and recovery.
4386  */
4387 #define EC_CMD_ENTERING_MODE 0x00B6
4388 
4389 struct ec_params_entering_mode {
4390 	int vboot_mode;
4391 } __ec_align4;
4392 
4393 #define VBOOT_MODE_NORMAL    0
4394 #define VBOOT_MODE_DEVELOPER 1
4395 #define VBOOT_MODE_RECOVERY  2
4396 
4397 /*****************************************************************************/
4398 /*
4399  * I2C passthru protection command: Protects I2C tunnels against access on
4400  * certain addresses (board-specific).
4401  */
4402 #define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7
4403 
4404 enum ec_i2c_passthru_protect_subcmd {
4405 	EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0,
4406 	EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1,
4407 };
4408 
4409 struct ec_params_i2c_passthru_protect {
4410 	uint8_t subcmd;
4411 	uint8_t port;		/* I2C port number */
4412 } __ec_align1;
4413 
4414 struct ec_response_i2c_passthru_protect {
4415 	uint8_t status;		/* Status flags (0: unlocked, 1: locked) */
4416 } __ec_align1;
4417 
4418 
4419 /*****************************************************************************/
4420 /*
4421  * HDMI CEC commands
4422  *
4423  * These commands are for sending and receiving message via HDMI CEC
4424  */
4425 
4426 #define MAX_CEC_MSG_LEN 16
4427 
4428 /* CEC message from the AP to be written on the CEC bus */
4429 #define EC_CMD_CEC_WRITE_MSG 0x00B8
4430 
4431 /**
4432  * struct ec_params_cec_write - Message to write to the CEC bus
4433  * @msg: message content to write to the CEC bus
4434  */
4435 struct ec_params_cec_write {
4436 	uint8_t msg[MAX_CEC_MSG_LEN];
4437 } __ec_align1;
4438 
4439 /* Set various CEC parameters */
4440 #define EC_CMD_CEC_SET 0x00BA
4441 
4442 /**
4443  * struct ec_params_cec_set - CEC parameters set
4444  * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS
4445  * @val: in case cmd is CEC_CMD_ENABLE, this field can be 0 to disable CEC
4446  *	or 1 to enable CEC functionality, in case cmd is
4447  *	CEC_CMD_LOGICAL_ADDRESS, this field encodes the requested logical
4448  *	address between 0 and 15 or 0xff to unregister
4449  */
4450 struct ec_params_cec_set {
4451 	uint8_t cmd; /* enum cec_command */
4452 	uint8_t val;
4453 } __ec_align1;
4454 
4455 /* Read various CEC parameters */
4456 #define EC_CMD_CEC_GET 0x00BB
4457 
4458 /**
4459  * struct ec_params_cec_get - CEC parameters get
4460  * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS
4461  */
4462 struct ec_params_cec_get {
4463 	uint8_t cmd; /* enum cec_command */
4464 } __ec_align1;
4465 
4466 /**
4467  * struct ec_response_cec_get - CEC parameters get response
4468  * @val: in case cmd was CEC_CMD_ENABLE, this field will 0 if CEC is
4469  *	disabled or 1 if CEC functionality is enabled,
4470  *	in case cmd was CEC_CMD_LOGICAL_ADDRESS, this will encode the
4471  *	configured logical address between 0 and 15 or 0xff if unregistered
4472  */
4473 struct ec_response_cec_get {
4474 	uint8_t val;
4475 } __ec_align1;
4476 
4477 /* CEC parameters command */
4478 enum cec_command {
4479 	/* CEC reading, writing and events enable */
4480 	CEC_CMD_ENABLE,
4481 	/* CEC logical address  */
4482 	CEC_CMD_LOGICAL_ADDRESS,
4483 };
4484 
4485 /* Events from CEC to AP */
4486 enum mkbp_cec_event {
4487 	/* Outgoing message was acknowledged by a follower */
4488 	EC_MKBP_CEC_SEND_OK			= BIT(0),
4489 	/* Outgoing message was not acknowledged */
4490 	EC_MKBP_CEC_SEND_FAILED			= BIT(1),
4491 };
4492 
4493 /*****************************************************************************/
4494 
4495 /* Commands for audio codec. */
4496 #define EC_CMD_EC_CODEC 0x00BC
4497 
4498 enum ec_codec_subcmd {
4499 	EC_CODEC_GET_CAPABILITIES = 0x0,
4500 	EC_CODEC_GET_SHM_ADDR = 0x1,
4501 	EC_CODEC_SET_SHM_ADDR = 0x2,
4502 	EC_CODEC_SUBCMD_COUNT,
4503 };
4504 
4505 enum ec_codec_cap {
4506 	EC_CODEC_CAP_WOV_AUDIO_SHM = 0,
4507 	EC_CODEC_CAP_WOV_LANG_SHM = 1,
4508 	EC_CODEC_CAP_LAST = 32,
4509 };
4510 
4511 enum ec_codec_shm_id {
4512 	EC_CODEC_SHM_ID_WOV_AUDIO = 0x0,
4513 	EC_CODEC_SHM_ID_WOV_LANG = 0x1,
4514 	EC_CODEC_SHM_ID_LAST,
4515 };
4516 
4517 enum ec_codec_shm_type {
4518 	EC_CODEC_SHM_TYPE_EC_RAM = 0x0,
4519 	EC_CODEC_SHM_TYPE_SYSTEM_RAM = 0x1,
4520 };
4521 
4522 struct __ec_align1 ec_param_ec_codec_get_shm_addr {
4523 	uint8_t shm_id;
4524 	uint8_t reserved[3];
4525 };
4526 
4527 struct __ec_align4 ec_param_ec_codec_set_shm_addr {
4528 	uint64_t phys_addr;
4529 	uint32_t len;
4530 	uint8_t shm_id;
4531 	uint8_t reserved[3];
4532 };
4533 
4534 struct __ec_align4 ec_param_ec_codec {
4535 	uint8_t cmd; /* enum ec_codec_subcmd */
4536 	uint8_t reserved[3];
4537 
4538 	union {
4539 		struct ec_param_ec_codec_get_shm_addr
4540 				get_shm_addr_param;
4541 		struct ec_param_ec_codec_set_shm_addr
4542 				set_shm_addr_param;
4543 	};
4544 };
4545 
4546 struct __ec_align4 ec_response_ec_codec_get_capabilities {
4547 	uint32_t capabilities;
4548 };
4549 
4550 struct __ec_align4 ec_response_ec_codec_get_shm_addr {
4551 	uint64_t phys_addr;
4552 	uint32_t len;
4553 	uint8_t type;
4554 	uint8_t reserved[3];
4555 };
4556 
4557 /*****************************************************************************/
4558 
4559 /* Commands for DMIC on audio codec. */
4560 #define EC_CMD_EC_CODEC_DMIC 0x00BD
4561 
4562 enum ec_codec_dmic_subcmd {
4563 	EC_CODEC_DMIC_GET_MAX_GAIN = 0x0,
4564 	EC_CODEC_DMIC_SET_GAIN_IDX = 0x1,
4565 	EC_CODEC_DMIC_GET_GAIN_IDX = 0x2,
4566 	EC_CODEC_DMIC_SUBCMD_COUNT,
4567 };
4568 
4569 enum ec_codec_dmic_channel {
4570 	EC_CODEC_DMIC_CHANNEL_0 = 0x0,
4571 	EC_CODEC_DMIC_CHANNEL_1 = 0x1,
4572 	EC_CODEC_DMIC_CHANNEL_2 = 0x2,
4573 	EC_CODEC_DMIC_CHANNEL_3 = 0x3,
4574 	EC_CODEC_DMIC_CHANNEL_4 = 0x4,
4575 	EC_CODEC_DMIC_CHANNEL_5 = 0x5,
4576 	EC_CODEC_DMIC_CHANNEL_6 = 0x6,
4577 	EC_CODEC_DMIC_CHANNEL_7 = 0x7,
4578 	EC_CODEC_DMIC_CHANNEL_COUNT,
4579 };
4580 
4581 struct __ec_align1 ec_param_ec_codec_dmic_set_gain_idx {
4582 	uint8_t channel; /* enum ec_codec_dmic_channel */
4583 	uint8_t gain;
4584 	uint8_t reserved[2];
4585 };
4586 
4587 struct __ec_align1 ec_param_ec_codec_dmic_get_gain_idx {
4588 	uint8_t channel; /* enum ec_codec_dmic_channel */
4589 	uint8_t reserved[3];
4590 };
4591 
4592 struct __ec_align4 ec_param_ec_codec_dmic {
4593 	uint8_t cmd; /* enum ec_codec_dmic_subcmd */
4594 	uint8_t reserved[3];
4595 
4596 	union {
4597 		struct ec_param_ec_codec_dmic_set_gain_idx
4598 				set_gain_idx_param;
4599 		struct ec_param_ec_codec_dmic_get_gain_idx
4600 				get_gain_idx_param;
4601 	};
4602 };
4603 
4604 struct __ec_align1 ec_response_ec_codec_dmic_get_max_gain {
4605 	uint8_t max_gain;
4606 };
4607 
4608 struct __ec_align1 ec_response_ec_codec_dmic_get_gain_idx {
4609 	uint8_t gain;
4610 };
4611 
4612 /*****************************************************************************/
4613 
4614 /* Commands for I2S RX on audio codec. */
4615 
4616 #define EC_CMD_EC_CODEC_I2S_RX 0x00BE
4617 
4618 enum ec_codec_i2s_rx_subcmd {
4619 	EC_CODEC_I2S_RX_ENABLE = 0x0,
4620 	EC_CODEC_I2S_RX_DISABLE = 0x1,
4621 	EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH = 0x2,
4622 	EC_CODEC_I2S_RX_SET_DAIFMT = 0x3,
4623 	EC_CODEC_I2S_RX_SET_BCLK = 0x4,
4624 	EC_CODEC_I2S_RX_RESET = 0x5,
4625 	EC_CODEC_I2S_RX_SUBCMD_COUNT,
4626 };
4627 
4628 enum ec_codec_i2s_rx_sample_depth {
4629 	EC_CODEC_I2S_RX_SAMPLE_DEPTH_16 = 0x0,
4630 	EC_CODEC_I2S_RX_SAMPLE_DEPTH_24 = 0x1,
4631 	EC_CODEC_I2S_RX_SAMPLE_DEPTH_COUNT,
4632 };
4633 
4634 enum ec_codec_i2s_rx_daifmt {
4635 	EC_CODEC_I2S_RX_DAIFMT_I2S = 0x0,
4636 	EC_CODEC_I2S_RX_DAIFMT_RIGHT_J = 0x1,
4637 	EC_CODEC_I2S_RX_DAIFMT_LEFT_J = 0x2,
4638 	EC_CODEC_I2S_RX_DAIFMT_COUNT,
4639 };
4640 
4641 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_sample_depth {
4642 	uint8_t depth;
4643 	uint8_t reserved[3];
4644 };
4645 
4646 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_gain {
4647 	uint8_t left;
4648 	uint8_t right;
4649 	uint8_t reserved[2];
4650 };
4651 
4652 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_daifmt {
4653 	uint8_t daifmt;
4654 	uint8_t reserved[3];
4655 };
4656 
4657 struct __ec_align4 ec_param_ec_codec_i2s_rx_set_bclk {
4658 	uint32_t bclk;
4659 };
4660 
4661 struct __ec_align4 ec_param_ec_codec_i2s_rx {
4662 	uint8_t cmd; /* enum ec_codec_i2s_rx_subcmd */
4663 	uint8_t reserved[3];
4664 
4665 	union {
4666 		struct ec_param_ec_codec_i2s_rx_set_sample_depth
4667 				set_sample_depth_param;
4668 		struct ec_param_ec_codec_i2s_rx_set_daifmt
4669 				set_daifmt_param;
4670 		struct ec_param_ec_codec_i2s_rx_set_bclk
4671 				set_bclk_param;
4672 	};
4673 };
4674 
4675 /*****************************************************************************/
4676 /* Commands for WoV on audio codec. */
4677 
4678 #define EC_CMD_EC_CODEC_WOV 0x00BF
4679 
4680 enum ec_codec_wov_subcmd {
4681 	EC_CODEC_WOV_SET_LANG = 0x0,
4682 	EC_CODEC_WOV_SET_LANG_SHM = 0x1,
4683 	EC_CODEC_WOV_GET_LANG = 0x2,
4684 	EC_CODEC_WOV_ENABLE = 0x3,
4685 	EC_CODEC_WOV_DISABLE = 0x4,
4686 	EC_CODEC_WOV_READ_AUDIO = 0x5,
4687 	EC_CODEC_WOV_READ_AUDIO_SHM = 0x6,
4688 	EC_CODEC_WOV_SUBCMD_COUNT,
4689 };
4690 
4691 /*
4692  * @hash is SHA256 of the whole language model.
4693  * @total_len indicates the length of whole language model.
4694  * @offset is the cursor from the beginning of the model.
4695  * @buf is the packet buffer.
4696  * @len denotes how many bytes in the buf.
4697  */
4698 struct __ec_align4 ec_param_ec_codec_wov_set_lang {
4699 	uint8_t hash[32];
4700 	uint32_t total_len;
4701 	uint32_t offset;
4702 	uint8_t buf[128];
4703 	uint32_t len;
4704 };
4705 
4706 struct __ec_align4 ec_param_ec_codec_wov_set_lang_shm {
4707 	uint8_t hash[32];
4708 	uint32_t total_len;
4709 };
4710 
4711 struct __ec_align4 ec_param_ec_codec_wov {
4712 	uint8_t cmd; /* enum ec_codec_wov_subcmd */
4713 	uint8_t reserved[3];
4714 
4715 	union {
4716 		struct ec_param_ec_codec_wov_set_lang
4717 				set_lang_param;
4718 		struct ec_param_ec_codec_wov_set_lang_shm
4719 				set_lang_shm_param;
4720 	};
4721 };
4722 
4723 struct __ec_align4 ec_response_ec_codec_wov_get_lang {
4724 	uint8_t hash[32];
4725 };
4726 
4727 struct __ec_align4 ec_response_ec_codec_wov_read_audio {
4728 	uint8_t buf[128];
4729 	uint32_t len;
4730 };
4731 
4732 struct __ec_align4 ec_response_ec_codec_wov_read_audio_shm {
4733 	uint32_t offset;
4734 	uint32_t len;
4735 };
4736 
4737 /*****************************************************************************/
4738 /* System commands */
4739 
4740 /*
4741  * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't
4742  * necessarily reboot the EC.  Rename to "image" or something similar?
4743  */
4744 #define EC_CMD_REBOOT_EC 0x00D2
4745 
4746 /* Command */
4747 enum ec_reboot_cmd {
4748 	EC_REBOOT_CANCEL = 0,        /* Cancel a pending reboot */
4749 	EC_REBOOT_JUMP_RO = 1,       /* Jump to RO without rebooting */
4750 	EC_REBOOT_JUMP_RW = 2,       /* Jump to active RW without rebooting */
4751 	/* (command 3 was jump to RW-B) */
4752 	EC_REBOOT_COLD = 4,          /* Cold-reboot */
4753 	EC_REBOOT_DISABLE_JUMP = 5,  /* Disable jump until next reboot */
4754 	EC_REBOOT_HIBERNATE = 6,     /* Hibernate EC */
4755 	EC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7, /* and clears AP_OFF flag */
4756 	EC_REBOOT_COLD_AP_OFF = 8,   /* Cold-reboot and don't boot AP */
4757 };
4758 
4759 /* Flags for ec_params_reboot_ec.reboot_flags */
4760 #define EC_REBOOT_FLAG_RESERVED0      BIT(0)  /* Was recovery request */
4761 #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN BIT(1)  /* Reboot after AP shutdown */
4762 #define EC_REBOOT_FLAG_SWITCH_RW_SLOT BIT(2)  /* Switch RW slot */
4763 
4764 struct ec_params_reboot_ec {
4765 	uint8_t cmd;           /* enum ec_reboot_cmd */
4766 	uint8_t flags;         /* See EC_REBOOT_FLAG_* */
4767 } __ec_align1;
4768 
4769 /*
4770  * Get information on last EC panic.
4771  *
4772  * Returns variable-length platform-dependent panic information.  See panic.h
4773  * for details.
4774  */
4775 #define EC_CMD_GET_PANIC_INFO 0x00D3
4776 
4777 /*****************************************************************************/
4778 /*
4779  * Special commands
4780  *
4781  * These do not follow the normal rules for commands.  See each command for
4782  * details.
4783  */
4784 
4785 /*
4786  * Reboot NOW
4787  *
4788  * This command will work even when the EC LPC interface is busy, because the
4789  * reboot command is processed at interrupt level.  Note that when the EC
4790  * reboots, the host will reboot too, so there is no response to this command.
4791  *
4792  * Use EC_CMD_REBOOT_EC to reboot the EC more politely.
4793  */
4794 #define EC_CMD_REBOOT 0x00D1  /* Think "die" */
4795 
4796 /*
4797  * Resend last response (not supported on LPC).
4798  *
4799  * Returns EC_RES_UNAVAILABLE if there is no response available - for example,
4800  * there was no previous command, or the previous command's response was too
4801  * big to save.
4802  */
4803 #define EC_CMD_RESEND_RESPONSE 0x00DB
4804 
4805 /*
4806  * This header byte on a command indicate version 0. Any header byte less
4807  * than this means that we are talking to an old EC which doesn't support
4808  * versioning. In that case, we assume version 0.
4809  *
4810  * Header bytes greater than this indicate a later version. For example,
4811  * EC_CMD_VERSION0 + 1 means we are using version 1.
4812  *
4813  * The old EC interface must not use commands 0xdc or higher.
4814  */
4815 #define EC_CMD_VERSION0 0x00DC
4816 
4817 /*****************************************************************************/
4818 /*
4819  * PD commands
4820  *
4821  * These commands are for PD MCU communication.
4822  */
4823 
4824 /* EC to PD MCU exchange status command */
4825 #define EC_CMD_PD_EXCHANGE_STATUS 0x0100
4826 #define EC_VER_PD_EXCHANGE_STATUS 2
4827 
4828 enum pd_charge_state {
4829 	PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */
4830 	PD_CHARGE_NONE,          /* No charging allowed */
4831 	PD_CHARGE_5V,            /* 5V charging only */
4832 	PD_CHARGE_MAX            /* Charge at max voltage */
4833 };
4834 
4835 /* Status of EC being sent to PD */
4836 #define EC_STATUS_HIBERNATING	BIT(0)
4837 
4838 struct ec_params_pd_status {
4839 	uint8_t status;       /* EC status */
4840 	int8_t batt_soc;      /* battery state of charge */
4841 	uint8_t charge_state; /* charging state (from enum pd_charge_state) */
4842 } __ec_align1;
4843 
4844 /* Status of PD being sent back to EC */
4845 #define PD_STATUS_HOST_EVENT      BIT(0) /* Forward host event to AP */
4846 #define PD_STATUS_IN_RW           BIT(1) /* Running RW image */
4847 #define PD_STATUS_JUMPED_TO_IMAGE BIT(2) /* Current image was jumped to */
4848 #define PD_STATUS_TCPC_ALERT_0    BIT(3) /* Alert active in port 0 TCPC */
4849 #define PD_STATUS_TCPC_ALERT_1    BIT(4) /* Alert active in port 1 TCPC */
4850 #define PD_STATUS_TCPC_ALERT_2    BIT(5) /* Alert active in port 2 TCPC */
4851 #define PD_STATUS_TCPC_ALERT_3    BIT(6) /* Alert active in port 3 TCPC */
4852 #define PD_STATUS_EC_INT_ACTIVE  (PD_STATUS_TCPC_ALERT_0 | \
4853 				      PD_STATUS_TCPC_ALERT_1 | \
4854 				      PD_STATUS_HOST_EVENT)
4855 struct ec_response_pd_status {
4856 	uint32_t curr_lim_ma;       /* input current limit */
4857 	uint16_t status;            /* PD MCU status */
4858 	int8_t active_charge_port;  /* active charging port */
4859 } __ec_align_size1;
4860 
4861 /* AP to PD MCU host event status command, cleared on read */
4862 #define EC_CMD_PD_HOST_EVENT_STATUS 0x0104
4863 
4864 /* PD MCU host event status bits */
4865 #define PD_EVENT_UPDATE_DEVICE     BIT(0)
4866 #define PD_EVENT_POWER_CHANGE      BIT(1)
4867 #define PD_EVENT_IDENTITY_RECEIVED BIT(2)
4868 #define PD_EVENT_DATA_SWAP         BIT(3)
4869 struct ec_response_host_event_status {
4870 	uint32_t status;      /* PD MCU host event status */
4871 } __ec_align4;
4872 
4873 /* Set USB type-C port role and muxes */
4874 #define EC_CMD_USB_PD_CONTROL 0x0101
4875 
4876 enum usb_pd_control_role {
4877 	USB_PD_CTRL_ROLE_NO_CHANGE = 0,
4878 	USB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */
4879 	USB_PD_CTRL_ROLE_TOGGLE_OFF = 2,
4880 	USB_PD_CTRL_ROLE_FORCE_SINK = 3,
4881 	USB_PD_CTRL_ROLE_FORCE_SOURCE = 4,
4882 	USB_PD_CTRL_ROLE_FREEZE = 5,
4883 	USB_PD_CTRL_ROLE_COUNT
4884 };
4885 
4886 enum usb_pd_control_mux {
4887 	USB_PD_CTRL_MUX_NO_CHANGE = 0,
4888 	USB_PD_CTRL_MUX_NONE = 1,
4889 	USB_PD_CTRL_MUX_USB = 2,
4890 	USB_PD_CTRL_MUX_DP = 3,
4891 	USB_PD_CTRL_MUX_DOCK = 4,
4892 	USB_PD_CTRL_MUX_AUTO = 5,
4893 	USB_PD_CTRL_MUX_COUNT
4894 };
4895 
4896 enum usb_pd_control_swap {
4897 	USB_PD_CTRL_SWAP_NONE = 0,
4898 	USB_PD_CTRL_SWAP_DATA = 1,
4899 	USB_PD_CTRL_SWAP_POWER = 2,
4900 	USB_PD_CTRL_SWAP_VCONN = 3,
4901 	USB_PD_CTRL_SWAP_COUNT
4902 };
4903 
4904 struct ec_params_usb_pd_control {
4905 	uint8_t port;
4906 	uint8_t role;
4907 	uint8_t mux;
4908 	uint8_t swap;
4909 } __ec_align1;
4910 
4911 #define PD_CTRL_RESP_ENABLED_COMMS      BIT(0) /* Communication enabled */
4912 #define PD_CTRL_RESP_ENABLED_CONNECTED  BIT(1) /* Device connected */
4913 #define PD_CTRL_RESP_ENABLED_PD_CAPABLE BIT(2) /* Partner is PD capable */
4914 
4915 #define PD_CTRL_RESP_ROLE_POWER         BIT(0) /* 0=SNK/1=SRC */
4916 #define PD_CTRL_RESP_ROLE_DATA          BIT(1) /* 0=UFP/1=DFP */
4917 #define PD_CTRL_RESP_ROLE_VCONN         BIT(2) /* Vconn status */
4918 #define PD_CTRL_RESP_ROLE_DR_POWER      BIT(3) /* Partner is dualrole power */
4919 #define PD_CTRL_RESP_ROLE_DR_DATA       BIT(4) /* Partner is dualrole data */
4920 #define PD_CTRL_RESP_ROLE_USB_COMM      BIT(5) /* Partner USB comm capable */
4921 #define PD_CTRL_RESP_ROLE_EXT_POWERED   BIT(6) /* Partner externally powerd */
4922 
4923 struct ec_response_usb_pd_control {
4924 	uint8_t enabled;
4925 	uint8_t role;
4926 	uint8_t polarity;
4927 	uint8_t state;
4928 } __ec_align1;
4929 
4930 struct ec_response_usb_pd_control_v1 {
4931 	uint8_t enabled;
4932 	uint8_t role;
4933 	uint8_t polarity;
4934 	char state[32];
4935 } __ec_align1;
4936 
4937 /* Values representing usbc PD CC state */
4938 #define USBC_PD_CC_NONE		0 /* No accessory connected */
4939 #define USBC_PD_CC_NO_UFP	1 /* No UFP accessory connected */
4940 #define USBC_PD_CC_AUDIO_ACC	2 /* Audio accessory connected */
4941 #define USBC_PD_CC_DEBUG_ACC	3 /* Debug accessory connected */
4942 #define USBC_PD_CC_UFP_ATTACHED	4 /* UFP attached to usbc */
4943 #define USBC_PD_CC_DFP_ATTACHED	5 /* DPF attached to usbc */
4944 
4945 /* Active/Passive Cable */
4946 #define USB_PD_CTRL_ACTIVE_CABLE        BIT(0)
4947 /* Optical/Non-optical cable */
4948 #define USB_PD_CTRL_OPTICAL_CABLE       BIT(1)
4949 /* 3rd Gen TBT device (or AMA)/2nd gen tbt Adapter */
4950 #define USB_PD_CTRL_TBT_LEGACY_ADAPTER  BIT(2)
4951 /* Active Link Uni-Direction */
4952 #define USB_PD_CTRL_ACTIVE_LINK_UNIDIR  BIT(3)
4953 
4954 struct ec_response_usb_pd_control_v2 {
4955 	uint8_t enabled;
4956 	uint8_t role;
4957 	uint8_t polarity;
4958 	char state[32];
4959 	uint8_t cc_state;	/* enum pd_cc_states representing cc state */
4960 	uint8_t dp_mode;	/* Current DP pin mode (MODE_DP_PIN_[A-E]) */
4961 	uint8_t reserved;	/* Reserved for future use */
4962 	uint8_t control_flags;	/* USB_PD_CTRL_*flags */
4963 	uint8_t cable_speed;	/* TBT_SS_* cable speed */
4964 	uint8_t cable_gen;	/* TBT_GEN3_* cable rounded support */
4965 } __ec_align1;
4966 
4967 #define EC_CMD_USB_PD_PORTS 0x0102
4968 
4969 /* Maximum number of PD ports on a device, num_ports will be <= this */
4970 #define EC_USB_PD_MAX_PORTS 8
4971 
4972 struct ec_response_usb_pd_ports {
4973 	uint8_t num_ports;
4974 } __ec_align1;
4975 
4976 #define EC_CMD_USB_PD_POWER_INFO 0x0103
4977 
4978 #define PD_POWER_CHARGING_PORT 0xff
4979 struct ec_params_usb_pd_power_info {
4980 	uint8_t port;
4981 } __ec_align1;
4982 
4983 enum usb_chg_type {
4984 	USB_CHG_TYPE_NONE,
4985 	USB_CHG_TYPE_PD,
4986 	USB_CHG_TYPE_C,
4987 	USB_CHG_TYPE_PROPRIETARY,
4988 	USB_CHG_TYPE_BC12_DCP,
4989 	USB_CHG_TYPE_BC12_CDP,
4990 	USB_CHG_TYPE_BC12_SDP,
4991 	USB_CHG_TYPE_OTHER,
4992 	USB_CHG_TYPE_VBUS,
4993 	USB_CHG_TYPE_UNKNOWN,
4994 	USB_CHG_TYPE_DEDICATED,
4995 };
4996 enum usb_power_roles {
4997 	USB_PD_PORT_POWER_DISCONNECTED,
4998 	USB_PD_PORT_POWER_SOURCE,
4999 	USB_PD_PORT_POWER_SINK,
5000 	USB_PD_PORT_POWER_SINK_NOT_CHARGING,
5001 };
5002 
5003 struct usb_chg_measures {
5004 	uint16_t voltage_max;
5005 	uint16_t voltage_now;
5006 	uint16_t current_max;
5007 	uint16_t current_lim;
5008 } __ec_align2;
5009 
5010 struct ec_response_usb_pd_power_info {
5011 	uint8_t role;
5012 	uint8_t type;
5013 	uint8_t dualrole;
5014 	uint8_t reserved1;
5015 	struct usb_chg_measures meas;
5016 	uint32_t max_power;
5017 } __ec_align4;
5018 
5019 
5020 /*
5021  * This command will return the number of USB PD charge port + the number
5022  * of dedicated port present.
5023  * EC_CMD_USB_PD_PORTS does NOT include the dedicated ports
5024  */
5025 #define EC_CMD_CHARGE_PORT_COUNT 0x0105
5026 struct ec_response_charge_port_count {
5027 	uint8_t port_count;
5028 } __ec_align1;
5029 
5030 /* Write USB-PD device FW */
5031 #define EC_CMD_USB_PD_FW_UPDATE 0x0110
5032 
5033 enum usb_pd_fw_update_cmds {
5034 	USB_PD_FW_REBOOT,
5035 	USB_PD_FW_FLASH_ERASE,
5036 	USB_PD_FW_FLASH_WRITE,
5037 	USB_PD_FW_ERASE_SIG,
5038 };
5039 
5040 struct ec_params_usb_pd_fw_update {
5041 	uint16_t dev_id;
5042 	uint8_t cmd;
5043 	uint8_t port;
5044 	uint32_t size;     /* Size to write in bytes */
5045 	/* Followed by data to write */
5046 } __ec_align4;
5047 
5048 /* Write USB-PD Accessory RW_HASH table entry */
5049 #define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111
5050 /* RW hash is first 20 bytes of SHA-256 of RW section */
5051 #define PD_RW_HASH_SIZE 20
5052 struct ec_params_usb_pd_rw_hash_entry {
5053 	uint16_t dev_id;
5054 	uint8_t dev_rw_hash[PD_RW_HASH_SIZE];
5055 	uint8_t reserved;        /*
5056 				  * For alignment of current_image
5057 				  * TODO(rspangler) but it's not aligned!
5058 				  * Should have been reserved[2].
5059 				  */
5060 	uint32_t current_image;  /* One of ec_current_image */
5061 } __ec_align1;
5062 
5063 /* Read USB-PD Accessory info */
5064 #define EC_CMD_USB_PD_DEV_INFO 0x0112
5065 
5066 struct ec_params_usb_pd_info_request {
5067 	uint8_t port;
5068 } __ec_align1;
5069 
5070 /* Read USB-PD Device discovery info */
5071 #define EC_CMD_USB_PD_DISCOVERY 0x0113
5072 struct ec_params_usb_pd_discovery_entry {
5073 	uint16_t vid;  /* USB-IF VID */
5074 	uint16_t pid;  /* USB-IF PID */
5075 	uint8_t ptype; /* product type (hub,periph,cable,ama) */
5076 } __ec_align_size1;
5077 
5078 /* Override default charge behavior */
5079 #define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114
5080 
5081 /* Negative port parameters have special meaning */
5082 enum usb_pd_override_ports {
5083 	OVERRIDE_DONT_CHARGE = -2,
5084 	OVERRIDE_OFF = -1,
5085 	/* [0, CONFIG_USB_PD_PORT_COUNT): Port# */
5086 };
5087 
5088 struct ec_params_charge_port_override {
5089 	int16_t override_port; /* Override port# */
5090 } __ec_align2;
5091 
5092 /*
5093  * Read (and delete) one entry of PD event log.
5094  * TODO(crbug.com/751742): Make this host command more generic to accommodate
5095  * future non-PD logs that use the same internal EC event_log.
5096  */
5097 #define EC_CMD_PD_GET_LOG_ENTRY 0x0115
5098 
5099 struct ec_response_pd_log {
5100 	uint32_t timestamp; /* relative timestamp in milliseconds */
5101 	uint8_t type;       /* event type : see PD_EVENT_xx below */
5102 	uint8_t size_port;  /* [7:5] port number [4:0] payload size in bytes */
5103 	uint16_t data;      /* type-defined data payload */
5104 	uint8_t payload[];  /* optional additional data payload: 0..16 bytes */
5105 } __ec_align4;
5106 
5107 /* The timestamp is the microsecond counter shifted to get about a ms. */
5108 #define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */
5109 
5110 #define PD_LOG_SIZE_MASK  0x1f
5111 #define PD_LOG_PORT_MASK  0xe0
5112 #define PD_LOG_PORT_SHIFT    5
5113 #define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \
5114 				      ((size) & PD_LOG_SIZE_MASK))
5115 #define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT)
5116 #define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK)
5117 
5118 /* PD event log : entry types */
5119 /* PD MCU events */
5120 #define PD_EVENT_MCU_BASE       0x00
5121 #define PD_EVENT_MCU_CHARGE             (PD_EVENT_MCU_BASE+0)
5122 #define PD_EVENT_MCU_CONNECT            (PD_EVENT_MCU_BASE+1)
5123 /* Reserved for custom board event */
5124 #define PD_EVENT_MCU_BOARD_CUSTOM       (PD_EVENT_MCU_BASE+2)
5125 /* PD generic accessory events */
5126 #define PD_EVENT_ACC_BASE       0x20
5127 #define PD_EVENT_ACC_RW_FAIL   (PD_EVENT_ACC_BASE+0)
5128 #define PD_EVENT_ACC_RW_ERASE  (PD_EVENT_ACC_BASE+1)
5129 /* PD power supply events */
5130 #define PD_EVENT_PS_BASE        0x40
5131 #define PD_EVENT_PS_FAULT      (PD_EVENT_PS_BASE+0)
5132 /* PD video dongles events */
5133 #define PD_EVENT_VIDEO_BASE     0x60
5134 #define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0)
5135 #define PD_EVENT_VIDEO_CODEC   (PD_EVENT_VIDEO_BASE+1)
5136 /* Returned in the "type" field, when there is no entry available */
5137 #define PD_EVENT_NO_ENTRY       0xff
5138 
5139 /*
5140  * PD_EVENT_MCU_CHARGE event definition :
5141  * the payload is "struct usb_chg_measures"
5142  * the data field contains the port state flags as defined below :
5143  */
5144 /* Port partner is a dual role device */
5145 #define CHARGE_FLAGS_DUAL_ROLE         BIT(15)
5146 /* Port is the pending override port */
5147 #define CHARGE_FLAGS_DELAYED_OVERRIDE  BIT(14)
5148 /* Port is the override port */
5149 #define CHARGE_FLAGS_OVERRIDE          BIT(13)
5150 /* Charger type */
5151 #define CHARGE_FLAGS_TYPE_SHIFT               3
5152 #define CHARGE_FLAGS_TYPE_MASK       (0xf << CHARGE_FLAGS_TYPE_SHIFT)
5153 /* Power delivery role */
5154 #define CHARGE_FLAGS_ROLE_MASK         (7 <<  0)
5155 
5156 /*
5157  * PD_EVENT_PS_FAULT data field flags definition :
5158  */
5159 #define PS_FAULT_OCP                          1
5160 #define PS_FAULT_FAST_OCP                     2
5161 #define PS_FAULT_OVP                          3
5162 #define PS_FAULT_DISCH                        4
5163 
5164 /*
5165  * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info".
5166  */
5167 struct mcdp_version {
5168 	uint8_t major;
5169 	uint8_t minor;
5170 	uint16_t build;
5171 } __ec_align4;
5172 
5173 struct mcdp_info {
5174 	uint8_t family[2];
5175 	uint8_t chipid[2];
5176 	struct mcdp_version irom;
5177 	struct mcdp_version fw;
5178 } __ec_align4;
5179 
5180 /* struct mcdp_info field decoding */
5181 #define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1])
5182 #define MCDP_FAMILY(family) ((family[0] << 8) | family[1])
5183 
5184 /* Get/Set USB-PD Alternate mode info */
5185 #define EC_CMD_USB_PD_GET_AMODE 0x0116
5186 struct ec_params_usb_pd_get_mode_request {
5187 	uint16_t svid_idx; /* SVID index to get */
5188 	uint8_t port;      /* port */
5189 } __ec_align_size1;
5190 
5191 struct ec_params_usb_pd_get_mode_response {
5192 	uint16_t svid;   /* SVID */
5193 	uint16_t opos;    /* Object Position */
5194 	uint32_t vdo[6]; /* Mode VDOs */
5195 } __ec_align4;
5196 
5197 #define EC_CMD_USB_PD_SET_AMODE 0x0117
5198 
5199 enum pd_mode_cmd {
5200 	PD_EXIT_MODE = 0,
5201 	PD_ENTER_MODE = 1,
5202 	/* Not a command.  Do NOT remove. */
5203 	PD_MODE_CMD_COUNT,
5204 };
5205 
5206 struct ec_params_usb_pd_set_mode_request {
5207 	uint32_t cmd;  /* enum pd_mode_cmd */
5208 	uint16_t svid; /* SVID to set */
5209 	uint8_t opos;  /* Object Position */
5210 	uint8_t port;  /* port */
5211 } __ec_align4;
5212 
5213 /* Ask the PD MCU to record a log of a requested type */
5214 #define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118
5215 
5216 struct ec_params_pd_write_log_entry {
5217 	uint8_t type; /* event type : see PD_EVENT_xx above */
5218 	uint8_t port; /* port#, or 0 for events unrelated to a given port */
5219 } __ec_align1;
5220 
5221 
5222 /* Control USB-PD chip */
5223 #define EC_CMD_PD_CONTROL 0x0119
5224 
5225 enum ec_pd_control_cmd {
5226 	PD_SUSPEND = 0,      /* Suspend the PD chip (EC: stop talking to PD) */
5227 	PD_RESUME,           /* Resume the PD chip (EC: start talking to PD) */
5228 	PD_RESET,            /* Force reset the PD chip */
5229 	PD_CONTROL_DISABLE,  /* Disable further calls to this command */
5230 	PD_CHIP_ON,          /* Power on the PD chip */
5231 };
5232 
5233 struct ec_params_pd_control {
5234 	uint8_t chip;         /* chip id */
5235 	uint8_t subcmd;
5236 } __ec_align1;
5237 
5238 /* Get info about USB-C SS muxes */
5239 #define EC_CMD_USB_PD_MUX_INFO 0x011A
5240 
5241 struct ec_params_usb_pd_mux_info {
5242 	uint8_t port; /* USB-C port number */
5243 } __ec_align1;
5244 
5245 /* Flags representing mux state */
5246 #define USB_PD_MUX_NONE               0      /* Open switch */
5247 #define USB_PD_MUX_USB_ENABLED        BIT(0) /* USB connected */
5248 #define USB_PD_MUX_DP_ENABLED         BIT(1) /* DP connected */
5249 #define USB_PD_MUX_POLARITY_INVERTED  BIT(2) /* CC line Polarity inverted */
5250 #define USB_PD_MUX_HPD_IRQ            BIT(3) /* HPD IRQ is asserted */
5251 #define USB_PD_MUX_HPD_LVL            BIT(4) /* HPD level is asserted */
5252 #define USB_PD_MUX_SAFE_MODE          BIT(5) /* DP is in safe mode */
5253 #define USB_PD_MUX_TBT_COMPAT_ENABLED BIT(6) /* TBT compat enabled */
5254 #define USB_PD_MUX_USB4_ENABLED       BIT(7) /* USB4 enabled */
5255 
5256 struct ec_response_usb_pd_mux_info {
5257 	uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */
5258 } __ec_align1;
5259 
5260 #define EC_CMD_PD_CHIP_INFO		0x011B
5261 
5262 struct ec_params_pd_chip_info {
5263 	uint8_t port;	/* USB-C port number */
5264 	uint8_t renew;	/* Force renewal */
5265 } __ec_align1;
5266 
5267 struct ec_response_pd_chip_info {
5268 	uint16_t vendor_id;
5269 	uint16_t product_id;
5270 	uint16_t device_id;
5271 	union {
5272 		uint8_t fw_version_string[8];
5273 		uint64_t fw_version_number;
5274 	};
5275 } __ec_align2;
5276 
5277 struct ec_response_pd_chip_info_v1 {
5278 	uint16_t vendor_id;
5279 	uint16_t product_id;
5280 	uint16_t device_id;
5281 	union {
5282 		uint8_t fw_version_string[8];
5283 		uint64_t fw_version_number;
5284 	};
5285 	union {
5286 		uint8_t min_req_fw_version_string[8];
5287 		uint64_t min_req_fw_version_number;
5288 	};
5289 } __ec_align2;
5290 
5291 /* Run RW signature verification and get status */
5292 #define EC_CMD_RWSIG_CHECK_STATUS	0x011C
5293 
5294 struct ec_response_rwsig_check_status {
5295 	uint32_t status;
5296 } __ec_align4;
5297 
5298 /* For controlling RWSIG task */
5299 #define EC_CMD_RWSIG_ACTION	0x011D
5300 
5301 enum rwsig_action {
5302 	RWSIG_ACTION_ABORT = 0,		/* Abort RWSIG and prevent jumping */
5303 	RWSIG_ACTION_CONTINUE = 1,	/* Jump to RW immediately */
5304 };
5305 
5306 struct ec_params_rwsig_action {
5307 	uint32_t action;
5308 } __ec_align4;
5309 
5310 /* Run verification on a slot */
5311 #define EC_CMD_EFS_VERIFY	0x011E
5312 
5313 struct ec_params_efs_verify {
5314 	uint8_t region;		/* enum ec_flash_region */
5315 } __ec_align1;
5316 
5317 /*
5318  * Retrieve info from Cros Board Info store. Response is based on the data
5319  * type. Integers return a uint32. Strings return a string, using the response
5320  * size to determine how big it is.
5321  */
5322 #define EC_CMD_GET_CROS_BOARD_INFO	0x011F
5323 /*
5324  * Write info into Cros Board Info on EEPROM. Write fails if the board has
5325  * hardware write-protect enabled.
5326  */
5327 #define EC_CMD_SET_CROS_BOARD_INFO	0x0120
5328 
5329 enum cbi_data_tag {
5330 	CBI_TAG_BOARD_VERSION = 0, /* uint32_t or smaller */
5331 	CBI_TAG_OEM_ID = 1,        /* uint32_t or smaller */
5332 	CBI_TAG_SKU_ID = 2,        /* uint32_t or smaller */
5333 	CBI_TAG_DRAM_PART_NUM = 3, /* variable length ascii, nul terminated. */
5334 	CBI_TAG_OEM_NAME = 4,      /* variable length ascii, nul terminated. */
5335 	CBI_TAG_MODEL_ID = 5,      /* uint32_t or smaller */
5336 	CBI_TAG_COUNT,
5337 };
5338 
5339 /*
5340  * Flags to control read operation
5341  *
5342  * RELOAD:  Invalidate cache and read data from EEPROM. Useful to verify
5343  *          write was successful without reboot.
5344  */
5345 #define CBI_GET_RELOAD		BIT(0)
5346 
5347 struct ec_params_get_cbi {
5348 	uint32_t tag;		/* enum cbi_data_tag */
5349 	uint32_t flag;		/* CBI_GET_* */
5350 } __ec_align4;
5351 
5352 /*
5353  * Flags to control write behavior.
5354  *
5355  * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's
5356  *          useful when writing multiple fields in a row.
5357  * INIT:    Need to be set when creating a new CBI from scratch. All fields
5358  *          will be initialized to zero first.
5359  */
5360 #define CBI_SET_NO_SYNC		BIT(0)
5361 #define CBI_SET_INIT		BIT(1)
5362 
5363 struct ec_params_set_cbi {
5364 	uint32_t tag;		/* enum cbi_data_tag */
5365 	uint32_t flag;		/* CBI_SET_* */
5366 	uint32_t size;		/* Data size */
5367 	uint8_t data[];		/* For string and raw data */
5368 } __ec_align1;
5369 
5370 /*
5371  * Information about resets of the AP by the EC and the EC's own uptime.
5372  */
5373 #define EC_CMD_GET_UPTIME_INFO 0x0121
5374 
5375 struct ec_response_uptime_info {
5376 	/*
5377 	 * Number of milliseconds since the last EC boot. Sysjump resets
5378 	 * typically do not restart the EC's time_since_boot epoch.
5379 	 *
5380 	 * WARNING: The EC's sense of time is much less accurate than the AP's
5381 	 * sense of time, in both phase and frequency.  This timebase is similar
5382 	 * to CLOCK_MONOTONIC_RAW, but with 1% or more frequency error.
5383 	 */
5384 	uint32_t time_since_ec_boot_ms;
5385 
5386 	/*
5387 	 * Number of times the AP was reset by the EC since the last EC boot.
5388 	 * Note that the AP may be held in reset by the EC during the initial
5389 	 * boot sequence, such that the very first AP boot may count as more
5390 	 * than one here.
5391 	 */
5392 	uint32_t ap_resets_since_ec_boot;
5393 
5394 	/*
5395 	 * The set of flags which describe the EC's most recent reset.  See
5396 	 * include/system.h RESET_FLAG_* for details.
5397 	 */
5398 	uint32_t ec_reset_flags;
5399 
5400 	/* Empty log entries have both the cause and timestamp set to zero. */
5401 	struct ap_reset_log_entry {
5402 		/*
5403 		 * See include/chipset.h: enum chipset_{reset,shutdown}_reason
5404 		 * for details.
5405 		 */
5406 		uint16_t reset_cause;
5407 
5408 		/* Reserved for protocol growth. */
5409 		uint16_t reserved;
5410 
5411 		/*
5412 		 * The time of the reset's assertion, in milliseconds since the
5413 		 * last EC boot, in the same epoch as time_since_ec_boot_ms.
5414 		 * Set to zero if the log entry is empty.
5415 		 */
5416 		uint32_t reset_time_ms;
5417 	} recent_ap_reset[4];
5418 } __ec_align4;
5419 
5420 /*
5421  * Add entropy to the device secret (stored in the rollback region).
5422  *
5423  * Depending on the chip, the operation may take a long time (e.g. to erase
5424  * flash), so the commands are asynchronous.
5425  */
5426 #define EC_CMD_ADD_ENTROPY	0x0122
5427 
5428 enum add_entropy_action {
5429 	/* Add entropy to the current secret. */
5430 	ADD_ENTROPY_ASYNC = 0,
5431 	/*
5432 	 * Add entropy, and also make sure that the previous secret is erased.
5433 	 * (this can be implemented by adding entropy multiple times until
5434 	 * all rolback blocks have been overwritten).
5435 	 */
5436 	ADD_ENTROPY_RESET_ASYNC = 1,
5437 	/* Read back result from the previous operation. */
5438 	ADD_ENTROPY_GET_RESULT = 2,
5439 };
5440 
5441 struct ec_params_rollback_add_entropy {
5442 	uint8_t action;
5443 } __ec_align1;
5444 
5445 /*
5446  * Perform a single read of a given ADC channel.
5447  */
5448 #define EC_CMD_ADC_READ		0x0123
5449 
5450 struct ec_params_adc_read {
5451 	uint8_t adc_channel;
5452 } __ec_align1;
5453 
5454 struct ec_response_adc_read {
5455 	int32_t adc_value;
5456 } __ec_align4;
5457 
5458 /*
5459  * Read back rollback info
5460  */
5461 #define EC_CMD_ROLLBACK_INFO		0x0124
5462 
5463 struct ec_response_rollback_info {
5464 	int32_t id; /* Incrementing number to indicate which region to use. */
5465 	int32_t rollback_min_version;
5466 	int32_t rw_rollback_version;
5467 } __ec_align4;
5468 
5469 
5470 /* Issue AP reset */
5471 #define EC_CMD_AP_RESET 0x0125
5472 
5473 /**
5474  * Get the number of peripheral charge ports
5475  */
5476 #define EC_CMD_PCHG_COUNT 0x0134
5477 
5478 #define EC_PCHG_MAX_PORTS 8
5479 
5480 struct ec_response_pchg_count {
5481 	uint8_t port_count;
5482 } __ec_align1;
5483 
5484 /**
5485  * Get the status of a peripheral charge port
5486  */
5487 #define EC_CMD_PCHG 0x0135
5488 
5489 struct ec_params_pchg {
5490 	uint8_t port;
5491 } __ec_align1;
5492 
5493 struct ec_response_pchg {
5494 	uint32_t error;			/* enum pchg_error */
5495 	uint8_t state;			/* enum pchg_state state */
5496 	uint8_t battery_percentage;
5497 	uint8_t unused0;
5498 	uint8_t unused1;
5499 	/* Fields added in version 1 */
5500 	uint32_t fw_version;
5501 	uint32_t dropped_event_count;
5502 } __ec_align2;
5503 
5504 enum pchg_state {
5505 	/* Charger is reset and not initialized. */
5506 	PCHG_STATE_RESET = 0,
5507 	/* Charger is initialized or disabled. */
5508 	PCHG_STATE_INITIALIZED,
5509 	/* Charger is enabled and ready to detect a device. */
5510 	PCHG_STATE_ENABLED,
5511 	/* Device is in proximity. */
5512 	PCHG_STATE_DETECTED,
5513 	/* Device is being charged. */
5514 	PCHG_STATE_CHARGING,
5515 	/* Device is fully charged. It implies DETECTED (& not charging). */
5516 	PCHG_STATE_FULL,
5517 	/* In download (a.k.a. firmware update) mode */
5518 	PCHG_STATE_DOWNLOAD,
5519 	/* In download mode. Ready for receiving data. */
5520 	PCHG_STATE_DOWNLOADING,
5521 	/* Device is ready for data communication. */
5522 	PCHG_STATE_CONNECTED,
5523 	/* Put no more entry below */
5524 	PCHG_STATE_COUNT,
5525 };
5526 
5527 #define EC_PCHG_STATE_TEXT { \
5528 	[PCHG_STATE_RESET] = "RESET", \
5529 	[PCHG_STATE_INITIALIZED] = "INITIALIZED", \
5530 	[PCHG_STATE_ENABLED] = "ENABLED", \
5531 	[PCHG_STATE_DETECTED] = "DETECTED", \
5532 	[PCHG_STATE_CHARGING] = "CHARGING", \
5533 	[PCHG_STATE_FULL] = "FULL", \
5534 	[PCHG_STATE_DOWNLOAD] = "DOWNLOAD", \
5535 	[PCHG_STATE_DOWNLOADING] = "DOWNLOADING", \
5536 	[PCHG_STATE_CONNECTED] = "CONNECTED", \
5537 	}
5538 
5539 /*
5540  * Update firmware of peripheral chip
5541  */
5542 #define EC_CMD_PCHG_UPDATE 0x0136
5543 
5544 /* Port number is encoded in bit[28:31]. */
5545 #define EC_MKBP_PCHG_PORT_SHIFT		28
5546 /* Utility macro for converting MKBP event to port number. */
5547 #define EC_MKBP_PCHG_EVENT_TO_PORT(e)	(((e) >> EC_MKBP_PCHG_PORT_SHIFT) & 0xf)
5548 /* Utility macro for extracting event bits. */
5549 #define EC_MKBP_PCHG_EVENT_MASK(e)	((e) \
5550 					& GENMASK(EC_MKBP_PCHG_PORT_SHIFT-1, 0))
5551 
5552 #define EC_MKBP_PCHG_UPDATE_OPENED	BIT(0)
5553 #define EC_MKBP_PCHG_WRITE_COMPLETE	BIT(1)
5554 #define EC_MKBP_PCHG_UPDATE_CLOSED	BIT(2)
5555 #define EC_MKBP_PCHG_UPDATE_ERROR	BIT(3)
5556 #define EC_MKBP_PCHG_DEVICE_EVENT	BIT(4)
5557 
5558 enum ec_pchg_update_cmd {
5559 	/* Reset chip to normal mode. */
5560 	EC_PCHG_UPDATE_CMD_RESET_TO_NORMAL = 0,
5561 	/* Reset and put a chip in update (a.k.a. download) mode. */
5562 	EC_PCHG_UPDATE_CMD_OPEN,
5563 	/* Write a block of data containing FW image. */
5564 	EC_PCHG_UPDATE_CMD_WRITE,
5565 	/* Close update session. */
5566 	EC_PCHG_UPDATE_CMD_CLOSE,
5567 	/* End of commands */
5568 	EC_PCHG_UPDATE_CMD_COUNT,
5569 };
5570 
5571 struct ec_params_pchg_update {
5572 	/* PCHG port number */
5573 	uint8_t port;
5574 	/* enum ec_pchg_update_cmd */
5575 	uint8_t cmd;
5576 	/* Padding */
5577 	uint8_t reserved0;
5578 	uint8_t reserved1;
5579 	/* Version of new firmware */
5580 	uint32_t version;
5581 	/* CRC32 of new firmware */
5582 	uint32_t crc32;
5583 	/* Address in chip memory where <data> is written to */
5584 	uint32_t addr;
5585 	/* Size of <data> */
5586 	uint32_t size;
5587 	/* Partial data of new firmware */
5588 	uint8_t data[];
5589 } __ec_align4;
5590 
5591 BUILD_ASSERT(EC_PCHG_UPDATE_CMD_COUNT
5592 	     < BIT(sizeof(((struct ec_params_pchg_update *)0)->cmd)*8));
5593 
5594 struct ec_response_pchg_update {
5595 	/* Block size */
5596 	uint32_t block_size;
5597 } __ec_align4;
5598 
5599 
5600 /*****************************************************************************/
5601 /* Voltage regulator controls */
5602 
5603 /*
5604  * Get basic info of voltage regulator for given index.
5605  *
5606  * Returns the regulator name and supported voltage list in mV.
5607  */
5608 #define EC_CMD_REGULATOR_GET_INFO 0x012C
5609 
5610 /* Maximum length of regulator name */
5611 #define EC_REGULATOR_NAME_MAX_LEN 16
5612 
5613 /* Maximum length of the supported voltage list. */
5614 #define EC_REGULATOR_VOLTAGE_MAX_COUNT 16
5615 
5616 struct ec_params_regulator_get_info {
5617 	uint32_t index;
5618 } __ec_align4;
5619 
5620 struct ec_response_regulator_get_info {
5621 	char name[EC_REGULATOR_NAME_MAX_LEN];
5622 	uint16_t num_voltages;
5623 	uint16_t voltages_mv[EC_REGULATOR_VOLTAGE_MAX_COUNT];
5624 } __ec_align2;
5625 
5626 /*
5627  * Configure the regulator as enabled / disabled.
5628  */
5629 #define EC_CMD_REGULATOR_ENABLE 0x012D
5630 
5631 struct ec_params_regulator_enable {
5632 	uint32_t index;
5633 	uint8_t enable;
5634 } __ec_align4;
5635 
5636 /*
5637  * Query if the regulator is enabled.
5638  *
5639  * Returns 1 if the regulator is enabled, 0 if not.
5640  */
5641 #define EC_CMD_REGULATOR_IS_ENABLED 0x012E
5642 
5643 struct ec_params_regulator_is_enabled {
5644 	uint32_t index;
5645 } __ec_align4;
5646 
5647 struct ec_response_regulator_is_enabled {
5648 	uint8_t enabled;
5649 } __ec_align1;
5650 
5651 /*
5652  * Set voltage for the voltage regulator within the range specified.
5653  *
5654  * The driver should select the voltage in range closest to min_mv.
5655  *
5656  * Also note that this might be called before the regulator is enabled, and the
5657  * setting should be in effect after the regulator is enabled.
5658  */
5659 #define EC_CMD_REGULATOR_SET_VOLTAGE 0x012F
5660 
5661 struct ec_params_regulator_set_voltage {
5662 	uint32_t index;
5663 	uint32_t min_mv;
5664 	uint32_t max_mv;
5665 } __ec_align4;
5666 
5667 /*
5668  * Get the currently configured voltage for the voltage regulator.
5669  *
5670  * Note that this might be called before the regulator is enabled, and this
5671  * should return the configured output voltage if the regulator is enabled.
5672  */
5673 #define EC_CMD_REGULATOR_GET_VOLTAGE 0x0130
5674 
5675 struct ec_params_regulator_get_voltage {
5676 	uint32_t index;
5677 } __ec_align4;
5678 
5679 struct ec_response_regulator_get_voltage {
5680 	uint32_t voltage_mv;
5681 } __ec_align4;
5682 
5683 /*
5684  * Gather all discovery information for the given port and partner type.
5685  *
5686  * Note that if discovery has not yet completed, only the currently completed
5687  * responses will be filled in.   If the discovery data structures are changed
5688  * in the process of the command running, BUSY will be returned.
5689  *
5690  * VDO field sizes are set to the maximum possible number of VDOs a VDM may
5691  * contain, while the number of SVIDs here is selected to fit within the PROTO2
5692  * maximum parameter size.
5693  */
5694 #define EC_CMD_TYPEC_DISCOVERY 0x0131
5695 
5696 enum typec_partner_type {
5697 	TYPEC_PARTNER_SOP = 0,
5698 	TYPEC_PARTNER_SOP_PRIME = 1,
5699 };
5700 
5701 struct ec_params_typec_discovery {
5702 	uint8_t port;
5703 	uint8_t partner_type; /* enum typec_partner_type */
5704 } __ec_align1;
5705 
5706 struct svid_mode_info {
5707 	uint16_t svid;
5708 	uint16_t mode_count;  /* Number of modes partner sent */
5709 	uint32_t mode_vdo[6]; /* Max VDOs allowed after VDM header is 6 */
5710 };
5711 
5712 struct ec_response_typec_discovery {
5713 	uint8_t identity_count;    /* Number of identity VDOs partner sent */
5714 	uint8_t svid_count;	   /* Number of SVIDs partner sent */
5715 	uint16_t reserved;
5716 	uint32_t discovery_vdo[6]; /* Max VDOs allowed after VDM header is 6 */
5717 	struct svid_mode_info svids[];
5718 } __ec_align1;
5719 
5720 /* USB Type-C commands for AP-controlled device policy. */
5721 #define EC_CMD_TYPEC_CONTROL 0x0132
5722 
5723 enum typec_control_command {
5724 	TYPEC_CONTROL_COMMAND_EXIT_MODES,
5725 	TYPEC_CONTROL_COMMAND_CLEAR_EVENTS,
5726 	TYPEC_CONTROL_COMMAND_ENTER_MODE,
5727 	TYPEC_CONTROL_COMMAND_TBT_UFP_REPLY,
5728 	TYPEC_CONTROL_COMMAND_USB_MUX_SET,
5729 };
5730 
5731 /* Replies the AP may specify to the TBT EnterMode command as a UFP */
5732 enum typec_tbt_ufp_reply {
5733 	TYPEC_TBT_UFP_REPLY_NAK,
5734 	TYPEC_TBT_UFP_REPLY_ACK,
5735 };
5736 
5737 struct typec_usb_mux_set {
5738 	uint8_t mux_index;	/* Index of the mux to set in the chain */
5739 	uint8_t mux_flags;	/* USB_PD_MUX_*-encoded USB mux state to set */
5740 } __ec_align1;
5741 
5742 struct ec_params_typec_control {
5743 	uint8_t port;
5744 	uint8_t command;	/* enum typec_control_command */
5745 	uint16_t reserved;
5746 
5747 	/*
5748 	 * This section will be interpreted based on |command|. Define a
5749 	 * placeholder structure to avoid having to increase the size and bump
5750 	 * the command version when adding new sub-commands.
5751 	 */
5752 	union {
5753 		uint32_t clear_events_mask;
5754 		uint8_t mode_to_enter;      /* enum typec_mode */
5755 		uint8_t tbt_ufp_reply;      /* enum typec_tbt_ufp_reply */
5756 		struct typec_usb_mux_set mux_params;
5757 		uint8_t placeholder[128];
5758 	};
5759 } __ec_align1;
5760 
5761 /*
5762  * Gather all status information for a port.
5763  *
5764  * Note: this covers many of the return fields from the deprecated
5765  * EC_CMD_USB_PD_CONTROL command, except those that are redundant with the
5766  * discovery data.  The "enum pd_cc_states" is defined with the deprecated
5767  * EC_CMD_USB_PD_CONTROL command.
5768  *
5769  * This also combines in the EC_CMD_USB_PD_MUX_INFO flags.
5770  */
5771 #define EC_CMD_TYPEC_STATUS 0x0133
5772 
5773 /*
5774  * Power role.
5775  *
5776  * Note this is also used for PD header creation, and values align to those in
5777  * the Power Delivery Specification Revision 3.0 (See
5778  * 6.2.1.1.4 Port Power Role).
5779  */
5780 enum pd_power_role {
5781 	PD_ROLE_SINK = 0,
5782 	PD_ROLE_SOURCE = 1
5783 };
5784 
5785 /*
5786  * Data role.
5787  *
5788  * Note this is also used for PD header creation, and the first two values
5789  * align to those in the Power Delivery Specification Revision 3.0 (See
5790  * 6.2.1.1.6 Port Data Role).
5791  */
5792 enum pd_data_role {
5793 	PD_ROLE_UFP = 0,
5794 	PD_ROLE_DFP = 1,
5795 	PD_ROLE_DISCONNECTED = 2,
5796 };
5797 
5798 enum pd_vconn_role {
5799 	PD_ROLE_VCONN_OFF = 0,
5800 	PD_ROLE_VCONN_SRC = 1,
5801 };
5802 
5803 /*
5804  * Note: BIT(0) may be used to determine whether the polarity is CC1 or CC2,
5805  * regardless of whether a debug accessory is connected.
5806  */
5807 enum tcpc_cc_polarity {
5808 	/*
5809 	 * _CCx: is used to indicate the polarity while not connected to
5810 	 * a Debug Accessory.  Only one CC line will assert a resistor and
5811 	 * the other will be open.
5812 	 */
5813 	POLARITY_CC1 = 0,
5814 	POLARITY_CC2 = 1,
5815 
5816 	/*
5817 	 * _CCx_DTS is used to indicate the polarity while connected to a
5818 	 * SRC Debug Accessory.  Assert resistors on both lines.
5819 	 */
5820 	POLARITY_CC1_DTS = 2,
5821 	POLARITY_CC2_DTS = 3,
5822 
5823 	/*
5824 	 * The current TCPC code relies on these specific POLARITY values.
5825 	 * Adding in a check to verify if the list grows for any reason
5826 	 * that this will give a hint that other places need to be
5827 	 * adjusted.
5828 	 */
5829 	POLARITY_COUNT
5830 };
5831 
5832 #define PD_STATUS_EVENT_SOP_DISC_DONE		BIT(0)
5833 #define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE	BIT(1)
5834 #define PD_STATUS_EVENT_HARD_RESET		BIT(2)
5835 #define PD_STATUS_EVENT_DISCONNECTED		BIT(3)
5836 #define PD_STATUS_EVENT_MUX_0_SET_DONE		BIT(4)
5837 #define PD_STATUS_EVENT_MUX_1_SET_DONE		BIT(5)
5838 
5839 struct ec_params_typec_status {
5840 	uint8_t port;
5841 } __ec_align1;
5842 
5843 struct ec_response_typec_status {
5844 	uint8_t pd_enabled;		/* PD communication enabled - bool */
5845 	uint8_t dev_connected;		/* Device connected - bool */
5846 	uint8_t sop_connected;		/* Device is SOP PD capable - bool */
5847 	uint8_t source_cap_count;	/* Number of Source Cap PDOs */
5848 
5849 	uint8_t power_role;		/* enum pd_power_role */
5850 	uint8_t data_role;		/* enum pd_data_role */
5851 	uint8_t vconn_role;		/* enum pd_vconn_role */
5852 	uint8_t sink_cap_count;		/* Number of Sink Cap PDOs */
5853 
5854 	uint8_t polarity;		/* enum tcpc_cc_polarity */
5855 	uint8_t cc_state;		/* enum pd_cc_states */
5856 	uint8_t dp_pin;			/* DP pin mode (MODE_DP_IN_[A-E]) */
5857 	uint8_t mux_state;		/* USB_PD_MUX* - encoded mux state */
5858 
5859 	char tc_state[32];		/* TC state name */
5860 
5861 	uint32_t events;		/* PD_STATUS_EVENT bitmask */
5862 
5863 	/*
5864 	 * BCD PD revisions for partners
5865 	 *
5866 	 * The format has the PD major reversion in the upper nibble, and PD
5867 	 * minor version in the next nibble.  Following two nibbles are
5868 	 * currently 0.
5869 	 * ex. PD 3.2 would map to 0x3200
5870 	 *
5871 	 * PD major/minor will be 0 if no PD device is connected.
5872 	 */
5873 	uint16_t sop_revision;
5874 	uint16_t sop_prime_revision;
5875 
5876 	uint32_t source_cap_pdos[7];	/* Max 7 PDOs can be present */
5877 
5878 	uint32_t sink_cap_pdos[7];	/* Max 7 PDOs can be present */
5879 } __ec_align1;
5880 
5881 /*****************************************************************************/
5882 /* The command range 0x200-0x2FF is reserved for Rotor. */
5883 
5884 /*****************************************************************************/
5885 /*
5886  * Reserve a range of host commands for the CR51 firmware.
5887  */
5888 #define EC_CMD_CR51_BASE 0x0300
5889 #define EC_CMD_CR51_LAST 0x03FF
5890 
5891 /*****************************************************************************/
5892 /* Fingerprint MCU commands: range 0x0400-0x040x */
5893 
5894 /* Fingerprint SPI sensor passthru command: prototyping ONLY */
5895 #define EC_CMD_FP_PASSTHRU 0x0400
5896 
5897 #define EC_FP_FLAG_NOT_COMPLETE 0x1
5898 
5899 struct ec_params_fp_passthru {
5900 	uint16_t len;		/* Number of bytes to write then read */
5901 	uint16_t flags;		/* EC_FP_FLAG_xxx */
5902 	uint8_t data[];		/* Data to send */
5903 } __ec_align2;
5904 
5905 /* Configure the Fingerprint MCU behavior */
5906 #define EC_CMD_FP_MODE 0x0402
5907 
5908 /* Put the sensor in its lowest power mode */
5909 #define FP_MODE_DEEPSLEEP      BIT(0)
5910 /* Wait to see a finger on the sensor */
5911 #define FP_MODE_FINGER_DOWN    BIT(1)
5912 /* Poll until the finger has left the sensor */
5913 #define FP_MODE_FINGER_UP      BIT(2)
5914 /* Capture the current finger image */
5915 #define FP_MODE_CAPTURE        BIT(3)
5916 /* Finger enrollment session on-going */
5917 #define FP_MODE_ENROLL_SESSION BIT(4)
5918 /* Enroll the current finger image */
5919 #define FP_MODE_ENROLL_IMAGE   BIT(5)
5920 /* Try to match the current finger image */
5921 #define FP_MODE_MATCH          BIT(6)
5922 /* Reset and re-initialize the sensor. */
5923 #define FP_MODE_RESET_SENSOR   BIT(7)
5924 /* special value: don't change anything just read back current mode */
5925 #define FP_MODE_DONT_CHANGE    BIT(31)
5926 
5927 #define FP_VALID_MODES (FP_MODE_DEEPSLEEP      | \
5928 			FP_MODE_FINGER_DOWN    | \
5929 			FP_MODE_FINGER_UP      | \
5930 			FP_MODE_CAPTURE        | \
5931 			FP_MODE_ENROLL_SESSION | \
5932 			FP_MODE_ENROLL_IMAGE   | \
5933 			FP_MODE_MATCH          | \
5934 			FP_MODE_RESET_SENSOR   | \
5935 			FP_MODE_DONT_CHANGE)
5936 
5937 /* Capture types defined in bits [30..28] */
5938 #define FP_MODE_CAPTURE_TYPE_SHIFT 28
5939 #define FP_MODE_CAPTURE_TYPE_MASK  (0x7 << FP_MODE_CAPTURE_TYPE_SHIFT)
5940 /*
5941  * This enum must remain ordered, if you add new values you must ensure that
5942  * FP_CAPTURE_TYPE_MAX is still the last one.
5943  */
5944 enum fp_capture_type {
5945 	/* Full blown vendor-defined capture (produces 'frame_size' bytes) */
5946 	FP_CAPTURE_VENDOR_FORMAT = 0,
5947 	/* Simple raw image capture (produces width x height x bpp bits) */
5948 	FP_CAPTURE_SIMPLE_IMAGE = 1,
5949 	/* Self test pattern (e.g. checkerboard) */
5950 	FP_CAPTURE_PATTERN0 = 2,
5951 	/* Self test pattern (e.g. inverted checkerboard) */
5952 	FP_CAPTURE_PATTERN1 = 3,
5953 	/* Capture for Quality test with fixed contrast */
5954 	FP_CAPTURE_QUALITY_TEST = 4,
5955 	/* Capture for pixel reset value test */
5956 	FP_CAPTURE_RESET_TEST = 5,
5957 	FP_CAPTURE_TYPE_MAX,
5958 };
5959 /* Extracts the capture type from the sensor 'mode' word */
5960 #define FP_CAPTURE_TYPE(mode) (((mode) & FP_MODE_CAPTURE_TYPE_MASK) \
5961 				       >> FP_MODE_CAPTURE_TYPE_SHIFT)
5962 
5963 struct ec_params_fp_mode {
5964 	uint32_t mode; /* as defined by FP_MODE_ constants */
5965 } __ec_align4;
5966 
5967 struct ec_response_fp_mode {
5968 	uint32_t mode; /* as defined by FP_MODE_ constants */
5969 } __ec_align4;
5970 
5971 /* Retrieve Fingerprint sensor information */
5972 #define EC_CMD_FP_INFO 0x0403
5973 
5974 /* Number of dead pixels detected on the last maintenance */
5975 #define FP_ERROR_DEAD_PIXELS(errors) ((errors) & 0x3FF)
5976 /* Unknown number of dead pixels detected on the last maintenance */
5977 #define FP_ERROR_DEAD_PIXELS_UNKNOWN (0x3FF)
5978 /* No interrupt from the sensor */
5979 #define FP_ERROR_NO_IRQ    BIT(12)
5980 /* SPI communication error */
5981 #define FP_ERROR_SPI_COMM  BIT(13)
5982 /* Invalid sensor Hardware ID */
5983 #define FP_ERROR_BAD_HWID  BIT(14)
5984 /* Sensor initialization failed */
5985 #define FP_ERROR_INIT_FAIL BIT(15)
5986 
5987 struct ec_response_fp_info_v0 {
5988 	/* Sensor identification */
5989 	uint32_t vendor_id;
5990 	uint32_t product_id;
5991 	uint32_t model_id;
5992 	uint32_t version;
5993 	/* Image frame characteristics */
5994 	uint32_t frame_size;
5995 	uint32_t pixel_format; /* using V4L2_PIX_FMT_ */
5996 	uint16_t width;
5997 	uint16_t height;
5998 	uint16_t bpp;
5999 	uint16_t errors; /* see FP_ERROR_ flags above */
6000 } __ec_align4;
6001 
6002 struct ec_response_fp_info {
6003 	/* Sensor identification */
6004 	uint32_t vendor_id;
6005 	uint32_t product_id;
6006 	uint32_t model_id;
6007 	uint32_t version;
6008 	/* Image frame characteristics */
6009 	uint32_t frame_size;
6010 	uint32_t pixel_format; /* using V4L2_PIX_FMT_ */
6011 	uint16_t width;
6012 	uint16_t height;
6013 	uint16_t bpp;
6014 	uint16_t errors; /* see FP_ERROR_ flags above */
6015 	/* Template/finger current information */
6016 	uint32_t template_size;  /* max template size in bytes */
6017 	uint16_t template_max;   /* maximum number of fingers/templates */
6018 	uint16_t template_valid; /* number of valid fingers/templates */
6019 	uint32_t template_dirty; /* bitmap of templates with MCU side changes */
6020 	uint32_t template_version; /* version of the template format */
6021 } __ec_align4;
6022 
6023 /* Get the last captured finger frame or a template content */
6024 #define EC_CMD_FP_FRAME 0x0404
6025 
6026 /* constants defining the 'offset' field which also contains the frame index */
6027 #define FP_FRAME_INDEX_SHIFT       28
6028 /* Frame buffer where the captured image is stored */
6029 #define FP_FRAME_INDEX_RAW_IMAGE    0
6030 /* First frame buffer holding a template */
6031 #define FP_FRAME_INDEX_TEMPLATE     1
6032 #define FP_FRAME_GET_BUFFER_INDEX(offset) ((offset) >> FP_FRAME_INDEX_SHIFT)
6033 #define FP_FRAME_OFFSET_MASK       0x0FFFFFFF
6034 
6035 /* Version of the format of the encrypted templates. */
6036 #define FP_TEMPLATE_FORMAT_VERSION 3
6037 
6038 /* Constants for encryption parameters */
6039 #define FP_CONTEXT_NONCE_BYTES 12
6040 #define FP_CONTEXT_USERID_WORDS (32 / sizeof(uint32_t))
6041 #define FP_CONTEXT_TAG_BYTES 16
6042 #define FP_CONTEXT_SALT_BYTES 16
6043 #define FP_CONTEXT_TPM_BYTES 32
6044 
6045 struct ec_fp_template_encryption_metadata {
6046 	/*
6047 	 * Version of the structure format (N=3).
6048 	 */
6049 	uint16_t struct_version;
6050 	/* Reserved bytes, set to 0. */
6051 	uint16_t reserved;
6052 	/*
6053 	 * The salt is *only* ever used for key derivation. The nonce is unique,
6054 	 * a different one is used for every message.
6055 	 */
6056 	uint8_t nonce[FP_CONTEXT_NONCE_BYTES];
6057 	uint8_t salt[FP_CONTEXT_SALT_BYTES];
6058 	uint8_t tag[FP_CONTEXT_TAG_BYTES];
6059 };
6060 
6061 struct ec_params_fp_frame {
6062 	/*
6063 	 * The offset contains the template index or FP_FRAME_INDEX_RAW_IMAGE
6064 	 * in the high nibble, and the real offset within the frame in
6065 	 * FP_FRAME_OFFSET_MASK.
6066 	 */
6067 	uint32_t offset;
6068 	uint32_t size;
6069 } __ec_align4;
6070 
6071 /* Load a template into the MCU */
6072 #define EC_CMD_FP_TEMPLATE 0x0405
6073 
6074 /* Flag in the 'size' field indicating that the full template has been sent */
6075 #define FP_TEMPLATE_COMMIT 0x80000000
6076 
6077 struct ec_params_fp_template {
6078 	uint32_t offset;
6079 	uint32_t size;
6080 	uint8_t data[];
6081 } __ec_align4;
6082 
6083 /* Clear the current fingerprint user context and set a new one */
6084 #define EC_CMD_FP_CONTEXT 0x0406
6085 
6086 struct ec_params_fp_context {
6087 	uint32_t userid[FP_CONTEXT_USERID_WORDS];
6088 } __ec_align4;
6089 
6090 #define EC_CMD_FP_STATS 0x0407
6091 
6092 #define FPSTATS_CAPTURE_INV  BIT(0)
6093 #define FPSTATS_MATCHING_INV BIT(1)
6094 
6095 struct ec_response_fp_stats {
6096 	uint32_t capture_time_us;
6097 	uint32_t matching_time_us;
6098 	uint32_t overall_time_us;
6099 	struct {
6100 		uint32_t lo;
6101 		uint32_t hi;
6102 	} overall_t0;
6103 	uint8_t timestamps_invalid;
6104 	int8_t template_matched;
6105 } __ec_align2;
6106 
6107 #define EC_CMD_FP_SEED 0x0408
6108 struct ec_params_fp_seed {
6109 	/*
6110 	 * Version of the structure format (N=3).
6111 	 */
6112 	uint16_t struct_version;
6113 	/* Reserved bytes, set to 0. */
6114 	uint16_t reserved;
6115 	/* Seed from the TPM. */
6116 	uint8_t seed[FP_CONTEXT_TPM_BYTES];
6117 } __ec_align4;
6118 
6119 #define EC_CMD_FP_ENC_STATUS 0x0409
6120 
6121 /* FP TPM seed has been set or not */
6122 #define FP_ENC_STATUS_SEED_SET BIT(0)
6123 
6124 struct ec_response_fp_encryption_status {
6125 	/* Used bits in encryption engine status */
6126 	uint32_t valid_flags;
6127 	/* Encryption engine status */
6128 	uint32_t status;
6129 } __ec_align4;
6130 
6131 /*****************************************************************************/
6132 /* Touchpad MCU commands: range 0x0500-0x05FF */
6133 
6134 /* Perform touchpad self test */
6135 #define EC_CMD_TP_SELF_TEST 0x0500
6136 
6137 /* Get number of frame types, and the size of each type */
6138 #define EC_CMD_TP_FRAME_INFO 0x0501
6139 
6140 struct ec_response_tp_frame_info {
6141 	uint32_t n_frames;
6142 	uint32_t frame_sizes[];
6143 } __ec_align4;
6144 
6145 /* Create a snapshot of current frame readings */
6146 #define EC_CMD_TP_FRAME_SNAPSHOT 0x0502
6147 
6148 /* Read the frame */
6149 #define EC_CMD_TP_FRAME_GET 0x0503
6150 
6151 struct ec_params_tp_frame_get {
6152 	uint32_t frame_index;
6153 	uint32_t offset;
6154 	uint32_t size;
6155 } __ec_align4;
6156 
6157 /*****************************************************************************/
6158 /* EC-EC communication commands: range 0x0600-0x06FF */
6159 
6160 #define EC_COMM_TEXT_MAX 8
6161 
6162 /*
6163  * Get battery static information, i.e. information that never changes, or
6164  * very infrequently.
6165  */
6166 #define EC_CMD_BATTERY_GET_STATIC 0x0600
6167 
6168 /**
6169  * struct ec_params_battery_static_info - Battery static info parameters
6170  * @index: Battery index.
6171  */
6172 struct ec_params_battery_static_info {
6173 	uint8_t index;
6174 } __ec_align_size1;
6175 
6176 /**
6177  * struct ec_response_battery_static_info - Battery static info response
6178  * @design_capacity: Battery Design Capacity (mAh)
6179  * @design_voltage: Battery Design Voltage (mV)
6180  * @manufacturer: Battery Manufacturer String
6181  * @model: Battery Model Number String
6182  * @serial: Battery Serial Number String
6183  * @type: Battery Type String
6184  * @cycle_count: Battery Cycle Count
6185  */
6186 struct ec_response_battery_static_info {
6187 	uint16_t design_capacity;
6188 	uint16_t design_voltage;
6189 	char manufacturer[EC_COMM_TEXT_MAX];
6190 	char model[EC_COMM_TEXT_MAX];
6191 	char serial[EC_COMM_TEXT_MAX];
6192 	char type[EC_COMM_TEXT_MAX];
6193 	/* TODO(crbug.com/795991): Consider moving to dynamic structure. */
6194 	uint32_t cycle_count;
6195 } __ec_align4;
6196 
6197 /*
6198  * Get battery dynamic information, i.e. information that is likely to change
6199  * every time it is read.
6200  */
6201 #define EC_CMD_BATTERY_GET_DYNAMIC 0x0601
6202 
6203 /**
6204  * struct ec_params_battery_dynamic_info - Battery dynamic info parameters
6205  * @index: Battery index.
6206  */
6207 struct ec_params_battery_dynamic_info {
6208 	uint8_t index;
6209 } __ec_align_size1;
6210 
6211 /**
6212  * struct ec_response_battery_dynamic_info - Battery dynamic info response
6213  * @actual_voltage: Battery voltage (mV)
6214  * @actual_current: Battery current (mA); negative=discharging
6215  * @remaining_capacity: Remaining capacity (mAh)
6216  * @full_capacity: Capacity (mAh, might change occasionally)
6217  * @flags: Flags, see EC_BATT_FLAG_*
6218  * @desired_voltage: Charging voltage desired by battery (mV)
6219  * @desired_current: Charging current desired by battery (mA)
6220  */
6221 struct ec_response_battery_dynamic_info {
6222 	int16_t actual_voltage;
6223 	int16_t actual_current;
6224 	int16_t remaining_capacity;
6225 	int16_t full_capacity;
6226 	int16_t flags;
6227 	int16_t desired_voltage;
6228 	int16_t desired_current;
6229 } __ec_align2;
6230 
6231 /*
6232  * Control charger chip. Used to control charger chip on the slave.
6233  */
6234 #define EC_CMD_CHARGER_CONTROL 0x0602
6235 
6236 /**
6237  * struct ec_params_charger_control - Charger control parameters
6238  * @max_current: Charger current (mA). Positive to allow base to draw up to
6239  *     max_current and (possibly) charge battery, negative to request current
6240  *     from base (OTG).
6241  * @otg_voltage: Voltage (mV) to use in OTG mode, ignored if max_current is
6242  *     >= 0.
6243  * @allow_charging: Allow base battery charging (only makes sense if
6244  *     max_current > 0).
6245  */
6246 struct ec_params_charger_control {
6247 	int16_t max_current;
6248 	uint16_t otg_voltage;
6249 	uint8_t allow_charging;
6250 } __ec_align_size1;
6251 
6252 /* Get ACK from the USB-C SS muxes */
6253 #define EC_CMD_USB_PD_MUX_ACK 0x0603
6254 
6255 struct ec_params_usb_pd_mux_ack {
6256 	uint8_t port; /* USB-C port number */
6257 } __ec_align1;
6258 
6259 /*****************************************************************************/
6260 /*
6261  * Reserve a range of host commands for board-specific, experimental, or
6262  * special purpose features. These can be (re)used without updating this file.
6263  *
6264  * CAUTION: Don't go nuts with this. Shipping products should document ALL
6265  * their EC commands for easier development, testing, debugging, and support.
6266  *
6267  * All commands MUST be #defined to be 4-digit UPPER CASE hex values
6268  * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work.
6269  *
6270  * In your experimental code, you may want to do something like this:
6271  *
6272  *   #define EC_CMD_MAGIC_FOO 0x0000
6273  *   #define EC_CMD_MAGIC_BAR 0x0001
6274  *   #define EC_CMD_MAGIC_HEY 0x0002
6275  *
6276  *   DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler,
6277  *      EC_VER_MASK(0);
6278  *
6279  *   DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler,
6280  *      EC_VER_MASK(0);
6281  *
6282  *   DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler,
6283  *      EC_VER_MASK(0);
6284  */
6285 #define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00
6286 #define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF
6287 
6288 /*
6289  * Given the private host command offset, calculate the true private host
6290  * command value.
6291  */
6292 #define EC_PRIVATE_HOST_COMMAND_VALUE(command) \
6293 	(EC_CMD_BOARD_SPECIFIC_BASE + (command))
6294 
6295 /*****************************************************************************/
6296 /*
6297  * Passthru commands
6298  *
6299  * Some platforms have sub-processors chained to each other.  For example.
6300  *
6301  *     AP <--> EC <--> PD MCU
6302  *
6303  * The top 2 bits of the command number are used to indicate which device the
6304  * command is intended for.  Device 0 is always the device receiving the
6305  * command; other device mapping is board-specific.
6306  *
6307  * When a device receives a command to be passed to a sub-processor, it passes
6308  * it on with the device number set back to 0.  This allows the sub-processor
6309  * to remain blissfully unaware of whether the command originated on the next
6310  * device up the chain, or was passed through from the AP.
6311  *
6312  * In the above example, if the AP wants to send command 0x0002 to the PD MCU,
6313  *     AP sends command 0x4002 to the EC
6314  *     EC sends command 0x0002 to the PD MCU
6315  *     EC forwards PD MCU response back to the AP
6316  */
6317 
6318 /* Offset and max command number for sub-device n */
6319 #define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n))
6320 #define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff)
6321 
6322 /*****************************************************************************/
6323 /*
6324  * Deprecated constants. These constants have been renamed for clarity. The
6325  * meaning and size has not changed. Programs that use the old names should
6326  * switch to the new names soon, as the old names may not be carried forward
6327  * forever.
6328  */
6329 #define EC_HOST_PARAM_SIZE      EC_PROTO2_MAX_PARAM_SIZE
6330 #define EC_LPC_ADDR_OLD_PARAM   EC_HOST_CMD_REGION1
6331 #define EC_OLD_PARAM_SIZE       EC_HOST_CMD_REGION_SIZE
6332 
6333 
6334 
6335 #endif  /* __CROS_EC_COMMANDS_H */
6336