Searched refs:DWB_OGAM_CONTROL (Results 1 – 3 of 3) sorted by relevance
| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_dwb_cm.c | 153 REG_GET_2(DWB_OGAM_CONTROL, in dwb3_get_ogam_current()
242 REG_SET(DWB_OGAM_CONTROL, 0, DWB_OGAM_MODE, 0); in dwb3_program_ogam_lut()
246 REG_SET(DWB_OGAM_CONTROL, 0, DWB_OGAM_MODE, 2); in dwb3_program_ogam_lut()
264 REG_UPDATE(DWB_OGAM_CONTROL, DWB_OGAM_SELECT, next_mode == LUT_RAM_A ? 0 : 1); in dwb3_program_ogam_lut()
|
| D | dcn30_dwb.h | 79 SR(DWB_OGAM_CONTROL),\
226 SF_DWB2(DWB_OGAM_CONTROL, DWBCP, 0, DWB_OGAM_MODE, mask_sh),\
227 SF_DWB2(DWB_OGAM_CONTROL, DWBCP, 0, DWB_OGAM_SELECT, mask_sh),\
228 SF_DWB2(DWB_OGAM_CONTROL, DWBCP, 0, DWB_OGAM_PWL_DISABLE, mask_sh),\
229 SF_DWB2(DWB_OGAM_CONTROL, DWBCP, 0, DWB_OGAM_MODE_CURRENT, mask_sh),\
230 SF_DWB2(DWB_OGAM_CONTROL, DWBCP, 0, DWB_OGAM_SELECT_CURRENT, mask_sh),\
784 uint32_t DWB_OGAM_CONTROL; member
|
| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn32/ |
| D | dcn32_resource.h | 584 SR_ARR(DWB_GAMUT_REMAPB_C33_C34, id), SR_ARR(DWB_OGAM_CONTROL, id), \
|