Searched refs:DPU_IRQ_MASK (Results 1 – 1 of 1) sorted by relevance
145 #define DPU_IRQ_MASK(irq_idx) (BIT(irq_idx % 32)) macro254 if (cache_irq_mask & DPU_IRQ_MASK(irq_idx)) { in dpu_hw_intr_enable_irq_locked()259 cache_irq_mask |= DPU_IRQ_MASK(irq_idx); in dpu_hw_intr_enable_irq_locked()261 DPU_REG_WRITE(&intr->hw, reg->clr_off, DPU_IRQ_MASK(irq_idx)); in dpu_hw_intr_enable_irq_locked()272 DPU_IRQ_MASK(irq_idx), cache_irq_mask); in dpu_hw_intr_enable_irq_locked()303 if ((cache_irq_mask & DPU_IRQ_MASK(irq_idx)) == 0) { in dpu_hw_intr_disable_irq_locked()308 cache_irq_mask &= ~DPU_IRQ_MASK(irq_idx); in dpu_hw_intr_disable_irq_locked()312 DPU_REG_WRITE(&intr->hw, reg->clr_off, DPU_IRQ_MASK(irq_idx)); in dpu_hw_intr_disable_irq_locked()321 DPU_IRQ_MASK(irq_idx), cache_irq_mask); in dpu_hw_intr_disable_irq_locked()388 DPU_IRQ_MASK(irq_idx); in dpu_core_irq_read()