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Searched refs:DPPCLK (Results 1 – 18 of 18) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn301/
Ddcn301_dccg.h33 DCCG_SRII(DTO_PARAM, DPPCLK, 0),\
34 DCCG_SRII(DTO_PARAM, DPPCLK, 1),\
35 DCCG_SRII(DTO_PARAM, DPPCLK, 2),\
36 DCCG_SRII(DTO_PARAM, DPPCLK, 3),\
40 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 0, mask_sh),\
41 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 0, mask_sh),\
42 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 1, mask_sh),\
43 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 1, mask_sh),\
44 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 2, mask_sh),\
45 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 2, mask_sh),\
[all …]
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dccg.h33 DCCG_SRII(DTO_PARAM, DPPCLK, 0),\
34 DCCG_SRII(DTO_PARAM, DPPCLK, 1),\
35 DCCG_SRII(DTO_PARAM, DPPCLK, 2),\
36 DCCG_SRII(DTO_PARAM, DPPCLK, 3),\
44 DCCG_SRII(DTO_PARAM, DPPCLK, 4),\
45 DCCG_SRII(DTO_PARAM, DPPCLK, 5),\
61 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 0, mask_sh),\
62 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 0, mask_sh),\
63 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 1, mask_sh),\
64 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 1, mask_sh),\
[all …]
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn303/
Ddcn303_dccg.h16 DCCG_SRII(DTO_PARAM, DPPCLK, 0),\
17 DCCG_SRII(DTO_PARAM, DPPCLK, 1),\
25 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 0, mask_sh),\
26 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 0, mask_sh),\
27 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 1, mask_sh),\
28 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 1, mask_sh),\
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn32/
Ddcn32_dccg.h37 DCCG_SRII(DTO_PARAM, DPPCLK, 0),\
38 DCCG_SRII(DTO_PARAM, DPPCLK, 1),\
39 DCCG_SRII(DTO_PARAM, DPPCLK, 2),\
40 DCCG_SRII(DTO_PARAM, DPPCLK, 3),\
71 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 0, mask_sh),\
72 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 0, mask_sh),\
73 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 1, mask_sh),\
74 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 1, mask_sh),\
75 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 2, mask_sh),\
76 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 2, mask_sh),\
[all …]
Ddcn32_resource.h1254 SR(DPPCLK_DTO_CTRL), DCCG_SRII(DTO_PARAM, DPPCLK, 0), \
1255 DCCG_SRII(DTO_PARAM, DPPCLK, 1), DCCG_SRII(DTO_PARAM, DPPCLK, 2), \
1256 DCCG_SRII(DTO_PARAM, DPPCLK, 3), DCCG_SRII(CLOCK_CNTL, HDMICHARCLK, 0), \
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn314/
Ddcn314_dccg.h38 DCCG_SRII(DTO_PARAM, DPPCLK, 0),\
39 DCCG_SRII(DTO_PARAM, DPPCLK, 1),\
40 DCCG_SRII(DTO_PARAM, DPPCLK, 2),\
41 DCCG_SRII(DTO_PARAM, DPPCLK, 3),\
80 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 0, mask_sh),\
81 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 1, mask_sh),\
82 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 2, mask_sh),\
83 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 3, mask_sh),\
163 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 0, mask_sh),\
164 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 1, mask_sh),\
[all …]
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_dccg.h33 DCCG_SRII(DTO_PARAM, DPPCLK, 0),\
34 DCCG_SRII(DTO_PARAM, DPPCLK, 1),\
35 DCCG_SRII(DTO_PARAM, DPPCLK, 2),\
36 DCCG_SRII(DTO_PARAM, DPPCLK, 3),\
71 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 0, mask_sh),\
72 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 0, mask_sh),\
73 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 1, mask_sh),\
74 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 1, mask_sh),\
75 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 2, mask_sh),\
76 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 2, mask_sh),\
[all …]
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn302/
Ddcn302_dccg.h34 DCCG_SRII(DTO_PARAM, DPPCLK, 4)
38 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 4, mask_sh),\
39 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 4, mask_sh)
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddisplay_mode_vba_30.c45 double DPPCLK; member
282 double DPPCLK,
321 double DPPCLK[],
370 double DPPCLK[],
417 double DPPCLK[],
921 myPipe->DPPCLK, in CalculatePrefetchSchedule()
972 if (myPipe->DPPCLK == 0.0 || myPipe->DISPCLK == 0.0) in CalculatePrefetchSchedule()
975 …*DSTXAfterScaler = DPPCycles * myPipe->PixelClock / myPipe->DPPCLK + DISPCLKCycles * myPipe->Pixel… in CalculatePrefetchSchedule()
2024 v->DPPCLK[k] = v->DPPCLK_calculated[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2100 v->DPPCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
[all …]
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_mode_vba_21.c42 double DPPCLK; member
312 double DPPCLK[],
354 double DPPCLK[],
398 double DPPCLK[],
737 if (myPipe->DPPCLK == 0.0 || myPipe->DISPCLK == 0.0) in CalculatePrefetchSchedule()
740 *DSTXAfterScaler = DPPCycles * myPipe->PixelClock / myPipe->DPPCLK in CalculatePrefetchSchedule()
756 TotalRepeaterDelayTime = MaxInterDCNTileRepeaters * (2.0 / myPipe->DPPCLK + 3.0 / myPipe->DISPCLK); in CalculatePrefetchSchedule()
757 …*VUpdateWidthPix = (14.0 / myPipe->DCFCLKDeepSleep + 12.0 / myPipe->DPPCLK + TotalRepeaterDelayTim… in CalculatePrefetchSchedule()
761 150.0 / myPipe->DPPCLK, in CalculatePrefetchSchedule()
762 TotalRepeaterDelayTime + 20.0 / myPipe->DCFCLKDeepSleep + 10.0 / myPipe->DPPCLK) in CalculatePrefetchSchedule()
[all …]
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn31/
Ddisplay_mode_vba_31.c64 double DPPCLK; member
275 double DPPCLK,
334 double DPPCLK[],
380 double DPPCLK[],
925 myPipe->DPPCLK,
989 if (myPipe->DPPCLK == 0.0 || myPipe->DISPCLK == 0.0)
992 …*DSTXAfterScaler = DPPCycles * myPipe->PixelClock / myPipe->DPPCLK + DISPCLKCycles * myPipe->Pixel…
997 dml_print("DML::%s: DPPCLK: %f\n", __func__, myPipe->DPPCLK);
2151 v->DPPCLK[k] = v->DPPCLK_calculated[k];
2227 v->DPPCLK,
[all …]
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn314/
Ddisplay_mode_vba_314.c65 double DPPCLK; member
287 double DPPCLK,
346 double DPPCLK[],
392 double DPPCLK[],
947 myPipe->DPPCLK,
1011 if (myPipe->DPPCLK == 0.0 || myPipe->DISPCLK == 0.0)
1014 …*DSTXAfterScaler = DPPCycles * myPipe->PixelClock / myPipe->DPPCLK + DISPCLKCycles * myPipe->Pixel…
1019 dml_print("DML::%s: DPPCLK: %f\n", __func__, myPipe->DPPCLK);
2173 v->DPPCLK[k] = v->DPPCLK_calculated[k];
2249 v->DPPCLK,
[all …]
/linux-6.1.9/Documentation/gpu/amdgpu/display/
Ddc-glossary.rst38 * DPPCLK: DPP Clock
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_mode_vba_20v2.c64 double DPPCLK,
93 double DPPCLK,
471 double DPPCLK, in CalculateDelayAfterScaler() argument
520 if (DPPCLK == 0.0 || DISPCLK == 0.0) in CalculateDelayAfterScaler()
523 *DSTXAfterScaler = DPPCycles * PixelClock / DPPCLK + DISPCLKCycles * PixelClock / DISPCLK in CalculateDelayAfterScaler()
543 double DPPCLK, in CalculatePrefetchSchedule() argument
610 TotalRepeaterDelayTime = MaxInterDCNTileRepeaters * (2.0 / DPPCLK + 3.0 / DISPCLK); in CalculatePrefetchSchedule()
611 *VUpdateWidthPix = (14.0 / DCFCLKDeepSleep + 12.0 / DPPCLK + TotalRepeaterDelayTime) in CalculatePrefetchSchedule()
615 150.0 / DPPCLK, in CalculatePrefetchSchedule()
616 TotalRepeaterDelayTime + 20.0 / DCFCLKDeepSleep + 10.0 / DPPCLK) in CalculatePrefetchSchedule()
[all …]
Ddisplay_mode_vba_20.c58 double DPPCLK,
441 double DPPCLK, in CalculatePrefetchSchedule() argument
528 if (DPPCLK == 0.0 || DISPCLK == 0.0) in CalculatePrefetchSchedule()
531 *DSTXAfterScaler = DPPCycles * PixelClock / DPPCLK + DISPCLKCycles * PixelClock / DISPCLK in CalculatePrefetchSchedule()
547 TotalRepeaterDelayTime = MaxInterDCNTileRepeaters * (2.0 / DPPCLK + 3.0 / DISPCLK); in CalculatePrefetchSchedule()
548 *VUpdateWidthPix = (14.0 / DCFCLKDeepSleep + 12.0 / DPPCLK + TotalRepeaterDelayTime) in CalculatePrefetchSchedule()
552 150.0 / DPPCLK, in CalculatePrefetchSchedule()
553 TotalRepeaterDelayTime + 20.0 / DCFCLKDeepSleep + 10.0 / DPPCLK) in CalculatePrefetchSchedule()
1433 / mode_lib->vba.DPPCLK[k]; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1457 / mode_lib->vba.DPPCLK[k]; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
[all …]
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/
Ddisplay_mode_vba.c701 mode_lib->vba.DPPCLK[mode_lib->vba.NumberOfActivePlanes] = clks->dppclk_mhz; in fetch_pipe_params()
1099 mode_lib->vba.DPPCLK[k] = mode_lib->vba.cache_pipes[pipe_idx].clks_cfg.dppclk_mhz; in ModeSupportAndSystemConfiguration()
1101 mode_lib->vba.DPPCLK[k] = soc->clock_limits[mode_lib->vba.VoltageLevel].dppclk_mhz; in ModeSupportAndSystemConfiguration()
Ddisplay_mode_vba.h940 double DPPCLK[DC__NUM_DPP__MAX]; member
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn32/
Ddisplay_mode_vba_32.c139 &v->GlobalDPPCLK, v->DPPCLK); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
142 v->DPPCLK_calculated[k] = v->DPPCLK[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
327 mode_lib->vba.DPPCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
760 …SleepPrefetchParametersWatermarksAndPerformanceCalculation.myPipe.Dppclk = mode_lib->vba.DPPCLK[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1253 mode_lib->vba.DPPCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()