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Searched refs:DPLL_VCO_ENABLE (Results 1 – 15 of 15) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/gma500/
Doaktrail_crtc.c245 if ((temp & DPLL_VCO_ENABLE) == 0) { in oaktrail_crtc_dpms()
251 temp | DPLL_VCO_ENABLE, i); in oaktrail_crtc_dpms()
256 temp | DPLL_VCO_ENABLE, i); in oaktrail_crtc_dpms()
317 if ((temp & DPLL_VCO_ENABLE) != 0) { in oaktrail_crtc_dpms()
319 temp & ~DPLL_VCO_ENABLE, i); in oaktrail_crtc_dpms()
529 dpll |= DPLL_VCO_ENABLE; in oaktrail_crtc_mode_set()
553 dpll |= DPLL_VCO_ENABLE; in oaktrail_crtc_mode_set()
555 if (dpll & DPLL_VCO_ENABLE) { in oaktrail_crtc_mode_set()
558 REG_WRITE_WITH_AUX(map->dpll, dpll & ~DPLL_VCO_ENABLE, i); in oaktrail_crtc_mode_set()
Dgma_display.c222 if ((temp & DPLL_VCO_ENABLE) == 0) { in gma_crtc_dpms()
227 REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE); in gma_crtc_dpms()
231 REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE); in gma_crtc_dpms()
310 if ((temp & DPLL_VCO_ENABLE) != 0) { in gma_crtc_dpms()
311 REG_WRITE(map->dpll, temp & ~DPLL_VCO_ENABLE); in gma_crtc_dpms()
631 if (crtc_state->saveDPLL & DPLL_VCO_ENABLE) { in gma_crtc_restore()
633 crtc_state->saveDPLL & ~DPLL_VCO_ENABLE); in gma_crtc_restore()
Dpsb_intel_display.c206 dpll |= DPLL_VCO_ENABLE; in psb_intel_crtc_mode_set()
215 if (dpll & DPLL_VCO_ENABLE) { in psb_intel_crtc_mode_set()
217 REG_WRITE(map->dpll, dpll & ~DPLL_VCO_ENABLE); in psb_intel_crtc_mode_set()
Dcdv_intel_display.c757 dpll |= DPLL_VCO_ENABLE; in cdv_intel_crtc_mode_set()
767 (REG_READ(map->dpll) & ~DPLL_LOCK) | DPLL_VCO_ENABLE); in cdv_intel_crtc_mode_set()
Dpsb_intel_reg.h229 #define DPLL_VCO_ENABLE (1 << 31) macro
/linux-6.1.9/drivers/gpu/drm/i915/display/
Dintel_dpll.c872 dpll |= DPLL_VCO_ENABLE; in i9xx_compute_dpll()
929 dpll |= DPLL_VCO_ENABLE; in i8xx_compute_dpll()
1106 dpll |= DPLL_VCO_ENABLE; in ilk_compute_dpll()
1190 crtc_state->dpll_hw_state.dpll |= DPLL_VCO_ENABLE | in vlv_compute_dpll()
1208 crtc_state->dpll_hw_state.dpll |= DPLL_VCO_ENABLE; in chv_compute_dpll()
1742 ~(DPLL_VCO_ENABLE | DPLL_EXT_BUFFER_ENABLE_VLV)); in vlv_enable_pll()
1744 if (crtc_state->dpll_hw_state.dpll & DPLL_VCO_ENABLE) { in vlv_enable_pll()
1893 crtc_state->dpll_hw_state.dpll & ~DPLL_VCO_ENABLE); in chv_enable_pll()
1895 if (crtc_state->dpll_hw_state.dpll & DPLL_VCO_ENABLE) { in chv_enable_pll()
2047 cur_state = intel_de_read(dev_priv, DPLL(pipe)) & DPLL_VCO_ENABLE; in assert_pll()
Dintel_pch_refclk.c538 if (!(temp & DPLL_VCO_ENABLE)) in ilk_init_pch_refclk()
Dintel_pps.c84 pll_enabled = intel_de_read(dev_priv, DPLL(pipe)) & DPLL_VCO_ENABLE; in vlv_power_sequencer_kick()
Dintel_display_power_well.c1352 (intel_de_read(dev_priv, DPLL(PIPE_B)) & DPLL_VCO_ENABLE) == 0) in assert_chv_phy_status()
Dintel_display.c3132 if ((pipe_config->dpll_hw_state.dpll & DPLL_VCO_ENABLE) == 0) in vlv_crtc_clock_get()
3160 if ((pipe_config->dpll_hw_state.dpll & DPLL_VCO_ENABLE) == 0) in chv_crtc_clock_get()
8846 DPLL_VCO_ENABLE; in i830_enable_pipe()
Dintel_dpll_mgr.c468 return val & DPLL_VCO_ENABLE; in ibx_pch_dpll_get_hw_state()
/linux-6.1.9/drivers/video/fbdev/intelfb/
Dintelfbhw.h149 #define DPLL_VCO_ENABLE (1 << 31) macro
Dintelfbhw.c1106 *dpll |= (DPLL_VCO_ENABLE | DPLL_VGA_MODE_DISABLE); in intelfbhw_mode_to_hw()
1397 tmp &= ~DPLL_VCO_ENABLE; in intelfbhw_program_mode()
Dintelfbdrv.c1341 OUTREG(DPLL_A, INREG(DPLL_A) & ~DPLL_VCO_ENABLE); in intelfb_set_par()
/linux-6.1.9/drivers/gpu/drm/i915/
Di915_reg.h1487 #define DPLL_VCO_ENABLE (1 << 31) macro