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Searched refs:DP5_DP_SEC_CNTL1__DP_SEC_GSP0_SEND__SHIFT (Results 1 – 4 of 4) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_sh_mask.h38036 #define DP5_DP_SEC_CNTL1__DP_SEC_GSP0_SEND__SHIFT macro
Ddcn_2_0_0_sh_mask.h48104 #define DP5_DP_SEC_CNTL1__DP_SEC_GSP0_SEND__SHIFT macro
Ddcn_3_0_0_sh_mask.h48340 #define DP5_DP_SEC_CNTL1__DP_SEC_GSP0_SEND__SHIFT macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_sh_mask.h43821 #define DP5_DP_SEC_CNTL1__DP_SEC_GSP0_SEND__SHIFT macro