Searched refs:DMA_3CLKS (Results 1 – 3 of 3) sorted by relevance
65 #define DMA_3CLKS 0x00400000 /* Each transfer = 3 clock ticks */ macro66 #define DMA_EN_ENETAUI DMA_3CLKS /* Put lance into AUI-cable mode */
174 #define DMA_3CLKS 0x00400000 /* Each transfer = 3 clock ticks */ macro175 #define DMA_EN_ENETAUI DMA_3CLKS /* Put lance into AUI-cable mode */234 if(dma->revision>dvmarev1) regs->cond_reg |= DMA_3CLKS; \
284 dma_write32(val | DMA_3CLKS, DMA_CSR); in sbus_esp_reset_dma()290 val &= ~DMA_3CLKS; in sbus_esp_reset_dma()