| /linux-6.1.9/arch/sh/kernel/cpu/sh2a/ |
| D | clock-sh7264.c | 75 DIV4_NR }; enumerator
81 struct clk div4_clks[DIV4_NR] = {
151 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in arch_clk_init()
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| D | clock-sh7269.c | 103 DIV4_NR }; enumerator
109 struct clk div4_clks[DIV4_NR] = {
175 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in arch_clk_init()
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| /linux-6.1.9/arch/sh/kernel/cpu/sh4a/ |
| D | clock-sh7722.c | 111 enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, DIV4_NR }; enumerator
113 struct clk div4_clks[DIV4_NR] = {
236 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in arch_clk_init()
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| D | clock-sh7757.c | 60 enum { DIV4_I, DIV4_SH, DIV4_P, DIV4_NR }; enumerator
65 struct clk div4_clks[DIV4_NR] = {
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| D | clock-shx3.c | 59 enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_DDR, DIV4_SHA, DIV4_P, DIV4_NR }; enumerator
64 struct clk div4_clks[DIV4_NR] = {
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| D | clock-sh7366.c | 106 DIV4_SIUA, DIV4_SIUB, DIV4_NR }; enumerator
111 struct clk div4_clks[DIV4_NR] = {
261 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in arch_clk_init()
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| D | clock-sh7785.c | 64 DIV4_DU, DIV4_P, DIV4_NR }; enumerator
69 struct clk div4_clks[DIV4_NR] = {
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| D | clock-sh7723.c | 109 enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, DIV4_NR }; enumerator
114 struct clk div4_clks[DIV4_NR] = {
284 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in arch_clk_init()
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| D | clock-sh7343.c | 103 DIV4_SIUA, DIV4_SIUB, DIV4_NR }; enumerator
108 struct clk div4_clks[DIV4_NR] = {
268 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in arch_clk_init()
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| D | clock-sh7786.c | 65 enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_DDR, DIV4_DU, DIV4_P, DIV4_NR }; enumerator
70 struct clk div4_clks[DIV4_NR] = {
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| D | clock-sh7724.c | 148 enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_P, DIV4_M1, DIV4_NR }; enumerator
153 struct clk div4_clks[DIV4_NR] = {
358 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in arch_clk_init()
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| D | clock-sh7734.c | 67 enum { DIV4_I, DIV4_S, DIV4_B, DIV4_M, DIV4_S1, DIV4_P, DIV4_NR }; enumerator
72 struct clk div4_clks[DIV4_NR] = {
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