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Searched refs:DISP_INTERRUPT_STATUS_CONTINUE15__HUBP4_PERFMON_COUNTER1_INTERRUPT_MASK (Results 1 – 10 of 10) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h2989 #define DISP_INTERRUPT_STATUS_CONTINUE15__HUBP4_PERFMON_COUNTER1_INTERRUPT_MASK … macro
Ddcn_1_0_sh_mask.h5450 #define DISP_INTERRUPT_STATUS_CONTINUE15__HUBP4_PERFMON_COUNTER1_INTERRUPT_MASK … macro
Ddcn_2_1_0_sh_mask.h4183 #define DISP_INTERRUPT_STATUS_CONTINUE15__HUBP4_PERFMON_COUNTER1_INTERRUPT_MASK … macro
Ddcn_3_0_1_sh_mask.h4354 #define DISP_INTERRUPT_STATUS_CONTINUE15__HUBP4_PERFMON_COUNTER1_INTERRUPT_MASK … macro
Ddcn_3_1_2_sh_mask.h4114 #define DISP_INTERRUPT_STATUS_CONTINUE15__HUBP4_PERFMON_COUNTER1_INTERRUPT_MASK … macro
Ddcn_3_0_2_sh_mask.h4321 #define DISP_INTERRUPT_STATUS_CONTINUE15__HUBP4_PERFMON_COUNTER1_INTERRUPT_MASK … macro
Ddcn_3_1_4_sh_mask.h12480 #define DISP_INTERRUPT_STATUS_CONTINUE15__HUBP4_PERFMON_COUNTER1_INTERRUPT_MASK … macro
Ddcn_3_1_6_sh_mask.h4683 #define DISP_INTERRUPT_STATUS_CONTINUE15__HUBP4_PERFMON_COUNTER1_INTERRUPT_MASK … macro
Ddcn_2_0_0_sh_mask.h4449 #define DISP_INTERRUPT_STATUS_CONTINUE15__HUBP4_PERFMON_COUNTER1_INTERRUPT_MASK … macro
Ddcn_3_0_0_sh_mask.h4424 #define DISP_INTERRUPT_STATUS_CONTINUE15__HUBP4_PERFMON_COUNTER1_INTERRUPT_MASK … macro