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Searched refs:DEV_CLOCK_CFG (Results 1 – 9 of 9) sorted by relevance

/linux-6.1.9/drivers/net/ethernet/microchip/lan966x/
Dlan966x_port.c56 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_link_down()
122 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_link_down()
132 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_link_down()
261 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_link_up()
390 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_pcs_set()
420 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_port_init()
Dlan966x_phylink.c83 lan966x, DEV_CLOCK_CFG(port->chip_port)); in lan966x_phylink_mac_link_down()
Dlan966x_regs.h517 #define DEV_CLOCK_CFG(t) __REG(TARGET_DEV, t, 8, 0, 0, 1, 28, 0, 0, 1, 4) macro
/linux-6.1.9/drivers/net/ethernet/mscc/
Dvsc7514_regs.c331 REG(DEV_CLOCK_CFG, 0x0),
Docelot.c811 DEV_CLOCK_CFG); in ocelot_phylink_mac_link_down()
856 DEV_CLOCK_CFG); in ocelot_phylink_mac_link_up()
Docelot_net.c1776 DEV_CLOCK_CFG); in ocelot_port_phylink_create()
/linux-6.1.9/drivers/net/dsa/ocelot/
Dseville_vsc9953.c406 REG(DEV_CLOCK_CFG, 0x0),
Dfelix_vsc9959.c424 REG(DEV_CLOCK_CFG, 0x0),
/linux-6.1.9/include/soc/mscc/
Docelot.h463 DEV_CLOCK_CFG = DEV_GMII << TARGET_OFFSET, enumerator