Searched refs:DDR40_PHY_CONTROL_REGS_0_STANDBY_CTRL (Results 1 – 2 of 2) sorted by relevance
203 DDR40_PHY_CONTROL_REGS_0_STANDBY_CTRL); in brcmstb_pm_s3()207 DDR40_PHY_CONTROL_REGS_0_STANDBY_CTRL); in brcmstb_pm_s3()210 DDR40_PHY_CONTROL_REGS_0_STANDBY_CTRL); in brcmstb_pm_s3()
22 #define DDR40_PHY_CONTROL_REGS_0_STANDBY_CTRL 0xa4 macro