Searched refs:DCORE_HMMU_OFFSET (Results 1 – 3 of 3) sorted by relevance
172 #define DCORE_HMMU_OFFSET (mmDCORE0_HMMU1_MMU_BASE - mmDCORE0_HMMU0_MMU_BASE) macro
3177 hmmu_id * DCORE_HMMU_OFFSET; in gaudi2_init_mmu_range_registers()3235 NUM_OF_HMMU_PER_DCORE, DCORE_HMMU_OFFSET, in gaudi2_init_protection_bits()3615 NUM_OF_HMMU_PER_DCORE, DCORE_HMMU_OFFSET, in gaudi2_ack_protection_bits_errors()
4867 offset = (u32) (dcore_id * DCORE_OFFSET + hmmu_id * DCORE_HMMU_OFFSET); in get_hmmu_stlb_base()5171 offset = (u32) (dcore_id * DCORE_OFFSET + hmmu_id * DCORE_HMMU_OFFSET); in gaudi2_dcore_hmmu_init()8187 mmu_base = mmDCORE0_HMMU0_MMU_BASE + index * DCORE_HMMU_OFFSET; in gaudi2_handle_mmu_spi_sei_err()8192 mmu_base = mmDCORE0_HMMU0_MMU_BASE + index * DCORE_HMMU_OFFSET; in gaudi2_handle_mmu_spi_sei_err()8197 mmu_base = mmDCORE1_HMMU0_MMU_BASE + index * DCORE_HMMU_OFFSET; in gaudi2_handle_mmu_spi_sei_err()8202 mmu_base = mmDCORE1_HMMU0_MMU_BASE + index * DCORE_HMMU_OFFSET; in gaudi2_handle_mmu_spi_sei_err()8207 mmu_base = mmDCORE2_HMMU0_MMU_BASE + index * DCORE_HMMU_OFFSET; in gaudi2_handle_mmu_spi_sei_err()8212 mmu_base = mmDCORE2_HMMU0_MMU_BASE + index * DCORE_HMMU_OFFSET; in gaudi2_handle_mmu_spi_sei_err()8217 mmu_base = mmDCORE3_HMMU0_MMU_BASE + index * DCORE_HMMU_OFFSET; in gaudi2_handle_mmu_spi_sei_err()8222 mmu_base = mmDCORE3_HMMU0_MMU_BASE + index * DCORE_HMMU_OFFSET; in gaudi2_handle_mmu_spi_sei_err()