Searched refs:CTL0 (Results 1 – 3 of 3) sorted by relevance
| /linux-6.1.9/drivers/dma/ |
| D | pch_dma.c | 210 val = dma_readl(pd, CTL0); in pdc_set_dir()
225 dma_writel(pd, CTL0, val); in pdc_set_dir()
261 val = dma_readl(pd, CTL0); in pdc_set_mode()
265 dma_writel(pd, CTL0, val); in pdc_set_mode()
744 pd->regs.dma_ctl0 = dma_readl(pd, CTL0); in pch_dma_save_regs()
767 dma_writel(pd, CTL0, pd->regs.dma_ctl0); in pch_dma_restore_regs()
|
| /linux-6.1.9/Documentation/devicetree/bindings/display/ |
| D | lvds.yaml | 77 CTL0: HSync
|
| /linux-6.1.9/drivers/soc/mediatek/ |
| D | mtk-svs.c | 232 CTL0, enumerator
290 [CTL0] = 0xc88,
1124 svs_writel_relaxed(svsp, svsb->ctl0, CTL0); in svs_set_bank_phase()
|