Searched refs:CSR1 (Results 1 – 13 of 13) sorted by relevance
/linux-6.1.9/drivers/media/pci/dt3155/ |
D | dt3155.c | 165 pd->regs + CSR1); in dt3155_start_streaming() 185 FLD_DN_ODD | FLD_DN_EVEN, pd->regs + CSR1); in dt3155_stop_streaming() 250 tmp = ioread32(ipd->regs + CSR1) & (FLD_CRPT_EVEN | FLD_CRPT_ODD); in dt3155_irq_handler_even() 255 ipd->regs + CSR1); in dt3155_irq_handler_even() 419 FLD_DN_ODD | FLD_DN_EVEN, pd->regs + CSR1); in dt3155_init_board() 423 iowrite32(FIFO_EN | SRST, pd->regs + CSR1); in dt3155_init_board()
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D | dt3155.h | 36 #define CSR1 0x40 macro
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/linux-6.1.9/drivers/net/ethernet/dec/tulip/ |
D | tulip.h | 107 CSR1 = 0x08, enumerator 564 iowrite32(0, ioaddr + CSR1); in tulip_tx_timeout_complete()
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D | xircom_cb.c | 49 #define CSR1 0x08 macro 539 xw32(CSR1, 0); in trigger_transmit()
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D | interrupt.c | 688 iowrite32(0, ioaddr + CSR1); in tulip_interrupt()
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D | tulip_core.c | 694 iowrite32(0, tp->base_addr + CSR1); in tulip_start_xmit() 1171 iowrite32(0, ioaddr + CSR1); in set_rx_mode()
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/linux-6.1.9/drivers/net/ethernet/amd/ |
D | ariadne.h | 63 #define CSR1 0x0100 /* - IADR[15:0] */ macro
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D | sun3lance.c | 204 #define CSR1 1 /* init block addr (low) */ macro 497 REGA(CSR1) = dvma_vtob(&(MEM->init)); in lance_init_ring()
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D | atarilance.c | 304 #define CSR1 1 /* init block addr (low) */ macro 653 REGA( CSR1 ) = 0; in lance_open()
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/linux-6.1.9/drivers/net/wireless/ralink/rt2x00/ |
D | rt2400pci.c | 878 reg = rt2x00mmio_register_read(rt2x00dev, CSR1); in rt2400pci_init_registers() 882 rt2x00mmio_register_write(rt2x00dev, CSR1, reg); in rt2400pci_init_registers() 884 reg = rt2x00mmio_register_read(rt2x00dev, CSR1); in rt2400pci_init_registers() 887 rt2x00mmio_register_write(rt2x00dev, CSR1, reg); in rt2400pci_init_registers()
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D | rt2400pci.h | 63 #define CSR1 0x0004 macro
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D | rt2500pci.c | 1016 reg = rt2x00mmio_register_read(rt2x00dev, CSR1); in rt2500pci_init_registers() 1020 rt2x00mmio_register_write(rt2x00dev, CSR1, reg); in rt2500pci_init_registers() 1022 reg = rt2x00mmio_register_read(rt2x00dev, CSR1); in rt2500pci_init_registers() 1025 rt2x00mmio_register_write(rt2x00dev, CSR1, reg); in rt2500pci_init_registers()
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D | rt2500pci.h | 74 #define CSR1 0x0004 macro
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