Searched refs:CPUCS_REG (Results 1 – 2 of 2) sorted by relevance
26 #define CPUCS_REG 0x7F92 /* EZ-USB Control and Status Register. Bit 0 controls 8051 reset */ macro62 response = emi26_writememory (dev, CPUCS_REG, &reset_bit, 1, 0xa0); in emi26_set_reset()
35 #define CPUCS_REG 0x7F92 /* EZ-USB Control and Status Register. Bit 0 controls 8051 reset */ macro71 response = emi62_writememory (dev, CPUCS_REG, &reset_bit, 1, 0xa0); in emi62_set_reset()