Searched refs:CPG_SIPLL5_CLK1_POSTDIV2_WEN (Results 1 – 2 of 2) sorted by relevance
36 #define CPG_SIPLL5_CLK1_POSTDIV2_WEN BIT(20) macro
603 writel(CPG_SIPLL5_CLK1_POSTDIV1_WEN | CPG_SIPLL5_CLK1_POSTDIV2_WEN | in rzg2l_cpg_sipll5_set_rate()