Searched refs:CORE_CLK_SRC_DPLL_X2 (Results 1 – 4 of 4) sorted by relevance
123 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1); in omap2_reprogram_dpllcore()146 tmpset.cm_clksel2_pll |= CORE_CLK_SRC_DPLL_X2; in omap2_reprogram_dpllcore()148 done_rate = CORE_CLK_SRC_DPLL_X2; in omap2_reprogram_dpllcore()164 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1); in omap2_reprogram_dpllcore()
128 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1); in omap2_select_table_rate()136 CORE_CLK_SRC_DPLL_X2) in omap2_select_table_rate()137 done_rate = CORE_CLK_SRC_DPLL_X2; in omap2_select_table_rate()148 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1); in omap2_select_table_rate()
40 static u32 curr_perf_level = CORE_CLK_SRC_DPLL_X2;90 else if (level == CORE_CLK_SRC_DPLL_X2) in omap2xxx_sdrc_reprogram()
46 #define CORE_CLK_SRC_DPLL_X2 0x2 macro