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Searched refs:CNVC_SURFACE_PIXEL_FORMAT (Results 1 – 9 of 9) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_ipp.h36 SRI(CNVC_SURFACE_PIXEL_FORMAT, CNVC_CFG, id), \
80 IPP_SF(CNVC_CFG0_CNVC_SURFACE_PIXEL_FORMAT, CNVC_SURFACE_PIXEL_FORMAT, mask_sh), \
147 type CNVC_SURFACE_PIXEL_FORMAT; \
185 uint32_t CNVC_SURFACE_PIXEL_FORMAT; member
Ddcn10_dpp.c380 REG_SET(CNVC_SURFACE_PIXEL_FORMAT, 0, in dpp1_cnv_setup()
381 CNVC_SURFACE_PIXEL_FORMAT, pixel_format); in dpp1_cnv_setup()
Ddcn10_dpp_cm.c710 REG_SET(CNVC_SURFACE_PIXEL_FORMAT, 0, in dpp1_full_bypass()
711 CNVC_SURFACE_PIXEL_FORMAT, 0x8); in dpp1_full_bypass()
Ddcn10_dpp.h120 SRI(CNVC_SURFACE_PIXEL_FORMAT, CNVC_CFG, id), \
326 TF_SF(CNVC_CFG0_CNVC_SURFACE_PIXEL_FORMAT, CNVC_SURFACE_PIXEL_FORMAT, mask_sh), \
1071 type CNVC_SURFACE_PIXEL_FORMAT; \
1339 uint32_t CNVC_SURFACE_PIXEL_FORMAT; \
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn201/
Ddcn201_dpp.c166 REG_SET(CNVC_SURFACE_PIXEL_FORMAT, 0, in dpp201_cnv_setup()
167 CNVC_SURFACE_PIXEL_FORMAT, pixel_format); in dpp201_cnv_setup()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dpp.c225 REG_SET(CNVC_SURFACE_PIXEL_FORMAT, 0, in dpp2_cnv_setup()
226 CNVC_SURFACE_PIXEL_FORMAT, pixel_format); in dpp2_cnv_setup()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_dpp.h135 SRI(CNVC_SURFACE_PIXEL_FORMAT, CNVC_CFG, id), \
299 TF_SF(CNVC_CFG0_CNVC_SURFACE_PIXEL_FORMAT, CNVC_SURFACE_PIXEL_FORMAT, mask_sh), \
Ddcn30_dpp.c307 REG_SET_2(CNVC_SURFACE_PIXEL_FORMAT, 0, in dpp3_cnv_setup()
308 CNVC_SURFACE_PIXEL_FORMAT, pixel_format, in dpp3_cnv_setup()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn32/
Ddcn32_resource.h491 SRI_ARR(CNVC_SURFACE_PIXEL_FORMAT, CNVC_CFG, id), \