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Searched refs:CLK_VDO1_VPP3_TO_VDO1_DL_ASYNC (Results 1 – 2 of 2) sorted by relevance

/linux-6.1.9/drivers/clk/mediatek/
Dclk-mt8195-vdo1.c79 GATE_VDO1_0(CLK_VDO1_VPP3_TO_VDO1_DL_ASYNC, "vdo1_vpp3_to_vdo1_dl_async", "top_vpp", 15),
/linux-6.1.9/include/dt-bindings/clock/
Dmt8195-clk.h827 #define CLK_VDO1_VPP3_TO_VDO1_DL_ASYNC 15 macro